Olivier Potin

32 papers A 2B 1C 6Misc 1Journal 11Unranked 11
YearRankTypeTitle / Venue / Authors
2025 J jnl
CVA6S+: A Superscalar RISC-V Core with High-Throughput Memory Architecture.
CoRR
Riccardo Tedeschi, Gianmarco Ottavi, Côme Allart, Nils Wistoff, Zexin Fu, Filippo Grillotti, Fabio De Ambroggi, Elio Guidetti, Jean-Baptiste Rigaud, Olivier Potin, Jean-Roch Coulon, César Fuguet, Luca Benini, Davide Rossi
2025 — conf
Code Encryption for Confidentiality and Execution Integrity Down to Control Signals.
HOST
Théophile Gousselot, Jean-Max Dutertre, Olivier Potin, Jean-Baptiste Rigaud
2025 C conf
Eliminating Write-After-Write Hazards to Improve Performance in Embedded Processors.
DSD
Côme Allart, Junheng Zheng, Jean-Roch Coulon, André Sintzoff, Olivier Potin, Jean-Baptiste Rigaud
2024 — conf
Modular Multiplication in the AMNS Representation: Hardware Implementation.
SAC (2)
Louis Noyez, Nadia El Mrabet, Olivier Potin, Pascal Véron
2024 J jnl
Montgomery Multiplication Scalable Systolic Designs Optimized for DSP48E2.
ACM Trans. Reconfigurable Technol. Syst.
Louis Noyez, Nadia El Mrabet, Olivier Potin, Pascal Véron
2024 — conf
Using a Performance Model to Implement a Superscalar CVA6.
CF (Companion)
Côme Allart, Jean-Roch Coulon, André Sintzoff, Olivier Potin, Jean-Baptiste Rigaud
2024 J jnl
Using a Performance Model to Implement a Superscalar CVA6.
CoRR
Côme Allart, Jean-Roch Coulon, André Sintzoff, Olivier Potin, Jean-Baptiste Rigaud
2023 — conf
A CCFI Verification Scheme Based on the RISC-V Trace Encoder.
COSADE
Anthony Zgheib, Olivier Potin, Jean-Baptiste Rigaud, Jean-Max Dutertre
2023 — conf
CIFER: Code Integrity and control Flow verification for programs Executed on a RISC-V core.
HOST
Anthony Zgheib, Olivier Potin, Jean-Baptiste Rigaud, Jean-Max Dutertre
2023 J jnl
Experimental EMFI detection on a RISC-V core using the Trace Verifier solution.
Microprocess. Microsystems
Anthony Zgheib, Olivier Potin, Jean-Baptiste Rigaud, Jean-Max Dutertre
2023 C conf
Fault Injection on Embedded Neural Networks: Impact of a Single Instruction Skip.
DSD
Clément Gaine, Pierre-Alain Moëllic, Olivier Potin, Jean-Max Dutertre
2023 J jnl
Fault Injection on Embedded Neural Networks: Impact of a Single Instruction Skip.
CoRR
Clément Gaine, Pierre-Alain Moëllic, Olivier Potin, Jean-Max Dutertre
2023 — conf
Lightweight Countermeasures Against Original Linear Code Extraction Attacks on a RISC-V Core.
HOST
Théophile Gousselot, Olivier Thomas, Jean-Max Dutertre, Olivier Potin, Jean-Baptiste Rigaud
2023 A conf
Security Evaluation of a Hybrid CMOS/MRAM Ascon Hardware Implementation.
DATE
Nathan Roussel, Olivier Potin, Jean-Max Dutertre, Jean-Baptiste Rigaud
2023 C conf
Software-Only Control-Flow Integrity Against Fault Injection Attacks.
DSD
François Bonnal, Vincent Dupaquis, Olivier Potin, Jean-Max Dutertre
2022 C conf
A CFI Verification System based on the RISC-V Instruction Trace Encoder.
DSD
Anthony Zgheib, Olivier Potin, Jean-Baptiste Rigaud, Jean-Max Dutertre
2022 — conf
CMOS/STT-MRAM Based Ascon LWC: a Power Efficient Hardware Implementation.
ICECS 2022
Nathan Roussel, Olivier Potin, Gregory di Pendina, Jean-Max Dutertre, Jean-Baptiste Rigaud
2022 C conf
Combined Fault Injection and Real-Time Side-Channel Analysis for Android Secure-Boot Bypassing.
CARDIS
Clément Fanjas, Clément Gaine, Driss Aboulkassimi, Simon Pontié, Olivier Potin
2022 J jnl
Real-Time Frequency Detection to Synchronize Fault Injection on System-on-Chip.
IACR Cryptol. ePrint Arch.
Clément Fanjas, Clément Gaine, Driss Aboulkassimi, Simon Pontié, Olivier Potin
2020 — conf
Experimental Analysis of the Electromagnetic Instruction Skip Fault Model.
DTIS
Alexandre Menu, Jean-Max Dutertre, Olivier Potin, Jean-Baptiste Rigaud, Jean-Luc Danger
2019 — conf
Experimental Analysis of the Laser-Induced Instruction Skip Fault Model.
NordSec
Jean-Max Dutertre, Timothée Riom, Olivier Potin, Jean-Baptiste Rigaud
2018 — conf
All paths lead to Rome: Polymorphic Runtime Code Generation for Embedded Systems.
CS2@HiPEAC
Damien Couroussé, Thierno Barry, Bruno Robisson, Nicolas Belleville, Philippe Jaillon, Olivier Potin, Hélène Le Bouder, Jean-Louis Lanet, Karine Heydemann
2018 J jnl
Assessing body built-in current sensors for detection of multiple transient faults.
Microelectron. Reliab.
Raphael Andreoni Camponogara Viera, Jean-Max Dutertre, Marie-Lise Flottes, Olivier Potin, Giorgio Di Natale, Bruno Rouzeyre, Rodrigo Possamai Bastos
2017 — conf
Filtering-based CPA: a successful side-channel attack against desynchronization countermeasures.
CS2@HiPEAC
Karim M. Abdellatif, Damien Couroussé, Olivier Potin, Philippe Jaillon
2017 J jnl
Runtime Code Polymorphism as a Protection Against Side Channel Attacks.
IACR Cryptol. ePrint Arch.
Damien Couroussé, Thierno Barry, Bruno Robisson, Philippe Jaillon, Olivier Potin, Jean-Louis Lanet
2016 C conf
Runtime Code Polymorphism as a Protection Against Side Channel Attacks.
WISTP
Damien Couroussé, Thierno Barry, Bruno Robisson, Philippe Jaillon, Olivier Potin, Jean-Louis Lanet
2014 J jnl
Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS.
Microelectron. Reliab.
Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Bruno Rouzeyre, Giorgio Di Natale, Alexandre Sarafianos
2013 J jnl
A novel implementation of the histogram-based technique for measurement of INL of LUT-based correction of ADC.
Microelectron. J.
Vincent Kerzerho, Serge Bernard, Florence Azaïs, Mariane Comte, Olivier Potin, Chuan Shan, G. Bontorin, Michel Renovell
2013 B conf
Implementing model redundancy in predictive alternate test to improve test confidence.
ETS
Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Olivier Potin, Michel Renovell
2013 J jnl
Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection.
Microelectron. Reliab.
Jean-Max Dutertre, Rodrigo Possamai Bastos, Olivier Potin, Marie-Lise Flottes, Bruno Rouzeyre, Giorgio Di Natale
2012 A conf
Making predictive analog/RF alternate test strategy independent of training set size.
ITC
Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Olivier Potin, Michel Renovell
2012 Misc conf
Smart selection of indirect parameters for DC-based alternate RF IC testing.
VTS
Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Michel Renovell, Vincent Kerzerho, Olivier Potin, Christophe Kelma