Oliver Chiu-sing Choy

47 papers C 11Misc 2Journal 15Unranked 19

Year	Rank	Type	Title / Venue / Authors
2016	J	`jnl`	Cascaded Network Body Channel Model for Intrabody Communication. IEEE J. Biomed. Health Informatics Hao Wang, Xian Tang, Oliver Chiu-sing Choy, Gerald E. Sobelman
2016	—	`conf`	Subthreshold Passive RFID Tag's Baseband Processor Core Design with Custom Modules and Cells. ISVLSI Weiwei Shi, Zhao Guangdong, Oliver Chiu-sing Choy
2014	—	`conf`	A novel ratioed logic style for faster subthreshold digital circuits based on 90 nm CMOS and below. SoCC Weiwei Shi, Oliver Chiu-sing Choy
2014	—	`conf`	Subthreshold passive RF tag's PIE decoder design with wide tolerance and custom ratioed logic cells. ICECS Weiwei Shi, Oliver Chiu-sing Choy
2013	J	`jnl`	Architecture and Design Flow for a Highly Efficient Structured ASIC. IEEE Trans. Very Large Scale Integr. Syst. S. Man Ho Ho, Yanqing Ai, Thomas Chun-Pong Chau, Steve C. L. Yuen, Oliver Chiu-sing Choy, Philip Heng Wai Leong, Kong-Pang Pun
2013	—	`conf`	Key component designs of subthreshold baseband processors in passive RF device. ASICON Weiwei Shi, Oliver Chiu-sing Choy, Robert K. F. Teng
2013	—	`conf`	The Impact of Nodes Embedded with Data Processing Unit on Energy Consumption in a Wireless BAN. ANT/SEIT Yanqing Ai, Oliver Chiu-sing Choy
2012	—	`conf`	A process-compatible passive RFID tag's digital design for subthreshold operation. ICECS Weiwei Shi, Oliver Chiu-sing Choy
2012	J	`jnl`	Robust, Low-Complexity, and Energy Efficient Downlink Baseband Receiver Design for MB-OFDM UWB System. IEEE Trans. Circuits Syst. I Regul. Pap. Wen Fan, Oliver Chiu-sing Choy
2011	—	`conf`	Robust and efficient baseband receiver design for MB-OFDM UWB system. ASP-DAC Wen Fan, Oliver Chiu-sing Choy
2010	J	`jnl`	A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders. IEEE J. Solid State Circuits Chi Fat Chan, Kong-Pang Pun, Ka Nang Leung, Jianping Guo, Lincoln Lai Kan Leung, Oliver Chiu-sing Choy
2010	J	`jnl`	Methods for Power/Throughput/Area Optimization of H.264/AVC Decoding. J. Signal Process. Syst. Ke Xu, Tsu-Ming Liu, Jiun-In Guo, Oliver Chiu-sing Choy
2009	C	`conf`	A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders. ISCAS Chi Fat Chan, Weiwei Shi, Kong-Pang Pun, Lincoln Lai Kan Leung, Ka Nang Leung, Oliver Chiu-sing Choy
2009	C	`conf`	A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma Modulators. ISCAS Bing Li, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy
2009	J	`jnl`	Low-Cost Allocator Implementations for Networks-on-Chip Routers. VLSI Design Min Zhang, Oliver Chiu-sing Choy
2009	J	`jnl`	Low-Power Bitstream-Residual Decoder for H.264/AVC Baseline Profile Decoding. EURASIP J. Embed. Syst. Ke Xu, Oliver Chiu-sing Choy
2009	C	`conf`	Robust and Low Complexity Packet Detector Design for MB-OFDM UWB. ISCAS Wen Fan, Oliver Chiu-sing Choy, Ka Nang Leung
2008	J	`jnl`	A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers. IEEE Trans. Circuits Syst. II Express Briefs Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan, Ka Nang Leung
2008	J	`jnl`	A Power-Efficient and Self-Adaptive Prediction Engine for H.264/AVC Decoding. IEEE Trans. Very Large Scale Integr. Syst. Ke Xu, Oliver Chiu-sing Choy
2008	—	`conf`	Enhanced channel selection using digital low-IF in Weaver receiver architecture. APCCAS Misteltein Pak-Kee Chan, Oliver Chiu-sing Choy, Kong-Pang Pun, Cheong-Fat Chan, Alex Ka Nang Leung
2007	J	`jnl`	A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. J. VLSI Signal Process. Wei Han, Kwok-Wai Hon, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2007	J	`jnl`	Priority-Based Heading One Detector in H.264/AVC Decoding. EURASIP J. Embed. Syst. Ke Xu, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2006	—	`conf`	0.8 V GPS band CMOS VCO with 29% Tuning Range. APCCAS Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy
2006	C	`conf`	A 0.5V fully differential OTA with local common feedback. ISCAS Xiao-Yong He, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan
2006	C	`conf`	A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. ISCAS Chi-Hong Chan, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2006	C	`conf`	A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. ISCAS Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan
2006	—	`conf`	Adiabatic Smart Card. APCCAS King-Keung Mok, Ka-Hung Tsang, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2006	C	`conf`	An ECG measurement IC using driven-right-leg circuit. ISCAS Alex K. Y. Wong, Kong-Pang Pun, Yuan-Ting Zhang, Oliver Chiu-sing Choy
2006	C	`conf`	An efficient MFCC extraction method in speech recognition. ISCAS Wei Han, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2006	C	`conf`	An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. ISCAS Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2006	C	`conf`	Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. ISCAS Ke Xu, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2006	—	`conf`	Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. APCCAS Wang-Chi Cheng, Cheong-Fat Chan, Kong-Pang Pun, Oliver Chiu-sing Choy
2005	—	`conf`	Active RC filter with reduced capacitance by current division technique. ISCAS (4) Nang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan
2004	J	`jnl`	A low-latency asynchronous shift register. IEEE Trans. Circuits Syst. II Express Briefs Ragnarok Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2004	C	`conf`	Card-Centric Framework - Providing I/O Resources for Smart Cards. CARDIS Pak-Kee Chan, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2004	—	`conf`	Pipelines in Dynamic Dual-Rail Circuits. PATMOS Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2003	Misc	`conf`	Design for Self-Checking and Self-Timed Datapath. VTS Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2002	—	`conf`	A 1.2 V 900 MHz CMOS mixer. ISCAS (5) Wang-Chi Cheng, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2002	—	`conf`	A 900 MHz 1.2 V CMOS mixer with high linearity. APCCAS (1) Wang-Chi Cheng, Cheong-Fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun
2002	—	`conf`	A Totally Self-Checking Dynamic Asynchronous Datapath. Asian Test Symposium Jing-Ling Yang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Kong-Pang Pun
2001	J	`jnl`	A New Control Circuit for Asynchronous Micropipelines. IEEE Trans. Computers Oliver Chiu-sing Choy, Jan Butas, Juraj Povazanec, Cheong-Fat Chan
2001	—	`conf`	A giga-hertz CMOS digital controlled oscillator. ISCAS (4) Lai-Kan Leung, Cheong-Fat Chan, Oliver Chiu-sing Choy
1999	J	`jnl`	A self-timed ICT chip for image coding. IEEE Trans. Circuits Syst. Video Technol. Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Wai-kuen Cham
1999	Misc	`conf`	Pipelined Dataflow Architecture of a Small Processor. PDPTA Juraj Povazanec, Oliver Chiu-sing Choy, Cheong-Fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-Ling Yang, Tin-yan Tang
1998	—	`conf`	A Useful Micropipeline Architecture to Implement DSP Algorithms. EUROMICRO Oliver Chiu-sing Choy, Tin-Chak Johnson Pang, Juraj Povazanec, Cheong-Fat Chan
1997	—	`conf`	Self-timed 1-D ICT processor. ASP-DAC Tin-Chak Johnson Pang, Oliver Chiu-sing Choy, Cheong-Fat Chan, Wai-kuen Cham
1996	J	`jnl`	Test Generation with Dynamic Probe Points in High Observability Testing Environment. IEEE Trans. Computers Oliver Chiu-sing Choy, Lap-kong Chan, Ray Chan, Cheong-Fat Chan