Nuno Roma - RankMe

133 papers A* 2A 2B 8C 26Misc 3Journal 53Unranked 38

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Real-Time ORB Accelerator for Embedded FPGA-Based SoCs With ROS Integration. IEEE Trans. Very Large Scale Integr. Syst. Andre Costa, José Duarte Lopes, Pedro Tomás, Nuno Roma, Nuno Neves
2026	J	`jnl`	Reconfigurable FPU With Precision Auto-Tuning for Next-Generation Transprecision Computing. IEEE Trans. Circuits Syst. I Regul. Pap. Guilherme Dias, Luís Crespo, Timo Schlachter, Marc Andre Heller, Jens Krueger, Pedro Tomás, Nuno Roma, Nuno Neves
2025	J	`jnl`	A Survey on Stream-Based Architectures: From Accelerators to CPUs. Proc. IEEE Luís Crespo, Nuno Neves, Pedro Tomás, Nuno Roma
2025	C	`conf`	Advancing the RISC-V Performance Simulation Ecosystem with Data Prefetching. ISC Luís Crespo, Nuno Neves, Pedro Tomás, Nuno Roma
2025	—	`conf`	Dynamic Reconfigurable FPU for Next-Generation Transprecision Computing. LASCAS Guilherme Dias, Luís Crespo, Pedro Tomás, Nuno Roma, Nuno Neves
2025	J	`jnl`	Functional Validation of the RISC-V Unlimited Vector Extension. IEEE Embed. Syst. Lett. Ana Fernandes, Luís Crespo, Nuno Neves, Pedro Tomás, Nuno Roma, Gabriel Falcão
2025	C	`conf`	High-throughput packet aggregator for the back-end DAQ of CERN CMS HGCAL detector. ISCAS Martim Rosado, Pedro Tomás, Nuno Roma, André David
2025	J	`jnl`	Improving Coding Efficiency of Massive Parallel Intra Prediction Using Alternative References. IEEE Trans. Circuits Syst. I Regul. Pap. Iago Storch, Nuno Roma, Daniel Palomino, Sergio Bampi
2025	C	`conf`	MIDAS: A Mapping Infrastructure for Configurable, Data-Streaming Based Domain Specific Accelerators. SBAC-PAD Martim Bento, Nuno Neves, Pedro Tomás, Nuno Roma
2025	J	`jnl`	Marionette: Data Structure Description and Management for Heterogeneous Computing. CoRR Nuno dos Santos Fernandes, Pedro Tomás, Nuno Roma, Frank Winklmeier, Patricia Conde-Muíño
2025	C	`conf`	RISC-V in HPC: a Look Into Tools for Performance Monitoring. ISC Fabio Banchelli, Rafel Albert Bros Esqueu, Tiago Rocha, Nuno Roma, Pedro Tomás, Nuno Neves, Filippo Mantovani
2025	A	`conf`	RVEBS: Event-Based Sampling on RISC-V. DATE Tiago Rocha, Nuno Neves, Nuno Roma, Pedro Tomás, Leonel Sousa
2025	C	`conf`	Real-Time ORB Accelerator with ROS Integration for Embedded FPGA SoCs. ISCAS Andre Costa, Pedro Tomás, Nuno Roma, Nuno Neves
2025	C	`conf`	Stream-Driven Acceleration for Embedded RISC-V SoCs. ISCAS João Maia, Ana Silveira, Gonçalo Midões, Nuno Neves, Pedro Tomás, Nuno Roma
2025	B	`conf`	URAM-Based Asynchronous FIFO Design for Improved Throughput and FPGA RAM Usage. FPL Martim Rosado, Pedro Tomás, Nuno Roma, André David
2024	—	`conf`	Alternative Reference Samples to Improve Coding Efficiency for Parallel Intra Prediction Solutions. LASCAS Iago Storch, Nuno Roma, Daniel Palomino, Sergio Bampi
2024	J	`jnl`	NDPmulator: Enabling Full-System Simulation for Near-Data Accelerators From Caches to DRAM. IEEE Access João Vieira, Nuno Roma, Gabriel Falcão, Pedro Tomás
2024	J	`jnl`	gem5-accel: A Pre-RTL Simulation Toolchain for Accelerator Architecture Validation. IEEE Comput. Archit. Lett. João Vieira, Nuno Roma, Gabriel Falcão, Pedro Tomás
2023	—	`conf`	GPU Acceleration of MIP Intra Prediction in VVC. EUSIPCO Iago Storch, Nuno Roma, Daniel Palomino, Sergio Bampi
2023	—	`conf`	Neural Network Predictor for Fast Channel Change on DVB Set-Top-Boxes. DASIP Tomás Malcata, Nuno Sebastião, Tiago Dias, Nuno Roma
2023	J	`jnl`	SBCCI 2022. IEEE Des. Test Nuno Roma, Bruno Zatt
2023	—	`conf`	Supporting RISC-V Performance Counters Through Linux Performance Analysis Tools. ASAP Joao Mario Domingos, Tiago Rocha, Nuno Neves, Nuno Roma, Pedro Tomás, Leonel Sousa
2023	C	`conf`	Trading Performance, Power, and Area on Low-Precision Posit MAC Units for CNN Training. SBAC-PAD Luís Crespo, Pedro Tomás, Nuno Roma, Nuno Neves
2022	J	`jnl`	Compiling for Vector Extensions With Stream-Based Specialization. IEEE Micro Nuno Neves, Joao Mario Domingos, Nuno Roma, Pedro Tomás, Gabriel Falcão
2022	J	`jnl`	Decoupling GPGPU voltage-frequency scaling for deep-learning applications. J. Parallel Distributed Comput. Francisco Mendes, Pedro Tomás, Nuno Roma
2022	C	`conf`	Early prototyping and testing of CERN LHC CMS high-granularity calorimeter slow-control system. RSP Martim Rosado, Stavros Mallios, Pedro Tomás, Nuno Roma, André David
2022	C	`conf`	Mode-Adaptive Subsampling of SAD/SSE Operations for Intra Prediction Cost Reduction. ISCAS Marcel Moscarelli Corrêa, Nuno Roma, Daniel Palomino, Guilherme Corrêa, Luciano Agostini
2022	J	`jnl`	Unified Posit/IEEE-754 Vector MAC Unit for Transprecision Computing. IEEE Trans. Circuits Syst. II Express Briefs Luís Crespo, Pedro Tomás, Nuno Roma, Nuno Neves
2022	C	`conf`	gem5-ndp: Near-Data Processing Architecture Simulation From Low Level Caches to DRAM. SBAC-PAD João Vieira, Nuno Roma, Gabriel Falcão, Pedro Tomás
2021	J	`jnl`	A Compute Cache System for Signal Processing Applications. J. Signal Process. Syst. João Vieira, Nuno Roma, Gabriel Falcão, Pedro Tomás
2021	J	`jnl`	A Reconfigurable Posit Tensor Unit with Variable-Precision Arithmetic and Automatic Data Streaming. J. Signal Process. Syst. Nuno Neves, Pedro Tomás, Nuno Roma
2021	J	`jnl`	Compiler-Assisted Data Streaming for Regular Code Structures. IEEE Trans. Computers Nuno Neves, Pedro Tomás, Nuno Roma
2021	—	`ed.`	Euro-Par 2021: Parallel Processing - 27th International Conference on Parallel and Distributed Computing, Lisbon, Portugal, September 1-3, 2021, Proceedings Euro-Par Leonel Sousa, Nuno Roma, Pedro Tomás
2021	J	`jnl`	Fast and energy-efficient approximate motion estimation architecture for real-time 4 K UHD processing. J. Real Time Image Process. Roger Endrigo Carvalho Porto, Murilo R. Perleberg, Vladimir Afonso, Bruno Zatt, Nuno Roma, Luciano Agostini, Marcelo Schiavon Porto
2021	J	`jnl`	PositNN: Training Deep Neural Networks with Mixed Low-Precision Posit. CoRR Gonçalo Raposo, Pedro Tomás, Nuno Roma
2021	Misc	`conf`	Positnn: Training Deep Neural Networks with Mixed Low-Precision Posit. ICASSP Gonçalo Raposo, Pedro Tomás, Nuno Roma
2021	A*	`conf`	Unlimited Vector Extension with Data Streaming Support. ISCA Joao Mario Domingos, Nuno Neves, Nuno Roma, Pedro Tomás
2020	—	`conf`	2PSA: An Optimized and Flexible Power-Precision Scalable Adder. SBCCI Roger Endrigo Carvalho Porto, Bruno Zatt, Nuno Roma, Luciano Agostini, Marcelo Schiavon Porto
2020	—	`conf`	Dynamic Fused Multiply-Accumulate Posit Unit with Variable Exponent Size for Low-Precision DSP Applications. SiPS Nuno Neves, Pedro Tomás, Nuno Roma
2020	C	`conf`	Exploiting Non-conventional DVFS on GPUs: Application to Deep Learning. SBAC-PAD Francisco Mendes, Pedro Tomás, Nuno Roma
2020	Misc	`conf`	Processing Convolutional Neural Networks on Cache. ICASSP João Vieira, Nuno Roma, Gabriel Falcão, Pedro Tomás
2020	—	`conf`	Reconfigurable Stream-based Tensor Unit with Variable-Precision Posit Arithmetic. ASAP Nuno Neves, Pedro Tomás, Nuno Roma
2020	J	`jnl`	UHD 8K energy-quality scalable HEVC intra-prediction SAD unit hardware using optimized and configurable imprecise adders. J. Real Time Image Process. Roger Endrigo Carvalho Porto, Marcel Moscarelli Corrêa, Jones Goebel, Bruno Zatt, Nuno Roma, Luciano Agostini, Marcelo Schiavon Porto
2019	J	`jnl`	DVFS-aware application classification to improve GPGPUs energy efficiency. Parallel Comput. João Guerreiro, Aleksandar Ilic, Nuno Roma, Pedro Tomás
2019	J	`jnl`	Flying tourist problem: Flight time and cost minimization in complex routes. Expert Syst. Appl. Rafael Marques, Luís M. S. Russo, Nuno Roma
2019	J	`jnl`	GPU Static Modeling Using PTX and Deep Structured Learning. IEEE Access João Guerreiro, Aleksandar Ilic, Nuno Roma, Pedro Tomás
2019	—	`conf`	Heart Disease Detection Architecture for Lead I Off-the-Person ECG Monitoring Devices. EUSIPCO Pedro Sá, Helena Aidos, Nuno Roma, Pedro Tomás
2019	J	`jnl`	Modeling and Decoupling the GPU Power Consumption for Cross-Domain DVFS. IEEE Trans. Parallel Distributed Syst. João Guerreiro, Aleksandar Ilic, Nuno Roma, Pedro Tomás
2019	—	`conf`	Power-Efficient Approximate SAD Architecture with LOA Imprecise Adders. LASCAS Roger Endrigo Carvalho Porto, Luciano Agostini, Bruno Zatt, Nuno Roma, Marcelo Schiavon Porto
2018	C	`conf`	Exploiting Compute Caches for Memory Bound Vector Operations. SBAC-PAD João Vieira, Nuno Roma, Pedro Tomás, Paolo Ienne, Gabriel Falcão Paiva Fernandes
2018	A*	`conf`	GPGPU Power Modeling for Multi-domain Voltage-Frequency Scaling. HPCA João Guerreiro, Aleksandar Ilic, Nuno Roma, Pedro Tomás
2018	J	`jnl`	Highly parallel HEVC decoding for heterogeneous systems with CPU and GPU. Signal Process. Image Commun. Biao Wang, Diego F. de Souza, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2018	J	`jnl`	Stream data prefetcher for the GPU memory interface. J. Supercomput. Nuno Neves, Pedro Tomás, Nuno Roma
2017	J	`jnl`	Adaptive In-Cache Streaming for Efficient Data Management. IEEE Trans. Very Large Scale Integr. Syst. Nuno Neves, Pedro Tomás, Nuno Roma
2017	J	`jnl`	Efficient parallelization of perturbative Monte Carlo QM/MM simulations in heterogeneous platforms. Int. J. High Perform. Comput. Appl. Sebastião Miranda, Jonas Feldt, Frederico Pratas, Ricardo A. Mata, Nuno Roma, Pedro Tomás
2017	C	`conf`	Energy-efficient motion estimation with approximate arithmetic. MMSP Roger Endrigo Carvalho Porto, Luciano Volcan Agostini, Bruno Zatt, Marcelo Schiavon Porto, Nuno Roma, Leonel Sousa
2017	J	`jnl`	GHEVC: An Efficient HEVC Decoder for Graphics Processing Units. IEEE Trans. Multim. Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2017	J	`jnl`	GPU Parallelization of HEVC In-Loop Filters. Int. J. Parallel Program. Biao Wang, Diego F. de Souza, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2017	J	`jnl`	Special issue on real-time energy-aware circuits and systems for HEVC and for its 3D and SVC extensions. J. Real Time Image Process. Leonel Sousa, Nuno Roma
2016	—	`conf`	A Cross-Core Performance Model for Heterogeneous Many-Core Architectures. VECPAR Rui Pinheiro, Nuno Roma, Pedro Tomás
2016	J	`jnl`	Adaptive Scheduling Framework for Real-Time Video Encoding on Heterogeneous Systems. IEEE Trans. Circuits Syst. Video Technol. Aleksandar Ilic, Svetislav Momcilovic, Nuno Roma, Leonel Sousa
2016	J	`jnl`	BowMapCL: Burrows-Wheeler Mapping on Multiple Heterogeneous Accelerators. IEEE ACM Trans. Comput. Biol. Bioinform. David Nogueira, Pedro Tomás, Nuno Roma
2016	J	`jnl`	Editorial to special issue on energy efficient architectures for embedded systems. EURASIP J. Embed. Syst. Nuno Roma, José L. Núñez-Yáñez
2016	C	`conf`	Efficient HEVC decoder for heterogeneous CPU with GPU systems. MMSP Biao Wang, Mauricio Alvarez-Mesa, Chi Ching Chi, Ben H. H. Juurlink, Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2016	J	`jnl`	Exploiting task and data parallelism for advanced video coding on hybrid CPU + GPU platforms. J. Real Time Image Process. Svetislav Momcilovic, Nuno Roma, Leonel Sousa
2016	J	`jnl`	GPU-assisted HEVC intra decoder. J. Real Time Image Process. Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2016	—	`conf`	In-Cache Streaming: Morphable Infrastructure for Many-Core Processing Systems. Euro-Par Workshops Nuno Neves, Adrien Mussio, Fabien Gonçalves, Pedro Tomás, Nuno Roma
2016	J	`jnl`	Multi-objective kernel mapping and scheduling for morphable many-core architectures. Expert Syst. Appl. Nuno Neves, Rui Neves, Nuno Horta, Pedro Tomás, Nuno Roma
2016	—	`conf`	Performance and Power-Aware Classification for Frequency Scaling of GPGPU Applications. Euro-Par Workshops João Guerreiro, Aleksandar Ilic, Nuno Roma, Pedro Tomás
2016	—	`conf`	Unsupervised variable-grained online phase clustering for heterogeneous/morphable processors. HPCS Miguel Tairum Cruz, Pedro Tomás, Nuno Roma
2015	J	`jnl`	Acceleration of stochastic seismic inversion in OpenCL-based heterogeneous platforms. Comput. Geosci. Tomás Ferreirinha, Rúben Nunes, Leonardo Azevedo, Amílcar Soares, Frederico Pratas, Pedro Tomás, Nuno Roma
2015	B	`conf`	Efficient data-stream management for shared-memory many-core systems. FPL Nuno Neves, Pedro Tomás, Nuno Roma
2015	—	`conf`	Energy-Efficient Architecture for DP Local Sequence Alignment: Exploiting ILP and DLP. IWBBIO (2) Miguel Tairum Cruz, Pedro Tomás, Nuno Roma
2015	C	`conf`	Fast and Scalable Thread Migration for Multi-core Architectures. EUC Miguel Rodrigues, Nuno Roma, Pedro Tomás
2015	—	`conf`	GPU acceleration of the HEVC decoder inter prediction module. GlobalSIP Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2015	—	`conf`	HEVC in-loop filters GPU parallelization in embedded systems. SAMOS Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2015	C	`conf`	High performance IP core for HEVC quantization. ISCAS Tiago Dias, Nuno Roma, Leonel Sousa
2015	J	`jnl`	Implementation and performance analysis of efficient index structures for DNA search algorithms in parallel platforms. Concurr. Comput. Pract. Exp. Nuno Sebastião, Gustavo Encarnação, Nuno Roma
2015	J	`jnl`	Morphable hundred-core heterogeneous architecture for energy-aware computation. IET Comput. Digit. Tech. Nuno Neves, Henrique Mendes, Ricardo Chaves, Pedro Tomás, Nuno Roma
2015	C	`conf`	Multi-kernel Auto-Tuning on GPUs: Performance and Energy-Aware Optimization. PDP João Guerreiro, Aleksandar Ilic, Nuno Roma, Pedro Tomás
2015	J	`jnl`	Multicore SIMD ASIP for Next-Generation Sequencing and Alignment Biochip Platforms. IEEE Trans. Very Large Scale Integr. Syst. Nuno Neves, Nuno Sebastião, David Martins de Matos, Pedro Tomás, Paulo F. Flores, Nuno Roma
2015	C	`conf`	Run-Time Machine Learning for HEVC/H.265 Fast Partitioning Decision. ISM Svetislav Momcilovic, Nuno Roma, Leonel Sousa, Ivan Z. Milentijevic
2015	A	`conf`	Towards GPU HEVC intra decoding: Seizing fine-grain parallelism. ICME Diego F. de Souza, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2014	—	`conf`	Burrows-Wheeler Transform based indexed exact search on a multi-GPU OpenCL platform. HPCS David Nogueira, Pedro Tomás, Nuno Roma
2014	J	`jnl`	Cache-Oblivious parallel SIMD Viterbi decoding for sequence search in HMMER. BMC Bioinform. Miguel Ferreira, Nuno Roma, Luís M. S. Russo
2014	B	`conf`	Collaborative inter-prediction on CPU+GPU systems. ICIP Svetislav Momcilovic, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2014	Misc	`conf`	Cooperative CPU+GPU deblocking filter parallelization for high performance HEVC video codecs. ICASSP Diego F. de Souza, Nuno Roma, Leonel Augusto Sousa
2014	J	`jnl`	Dynamic Load Balancing for Real-Time Video Encoding on Heterogeneous CPU+GPU Systems. IEEE Trans. Multim. Svetislav Momcilovic, Aleksandar Ilic, Nuno Roma, Leonel Sousa
2014	B	`conf`	FEVES: Framework for Efficient Parallel Video Encoding on Heterogeneous Systems. ICPP Aleksandar Ilic, Svetislav Momcilovic, Nuno Roma, Leonel Sousa
2014	—	`conf`	GPU Accelerated Stochastic Inversion of Deep Water Seismic Data. Euro-Par Workshops (1) Tomás Ferreirinha, Rúben Nunes, Amílcar Soares, Frederico Pratas, Pedro Tomás, Nuno Roma
2014	—	`conf`	Low-power vectorial VLIW architecture for maximum parallelism exploitation of dynamic programming algorithms. HPCS Miguel Tairum Cruz, Pedro Tomás, Nuno Roma
2014	—	`conf`	Opencl parallelization of the HEVC de-quantization and inverse transform for heterogeneous platforms. EUSIPCO Diego F. de Souza, Nuno Roma, Leonel Sousa
2014	—	`conf`	Optimized ASIP architecture for compressed BWT-indexed search in bioinformatics applications. HPCS Nuno Sebastião, Paulo F. Flores, Nuno Roma
2014	—	`conf`	Stream Oriented Modular Architecture with Polymorphic Processing Engines. SBAC-PAD (Workshops) Andriy Gorobets, Frederico Pratas, Nuno Roma, Pedro Tomás
2014	J	`jnl`	Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs. EURASIP J. Adv. Signal Process. Tiago Dias, Nuno Roma, Leonel Sousa
2013	—	`conf`	A flexible shared library profiler for early estimation of performance gains in heterogeneous systems. HPCS Adrian Matoga, Ricardo Chaves, Pedro Tomás, Nuno Roma
2013	—	`conf`	BioBlaze: Multi-core SIMD ASIP for DNA sequence alignment. ASAP Nuno Neves, Nuno Sebastião, Andre Patricio, David Martins de Matos, Pedro Tomás, Paulo F. Flores, Nuno Roma
2013	J	`jnl`	Configurable and scalable class of high performance hardware accelerators for simultaneous DNA sequence alignment. Concurr. Comput. Pract. Exp. Nuno Sebastião, Nuno Roma, Paulo F. Flores
2013	—	`conf`	High performance multi-standard architecture for DCT computation in H.264/AVC High Profile and HEVC codecs. DASIP Tiago Dias, Nuno Roma, Leonel Sousa
2013	C	`conf`	HotStream: Efficient Data Streaming of Complex Patterns to Multiple Accelerating Kernels. SBAC-PAD Sergio Paiagua, Frederico Pratas, Pedro Tomás, Nuno Roma, Ricardo Chaves
2013	J	`jnl`	Scalable Unified Transform Architecture for Advanced Video Coding Embedded Systems. Int. J. Parallel Program. Tiago Dias, Sebastián López, Nuno Roma, Leonel Sousa
2013	B	`conf`	Scalable and high throughput biosensing platform. FPL José M. Leitão, José A. Germano, Nuno Roma, Ricardo Chaves, Pedro Tomás
2013	—	`conf`	Transparent Application Acceleration by Intelligent Scheduling of Shared Library Calls on Heterogeneous Systems. PPAM (1) João Colaço, Adrian Matoga, Aleksandar Ilic, Nuno Roma, Pedro Tomás, Ricardo Chaves
2012	J	`jnl`	Hardware accelerator architecture for simultaneous short-read DNA sequences alignment with enhanced traceback phase. Microprocess. Microsystems Nuno Sebastião, Nuno Roma, Paulo F. Flores
2012	C	`conf`	High Performance Unified Architecture for Forward and Inverse Quantization in H.264/AVC. DSD Tiago Dias, Luis Rosario, Nuno Roma, Leonel Sousa
2012	J	`jnl`	Integrated Hardware Architecture for Efficient Computation of the $n$-Best Bio-Sequence Local Alignments in Embedded Platforms. IEEE Trans. Very Large Scale Integr. Syst. Nuno Sebastião, Nuno Roma, Paulo F. Flores
2012	—	`conf`	Multi-level Parallelization of Advanced Video Coding on Hybrid CPU+GPU Platforms. Euro-Par Workshops Svetislav Momcilovic, Nuno Roma, Leonel Sousa
2012	C	`conf`	System-level prototyping framework for heterogeneous multi-core architecture applied to biological sequence analysis. RSP Nuno Roma, Pedro Magalhães
2011	J	`jnl`	A flexible architecture for the computation of direct and inverse transforms in H.264/AVC video codecs. IEEE Trans. Consumer Electron. Tiago Dias, Sebastián López, Nuno Roma, Leonel Sousa
2011	J	`jnl`	A tutorial overview on the properties of the discrete cosine transform for encoded image and video processing. Signal Process. Nuno Roma, Leonel Sousa
2011	—	`conf`	Advantages and GPU implementation of high-performance indexed DNA search based on suffix arrays. HPCS Gustavo Encarnação, Nuno Sebastião, Nuno Roma
2011	—	`conf`	High throughput and scalable architecture for unified transform coding in embedded H.264/AVC video coding systems. ICSAMOS Tiago Dias, Sebastián López, Nuno Roma, Leonel Sousa
2010	—	`conf`	H.264/AVC framework for multi-core embedded video encoders. SoC Tiago Dias, Nuno Roma, Leonel Sousa
2010	—	`conf`	Hardware/software co-design of H.264/AVC encoders for multi-core embedded systems. DASIP Tiago Dias, Nuno Roma, Leonel Sousa
2010	—	`conf`	Integrated accelerator architecture for DNA sequences alignment with enhanced traceback phase. HPCS Nuno Sebastião, Tiago Dias, Nuno Roma, Paulo F. Flores
2010	B	`conf`	p264: open platform for designing parallel H.264/AVC video encoders on multi-core systems. NOSSDAV António Rodrigues, Nuno Roma, Leonel Sousa
2009	C	`conf`	Distributed Software Platform for Automation and Control of General Anaesthesia. ISPDC Gesner Passos, Nuno Roma, Bertinho Andrade da Costa, Leonel Sousa, João Miranda Lemos
2008	C	`conf`	Application Specific Programmable IP Core for Motion Estimation: Technology Comparison Targeting Efficient Embedded Co-Processing Units. DSD Nuno Sebastião, Tiago Dias, Nuno Roma, Paulo F. Flores, Leonel Sousa
2007	—	`conf`	Adaptive Motion Estimation Algorithm for H.264/AVC. DSP Svetislav Momcilovic, Nuno Roma, Leonel Sousa
2007	J	`jnl`	Efficient Hybrid DCT-Domain Algorithm for Video Spatial Downscaling. EURASIP J. Adv. Signal Process. Nuno Roma, Leonel Sousa
2007	J	`jnl`	Reconfigurable architectures and processors for real-time video motion estimation. J. Real Time Image Process. Tiago Dias, Nuno Roma, Leonel Sousa, Miguel Ribeiro
2006	C	`conf`	Application Specific Instruction Set Processor for Adaptive Video Motion Estimation. DSD Svetislav Momcilovic, Tiago Dias, Nuno Roma, Leonel Sousa
2006	—	`conf`	Low Power Distance Measurement Unit for Real-Time Hardware Motion Estimators. PATMOS Tiago Dias, Nuno Roma, Leonel Sousa
2005	—	`conf`	Efficient VLSI Architecture for Real-Time Motion Estimation in Advanced Video Coding. SoCC Tiago Dias, Nuno Roma, Leonel Sousa
2005	B	`conf`	Least squares motion estimation algorithm in the compressed DCT domain for H.26x/MPEG-x video sequences. AVSS Nuno Roma, Leonel Sousa
2003	J	`jnl`	Automatic Synthesis of Motion Estimation Processors Based on a New Class of Hardware Architectures. J. VLSI Signal Process. Nuno Roma, Leonel Sousa
2003	B	`conf`	Customisable Core-Based Architectures for Real-Time Motion Estimation on FPGAs. FPL Nuno Roma, Tiago Dias, Leonel Sousa
2003	J	`jnl`	Fast transcoding architectures for insertion of non-regular shaped objects in the compressed DCT-domain. Signal Process. Image Commun. Nuno Roma, Leonel Sousa
2002	J	`jnl`	Efficient and configurable full-search block-matching processors. IEEE Trans. Circuits Syst. Video Technol. Nuno Roma, Leonel Sousa
2002	—	`conf`	Insertion of irregular-shaped logos in the compressed DCT domain. DSP Nuno Roma, Leonel Sousa
2001	C	`conf`	A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation. VLSI-SOC Nuno Roma, Leonel Sousa
2000	—	`conf`	In the Development and Evaluation of Specialized Processors for Computing High-Order 2-D Image Moments in Real-Time. CAMP Nuno Roma, Leonel Sousa
1999	C	`conf`	Low-power array architectures for motion estimation. MMSP Leonel Sousa, Nuno Roma