Nuno Miguel Cardanha Paulino

13 papers A 1C 1Journal 8Unranked 2
YearRankTypeTitle / Venue / Authors
2021 J jnl
A Flexible HLS Hoeffding Tree Implementation for Runtime Learning on FPGA.
CoRR
Luís Miguel Sousa, Nuno Miguel Cardanha Paulino, João Canas Ferreira, João Bispo
2021 J jnl
Building Beyond HLS: Graph Analysis and Others.
CoRR
Pedro Filipe Silva, João Bispo, Nuno Miguel Cardanha Paulino
2021 J jnl
Optimizing Packet Reception Rates for Low Duty-Cycle BLE Relay Nodes.
CoRR
Nuno Miguel Cardanha Paulino, Luís M. Pessoa, André Branquinho, Rafael Tavares, Igor Ferreira
2019 J jnl
Dynamic Partial Reconfiguration of Customized Single-Row Accelerators.
IEEE Trans. Very Large Scale Integr. Syst.
Nuno Miguel Cardanha Paulino, João Canas Ferreira, João M. P. Cardoso
2017 J jnl
Generation of Customized Accelerators for Loop Pipelining of Binary Instruction Traces.
IEEE Trans. Very Large Scale Integr. Syst.
Nuno Miguel Cardanha Paulino, João Canas Ferreira, João M. P. Cardoso
2016 — —
Generation of Custom Run-Time Reconfigurable Hardware for Transparent Binary Acceleration
Nuno Miguel Cardanha Paulino
2015 J jnl
A Reconfigurable Architecture for Binary Acceleration of Loops with Memory Accesses.
ACM Trans. Reconfigurable Technol. Syst.
Nuno Miguel Cardanha Paulino, João Canas Ferreira, João M. P. Cardoso
2015 A conf
Transparent acceleration of program execution using reconfigurable hardware.
DATE
Nuno Miguel Cardanha Paulino, João Canas Ferreira, João Bispo, João M. P. Cardoso
2014 C conf
Trace-Based Reconfigurable Acceleration with Data Cache and External Memory Support.
ISPA
Nuno Miguel Cardanha Paulino, João Canas Ferreira, João Manuel Paiva Cardoso
2013 — conf
Architecture for Transparent Binary Acceleration of Loops with Memory Accesses.
ARC
Nuno Miguel Cardanha Paulino, João Canas Ferreira, João M. P. Cardoso
2013 J jnl
Transparent Runtime Migration of Loop-Based Traces of Processor Instructions to Reconfigurable Processing Units.
Int. J. Reconfigurable Comput.
João Bispo, Nuno Miguel Cardanha Paulino, João M. P. Cardoso, João Canas Ferreira
2013 J jnl
Transparent Trace-Based Binary Acceleration for Reconfigurable HW/SW Systems.
IEEE Trans. Ind. Informatics
João Bispo, Nuno Miguel Cardanha Paulino, João M. P. Cardoso, João Canas Ferreira
2011 — conf
From Instruction Traces to Specialized Reconfigurable Arrays.
ReConFig
João Bispo, Nuno Miguel Cardanha Paulino, João M. P. Cardoso, João Canas Ferreira