Nuno Horta - RankMe

144 papers A* 1A 11B 7C 11Journal 49Unranked 64

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	A 25 nW Heartbeat Monitoring Circuit for Wearable Applications in CMOS 65nm. SMACD Rafael Vieira, Seyedehsomayeh Hatefinasab, Ricardo Martins, Nuno Horta, Nuno Lourenço
2024	J	`jnl`	Design Automation of Analog and Mixed-Signal Circuits Using Neural Networks - A Tutorial Brief. IEEE Trans. Circuits Syst. II Express Briefs Gustavo Liñán Cembrano, Nuno Lourenço, Nuno Horta, José M. de la Rosa
2024	—	`conf`	Effective Routing Probability Maps via Convolutional Neural Networks for Analog IC Layout Automation. SMACD Diogo Peneda, Filipe Azevedo, Nuno Lourenço, Nuno Horta, Ricardo Martins
2024	—	`conf`	Ponderous: A Performance-driven Analog IC Placement Optimizer Leveraged by a ML Pipeline. SMACD Ricardo Martins, António Gusmão, Rafael Vieira, Fábio Passos, Nuno Lourenço, Nuno Horta
2023	—	`conf`	A 23.5-32.5GHz, 17dBm PSAT and 37.5% PAE Power Amplifier Synthesized Using an Automated Design Methodology. SMACD Fábio Passos, Nuno Lourenço, Luís Mendes, Ricardo Martins, João Caldinhas Vaz, Nuno Horta
2023	—	`conf`	An ANN-Based Approach to the Modelling and Simulation of Analogue Circuits. SMACD André Amaral, António Gusmão, Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço
2023	J	`jnl`	Behavioral Analysis of Noise and Bandwidth Specifications of Heartbeat Detection Circuits for Ultra Low Power Devices. IEEE Access Rafael Vieira, Fábio Passos, Ricardo Martins, Nuno Horta, Nuno Lourenço
2023	—	`conf`	Design Space Exploration of Single-Stage OTAs towards an Ultra-Low-Power LNA for ECG Signals. SMACD Rafael Vieira, Ricardo Martins, Nuno Horta, Nuno Lourenço
2023	—	`conf`	Efficient Hierarchical mm-Wave System Synthesis with Embedded Accurate Transformer and Balun Machine Learning Models. ASP-DAC Fábio Passos, Nuno Lourenço, Luís Mendes, Ricardo Martins, João Caldinhas Vaz, Nuno Horta
2022	C	`conf`	A Radiation-Hardened Frequency-Locked Loop On-Chip Oscillator with 33.6ppm/°C Stability for Space Applications. ISCAS Fábio Passos, Rafael Vieira, António Canelas, Ricardo Póvoa, Nuno Lourenço, Nuno Horta, Jorge Guilherme
2022	—	`conf`	ANN-based Analog IC Floorplan Recommender with a Broader Topological Constraints Coverage. SMACD Pedro Alves, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
2022	—	`conf`	Accelerating Voltage-Controlled Oscillator Sizing Optimizations with ANN-based Convergence Classifiers and Frequency Guess Predictors. SMACD João Domingues, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
2022	—	`conf`	Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling. SMACD Rafael Vieira, Fábio Passos, Ricardo Povoa, Ricardo Martins, Nuno Horta, Jorge Guilherme, Nuno Lourenço
2022	J	`jnl`	DeepPlacer: A custom integrated OpAmp placement tool using deep models. Appl. Soft Comput. António Gusmão, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins
2022	—	`conf`	Machine Learning Approaches for Transformer Modeling. SMACD Fábio Passos, Nuno C. Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
2022	—	`conf`	Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/°C Temperature Coefficient. SMACD Nuno Lourenço, Fábio Passos, Rafael Vieira, Ricardo Martins, Nuno Horta, Jorge Guilherme, Ricardo Póvoa
2022	C	`conf`	Speeding-Up Complex RF IC Sizing Optimizations with a Process, Voltage and Temperature Corner Performance Estimator based on ANNs. ISCAS Pedro Vaz, António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
2022	J	`jnl`	Surrogate-assisted automatic evolving of dispatching rules for multi-objective dynamic job shop scheduling using genetic programming. Expert Syst. Appl. Yannik Zeiträg, José Rui Figueira, Nuno Horta, Rui Neves
2021	J	`jnl`	Hierarchical Yield-Aware Synthesis Methodology Covering Device-, Circuit-, and System-Level for Radiofrequency ICs. IEEE Access António Canelas, Fábio Passos, Nuno Lourenço, Ricardo Martins, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
2021	A*	`conf`	Late Breaking Results: Attention in Graph2Seq Neural Networks towards Push-Button Analog IC Placement. DAC António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
2021	J	`jnl`	Shortening the gap between pre- and post-layout analog IC performance by reducing the LDE-induced variations with multi-objective simulated quantum annealing. Eng. Appl. Artif. Intell. Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta
2020	J	`jnl`	A Folded Voltage-Combiners Biased Amplifier for Low Voltage and High Energy-Efficiency Applications. IEEE Trans. Circuits Syst. II Express Briefs Ricardo Póvoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Horta, João Goes
2020	J	`jnl`	A new family of CMOS inverter-based OTAs for biomedical and healthcare applications. Integr. Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes
2020	—	`book`	Analog IC Placement Generation via Neural Networks from Unlabeled Data António Gusmão, Nuno Horta, Nuno Lourenço, Ricardo Martins
2020	J	`jnl`	Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools. IEEE Trans. Circuits Syst. Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins
2020	J	`jnl`	Enhancing a Pairs Trading strategy with the application of Machine Learning. Expert Syst. Appl. Simão Moraes Sarmento, Nuno Horta
2020	J	`jnl`	FUZYE: A Fuzzy IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. António Canelas, Ricardo Póvoa, Ricardo Martins, Nuno Lourenço, Jorge Guilherme, João Paulo Carvalho, Nuno Horta
2020	J	`jnl`	Ready-to-Fabricate RF Circuit Synthesis Using a Layout- and Variability-Aware Optimization-Based Methodology. IEEE Access Fábio Passos, Elisenda Roca, Ricardo Martins, Nuno Lourenço, Saiyd Ahyoune, Javier J. Sieiro, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
2020	C	`conf`	Semi-Supervised Artificial Neural Networks towards Analog IC Placement Recommender. ISCAS António Gusmão, Fábio Passos, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins
2020	J	`jnl`	Sub-μW Tow-Thomas based biquad filter with improved gain for biomedical applications. Microelectron. J. Ricardo Póvoa, Richa Arya, António Canelas, Fábio Passos, Ricardo Martins, Nuno Lourenço, Nuno Horta
2019	—	`conf`	A Low Noise CMOS Inverter-Based OTA for and Healthcare Signal Receivers. SMACD Ricardo Póvoa, António Canelas, Ricardo Martins, Nuno Horta, Nuno Lourenço, João Goes
2019	—	`conf`	Artificial Neural Networks as an Alternative for Automatic Analog IC Placement. SMACD Daniel Guerra, António Canelas, Ricardo Póvoa, Nuno Horta, Nuno Lourenço, Ricardo Martins
2019	—	`conf`	Hard and Soft Constraints for Multi-objective Analog IC Sizing Optimization. SMACD Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Póvoa, Nuno Horta, Emmanuel Moutaye
2019	J	`jnl`	Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications. IEEE Trans. Very Large Scale Integr. Syst. Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	Multi-objective framework for cost-effective OTN switch placement using NSGA-II with embedded domain knowledge. Appl. Soft Comput. Daniela Moniz, João Pedro, Nuno Horta, João Pires
2019	—	`conf`	On the Exploration of Design Tradeoffs in Analog IC Placement with Layout-dependent Effects. SMACD Ricardo Martins, Nuno Lourenço, Ricardo Póvoa, Nuno Horta
2019	—	`conf`	Synthesis of mm-Wave circuits using-EM-simulated passive structure libraries. SMACD Fábio Passos, Elisenda Roca, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
2019	J	`jnl`	Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ricardo Martins, Nuno Lourenço, Fábio Passos, Ricardo Povoa, António Canelas, Elisenda Roca, Rafael Castro-López, Javier J. Sieiro, Francisco V. Fernández, Nuno Horta
2019	—	`conf`	Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm. SMACD Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019	—	`conf`	Using Polynomial Regression and Artificial Neural Networks for Reusable Analog IC Sizing. SMACD Nuno Lourenço, Engin Afacan, Ricardo Martins, Fábio Passos, António Canelas, Ricardo Póvoa, Nuno Horta, Günhan Dündar
2018	—	`conf`	11.7b Time-To-Digital Converter with 0.82ps resolution in 130nm CMOS Technology. PRIME Rodrigo Granja, Mauro Santos, Jorge Guilherme, Nuno Horta
2018	—	`conf`	A 20 DB Gain Two-Stage Low-Noise Amplifier with High Yield for 5 GHz Applications. SMACD António Canelas, Ricardo Povoa, Ricardo M. F. Martins, Nuno Lourenço, Jorge Guilherme, Nuno Horta
2018	—	`conf`	An Integrated LC Oscillator with Self Compensation for Frequency Drift and PVT Corners Variations. ICECS Jigme Zangpo, Ricardo Povoa, Jorge Guilherme, Nuno Horta
2018	J	`jnl`	Centralized Unmanned Aerial Vehicle Mesh Network Placement Scheme: A Multi-Objective Evolutionary Algorithm Approach. Sensors Sérgio Sabino, Nuno Horta, António Grilo
2018	J	`jnl`	Combining Support Vector Machine with Genetic Algorithms to optimize investments in Forex markets with high leverage. Appl. Soft Comput. Bernardo Jubert de Almeida, Rui Ferreira Neves, Nuno Horta
2018	J	`jnl`	Currency exchange prediction using machine learning, genetic algorithms and technical analysis. CoRR Gonçalo Abreu, Rui Ferreira Neves, Nuno Horta
2018	—	`conf`	Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications. SMACD Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018	A	`conf`	Enhanced analog and RF IC sizing methodology using PCA and NSGA-II optimization kernel. DATE Tiago Pessoa, Nuno Lourenço, Ricardo Martins, Ricardo Povoa, Nuno Horta
2018	J	`jnl`	Enhanced systematic design of a voltage controlled oscillator using a two-step optimization methodology. Integr. Fábio Passos, Ricardo Martins, Nuno Lourenço, Elisenda Roca, Ricardo Povoa, António Canelas, Rafael Castro-López, Nuno Horta, Francisco V. Fernández
2018	J	`jnl`	Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017. Integr. Giulia Di Capua, Nuno Horta, Francisco V. Fernández, Günhan Dündar, Salvatore Pennisi, Gaetano Palumbo, Massimo Alioto, Gianluca Giustolisi
2018	—	`conf`	Handling the Effects of Variability and Layout Parasitics in the Automatic Synthesis of LNAs. SMACD Fábio Passos, Ricardo Martins, Nuno C. Lourenço, Elisenda Roca, Rafael Castro-López, Ricardo Povoa, António Canelas, Nuno Horta, Francisco V. Fernández
2018	—	`conf`	On the Exploration of Promising Analog IC Designs via Artificial Neural Networks. SMACD Nuno Lourenço, Joao Rosa, Ricardo Martins, Helena Aidos, António Canelas, Ricardo Povoa, Nuno Horta
2018	J	`jnl`	Parallel SAX/GA for financial pattern matching using NVIDIA's GPU. Expert Syst. Appl. João Baúto, António Canelas, Rui Ferreira Neves, Nuno Horta
2018	J	`jnl`	Reinforcement learning applied to Forex trading. Appl. Soft Comput. João Carapuço, Rui Ferreira Neves, Nuno Horta
2018	J	`jnl`	Second-order compensation BGR with low TC and high performance for space applications. Integr. Jonathan Calvillo, Ricardo Póvoa, Jorge Guilherme, Nuno Horta
2018	J	`jnl`	Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving. IEEE Trans. Circuits Syst. II Express Briefs Ricardo Povoa, Nuno Lourenço, Ricardo Martins, António Canelas, Nuno Horta, João Goes
2017	A	`conf`	Automatic technology migration of analog IC designs using generic cell libraries. DATE Jose Cachaco, Nuno Machado, Nuno Lourenço, Jorge Guilherme, Nuno Horta
2017	J	`jnl`	Company event popularity for financial markets using Twitter and sentiment analysis. Expert Syst. Appl. Mariana Daniel, Rui Ferreira Neves, Nuno Horta
2017	—	`conf`	Design of a BGR Suitable for the Space Industry with Performance of 1.25 V with 0.758 ppm/°C TC from - 55° to 125°C. NGCAS Jonathan Calvillo, Jorge Guilherme, Nuno Horta
2017	A	`conf`	Efficient yield optimization method using a variable K-Means algorithm for analog IC sizing. DATE António Canelas, Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta
2017	J	`jnl`	Introduction to the special issue on PRIME 2016 and SMACD 2016. Integr. Nuno Horta, Andrea Baschirotto, Francisco V. Fernández, Günhan Dündar, João Goes, Jorge Fernandes
2017	—	`conf`	Layout-aware challenges and a solution for the automatic synthesis of radio-frequency IC blocks. SMACD Ricardo Martins, Nuno C. Lourenço, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
2017	—	`conf`	New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization. SMACD Nuno C. Lourenço, Ricardo Martins, Ricardo Povoa, António Canelas, Nuno Horta, Fábio Passos, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández
2017	J	`jnl`	Stochastic-based placement template generator for analog IC layout-aware synthesis. Integr. Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
2017	B	`conf`	Using sentiment from Twitter optimized by Genetic Algorithms to predict the stock market. CEC Carlos Simões, Rui Ferreira Neves, Nuno Horta
2016	J	`jnl`	A Novel Approach for Optimization in Dynamic Environments Based on Modified Artificial Fish Swarm Algorithm. Int. J. Comput. Intell. Appl. Danial Yazdani, Alireza Sepas-Moghaddam, Atabak Dehban, Nuno Horta
2016	J	`jnl`	AIDA: Layout-aware analog circuit-level sizing with in-loop layout generation. Integr. Nuno Lourenço, Ricardo Martins, António Canelas, Ricardo Povoa, Nuno Horta
2016	—	`conf`	Automated analog IC design constraints generation for a layout-aware sizing approach. SMACD Andre Ferreira, Nuno Lourenço, Ricardo Martins, Nuno Horta
2016	J	`jnl`	Automatic synthesis of RF front-end blocks using multi-objective evolutionary techniques. Integr. Ricardo Povoa, Ivan Bastos, Nuno Lourenço, Nuno Horta
2016	J	`jnl`	Combining rules between PIPs and SAX to identify patterns in financial markets. Expert Syst. Appl. João Leitão, Rui Ferreira Neves, Nuno Horta
2016	J	`jnl`	Current-flow and current-density-aware multi-objective optimization of analog IC placement. Integr. Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta
2016	J	`jnl`	Design and application of a CMOS active inductor at Ku band based on a multi-objective optimizer. Integr. Mrinalinee Pandey, António Canelas, Ricardo Póvoa, Jorge Alves Torres, João Costa Freire, Nuno Lourenço, Nuno Horta
2016	A	`conf`	Design automation tasks scheduling for enhanced parallel execution of a state-of-the-art layout-aware sizing approach. DATE David Neves, Ricardo Martins, Nuno Lourenço, Nuno Horta
2016	J	`jnl`	Introduction to the special issue on SMACD 2015. Integr. Günhan Dündar, Nuno Horta, Francisco V. Fernández
2016	J	`jnl`	Logarithmic AD Converter With Selectable Transfer Characteristic. IEEE Trans. Circuits Syst. II Express Briefs Mauro Santos, Nuno Horta, Jorge Guilherme
2016	J	`jnl`	Multi-objective kernel mapping and scheduling for morphable many-core architectures. Expert Syst. Appl. Nuno Neves, Rui Neves, Nuno Horta, Pedro Tomás, Nuno Roma
2016	—	`conf`	On-the-fly exploration of placement templates for analog IC layout-aware sizing methodologies. SMACD Ricardo Martins, António Canelas, Nuno Lourenço, Nuno Horta
2016	—	`conf`	SCALES: A high speed simulator tool for pipeline A/D converters. SMACD Carlos Silva, Jorge Guilherme, Nuno Horta
2016	—	`conf`	Yield optimization using k-means clustering algorithm to reduce Monte Carlo simulations. SMACD António Canelas, Ricardo Martins, Ricardo Povoa, Nuno Lourenço, Nuno Horta
2015	J	`jnl`	A hybrid approach to portfolio composition based on fundamental and technical indicators. Expert Syst. Appl. António Silva, Rui Ferreira Neves, Nuno Horta
2015	J	`jnl`	A multi-objective routing algorithm for Wireless Multimedia Sensor Networks. Appl. Soft Comput. Naércio Magaia, Nuno Horta, Rui Ferreira Neves, Paulo Rogério Pereira, Miguel Correia
2015	C	`conf`	A voltage-combiners-biased amplifier with enhanced gain and speed using current starving. ISCAS Ricardo Povoa, Nuno Lourenço, Nuno Horta, João Goes
2015	J	`jnl`	Boosting Trading Strategies performance using VIX indicator together with a dual-objective Evolutionary Computation optimizer. Expert Syst. Appl. José Matias Pinto, Rui Ferreira Neves, Nuno Horta
2015	—	`conf`	Developing Multi-Time Frame Trading Rules with a Trend Following Strategy, using GA. GECCO (Companion) Jaime Machado, Rui Ferreira Neves, Nuno Horta
2015	C	`conf`	Extraction and application of wiring symmetry rules to route analog multiport terminals. ISCAS Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
2015	J	`jnl`	Floorplan-aware analog IC sizing and optimization based on topological constraints. Integr. Nuno Lourenço, António Canelas, Ricardo Povoa, Ricardo Martins, Nuno Horta
2015	A	`conf`	Layout-aware sizing of analog ICs using floorplan & routing estimates for parasitic extraction. DATE Nuno Lourenço, Ricardo Martins, Nuno Horta
2015	J	`jnl`	Multi-objective optimization of analog integrated circuit placement hierarchy in absolute coordinates. Expert Syst. Appl. Ricardo Martins, Nuno Lourenço, Nuno Horta
2015	C	`conf`	Thermal-aware floorplanning and layout generation of MOSFET power stages. ISCAS David Guilherme, João Pereira, Nuno Horta, Jorge Guilherme
2014	—	`conf`	A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner. ICECS Ricardo Povoa, Nuno Lourenço, Nuno Horta, Rui Santos-Tavares, João Goes
2014	—	`conf`	A rad-hard DC-DC converter controller. ICECS Bruno Silva, Nuno Horta, Jorge Guilherme
2014	J	`jnl`	A survey on nonlinear analog-to-digital converters. Integr. Mauro Santos, Nuno Horta, Jorge Guilherme
2014	—	`conf`	Automatic layout generation of power MOSFET transistors in bulk CMOS. ICECS David Guilherme, Nuno Horta, Jorge Guilherme
2014	J	`jnl`	Electromigration-aware analog Router with multilayer multiport terminal structures. Integr. Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
2014	A	`conf`	Electromigration-aware and IR-Drop avoidance routing in analog multiport terminal structures. DATE Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
2014	C	`conf`	LC-VCO automatic synthesis using multi-objective evolutionary techniques. ISCAS Ricardo Povoa, Ricardo Lourenco, Nuno Lourenço, António Canelas, Ricardo Martins, Nuno Horta
2014	—	`conf`	Logarithmic AD conversion using latched comparators and a time-to-digital converter. ICECS Mauro Santos, Nuno Horta, Jorge Guilherme
2014	—	`conf`	Multi-objective Optimization of Investment Strategies - Based on Evolutionary Computation Techniques, in Volatile Environments. ICEIS (1) José Matias Pinto, Rui Ferreira Neves, Nuno Horta
2014	—	`conf`	Portfolio optimization using fundamental indicators based on multi-objective EA. CIFEr António Silva, Rui Ferreira Neves, Nuno Horta
2013	J	`jnl`	A SAX-GA approach to evolve investment strategies on financial markets based on pattern discovery techniques. Expert Syst. Appl. António Canelas, Rui Ferreira Neves, Nuno Horta
2013	B	`conf`	A new metaheuristc combining gradient models with NSGA-II to enhance analog IC synthesis. IEEE Congress on Evolutionary Computation Frederico Rocha, Nuno Lourenço, Ricardo Povoa, Ricardo Martins, Nuno Horta
2013	—	`conf`	Enhancing a Layout-Aware Synthesis Methodology for Analog ICs by Embedding Statistical Knowledge into the Evolutionary Optimization Kernel. DoCEIS Frederico Rocha, Ricardo Martins, Nuno Lourenço, Nuno Horta
2013	J	`jnl`	LAYGEN II - Automatic Layout Generation of Analog Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ricardo Martins, Nuno Lourenço, Nuno Horta
2013	—	`conf`	Multi-dimensional pattern discovery in financial time series using sax-ga with extended robustness. GECCO (Companion) António Canelas, Rui Ferreira Neves, Nuno Horta
2013	B	`conf`	Multi-port multi-terminal analog router based on an evolutionary optimization kernel. IEEE Congress on Evolutionary Computation Ricardo Martins, Nuno Lourenço, António Canelas, Nuno Horta
2013	—	`conf`	Optimizing investment strategies based on companies earnings using genetic algorithms. GECCO (Companion) Jorge Fonseca, Rui Ferreira Neves, Nuno Horta
2013	C	`conf`	Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners. VLSI-SoC Ricardo Povoa, Nuno Lourenço, Nuno Horta, Rui Santos-Tavares, João Goes
2012	A	`conf`	A new SAX-GA methodology applied to investment strategies optimization. GECCO António Canelas, Rui Ferreira Neves, Nuno Horta
2012	—	`conf`	An evolutionary approach to define investment strategies based on macroeconomic indicators and VIX data. GECCO (Companion) Oleksandr Yefimochkin, Rui Ferreira Neves, Nuno Horta
2012	—	`conf`	Automated passive filter design using multi-objective genetic algorithms with variable parameters. GECCO (Companion) José Pinto, Nuno Horta
2012	A	`conf`	GENOM-POF: multi-objective evolutionary synthesis of analog ICs with corners validation. GECCO Nuno Lourenço, Nuno Horta
2012	A	`conf`	LAYGEN II: automatic analog ICs layout generator based on a template approach. GECCO Ricardo Martins, Nuno Lourenço, Nuno Horta
2012	—	`conf`	Solving a Capacitated Exam Timetabling Problem Instance Using a Bi-objective NSGA-II. IJCCI (Selected Papers) Nuno Leite, Rui Ferreira Neves, Nuno Horta, Fernando Melicio, Agostinho C. Rosa
2012	C	`conf`	Solving an Uncapacitated Exam Timetabling Problem Instance using a Hybrid NSGA-II. IJCCI Nuno Leite, Rui Ferreira Neves, Nuno Horta, Fernando Melicio, Agostinho C. Rosa
2011	J	`jnl`	Applying a GA kernel on optimizing technical analysis rules for stock picking and portfolio composition. Expert Syst. Appl. António Gorgulho, Rui Ferreira Neves, Nuno Horta
2011	—	`conf`	Fitness function evaluation for MA trading strategies based on genetic algorithms. GECCO (Companion) José Pinto, Rui Ferreira Neves, Nuno Horta
2011	—	`conf`	Optimal OpAmp sizing based on a fuzzy-genetic kernel. GECCO (Companion) Pedro Sousa, Carla Duarte, Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2011	—	`conf`	Overcurrent detection circuit for integrated class-D amplifiers. ECCTD Frederico Cadete, David Guilherme, Jorge Guilherme, Nuno Horta
2011	B	`conf`	Trading with optimized uptrend and downtrend pattern templates using a genetic algorithm kernel. IEEE Congress on Evolutionary Computation Paulo Parracho, Rui Ferreira Neves, Nuno Horta
2010	—	`conf`	An Innovative GA Optimized Investment Strategy based on a New Technical Indicator using Multiple MAS. IJCCI (ICEC) Adriano Simões, Rui Ferreira Neves, Nuno Horta
2010	J	`jnl`	Analog circuits optimization based on evolutionary computation techniques. Integr. Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2010	—	`conf`	Trading in financial markets using pattern recognition optimized by genetic algorithms. GECCO (Companion) Paulo Parracho, Rui Ferreira Neves, Nuno Horta
2009	—	`conf`	Enhancing analog IC design optimization kernels with simple fuzzy models. ECCTD Pedro Sousa, Carla Duarte, Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2009	A	`conf`	FUGA: a fuzzy-genetic analog circuit optimization kernel. GECCO Pedro Sousa, Carla Duarte, Nuno Horta
2009	J	`jnl`	Reconfigurable multi-mode sigma-delta modulator for 4G mobile terminals. Integr. Artur Silva, Jorge Guilherme, Nuno Horta
2009	—	`conf`	Using GAs to balance technical indicators on stock picking for financial portfolio composition. GECCO (Companion) António Gorgulho, Rui Ferreira Neves, Nuno Horta
2008	C	`conf`	A reconfigurable A/D converter for 4G wireless systems. ISCAS Artur Silva, Nuno Horta, Jorge Guilherme
2008	—	`conf`	Overview of radiation effects and design constraints off fully custom SMPS. APCCAS Mauro Santos, Carlos Pires, Jorge Guilherme, Nuno Horta
2007	—	`conf`	An evolutionary optimization kernel using a dynamic GA-SVM model applied to analog IC design. ECCTD Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2007	—	`conf`	Design of a multimode reconfigurable sigma-delta converter for 4G wireless receivers. ECCTD Artur Silva, Nuno Horta, Jorge Guilherme
2007	—	`conf`	GA-SVM feasibility model and optimization kernel applied to analog IC design automation. ACM Great Lakes Symposium on VLSI Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2006	—	`conf`	AIDA: Analog IC Design Automation based on a Fully Configurable Design Hierarchy and Flow. ICECS Gonçalo Neves, Manuel F. M. Barros, Nuno Horta
2006	—	`conf`	GA-SVM Optimization Kernel applied to Analog IC Design Automation. ICECS Manuel F. M. Barros, Jorge Guilherme, Nuno Horta
2005	—	`conf`	Laygen - An evolutionary approach to automatic analog IC layout generation. ICECS Nuno Lourenço, Nuno Horta
2004	B	`conf`	A Multi-Level Model for Tracking Analysis in E-Learning Platforms. ICALT Rui Luís, David Simões, Nuno Horta
2004	B	`conf`	Enhancing the SCORM Modelling Scope. ICALT David Simões, Rui Luís, Nuno Horta
2004	—	`conf`	Enhancing the SCORM metadata model. WWW (Alternate Track Papers & Posters) David Simões, Rui Luís, Nuno Horta
2003	—	`conf`	A New Approach towards E-Learning Content Standardization and Enhanced Usability. ICWI David Simões, João Redol, Rui Luís, Alberto Carvalho, H. Páscoa, J. Coelho, Paulo Grave, Nuno Horta
2003	B	`conf`	VIANET - A New Web Framework for Distance Learning. ICALT João Redol, David Simões, A. Carvalho, H. Páscoa, J. Coelho, Paulo Grave, Rui Luís, Nuno Horta
2002	—	`conf`	Towards a Framework for Semantic Service Discovery in Ubiquitous P2P Enviroments. International Conference on Internet Computing José Iria, Nuno Horta, Agostinho David
2001	A	`conf`	A Skill-based library for retargetable embedded analog cores. DATE Jingnan Xu, João C. Vital, Nuno Horta
2001	—	`conf`	IC design automation from circuit level optimization to retargetable layout. ICECS Jingnan Xu, J. Serras, M. Oliveira, R. Belo, M. Bugalho, João C. Vital, Nuno Horta, José E. Franca
2000	C	`conf`	Symbolic techniques applied to switched-current ADCs synthesis. ISCAS Nuno Horta, Maria Helena Fino, João Goes
1999	—	`conf`	RAPID-retargetability for reusability of application-driven quadrature D/A interface block design. ICECS José E. Franca, Nuno Horta, M. Pereira, João C. Vital, Rafael Castro-López, Manuel Delgado-Restituto, Francisco V. Fernández, Ángel Rodríguez-Vázquez, J. Ramos, P. Santos