Nripendra N. Biswas

29 papers A* 2A 2Misc 1Journal 23
YearRankTypeTitle / Venue / Authors
1996 Misc conf
Cubical CAMP for minimization of Boolean functions.
VLSI Design
Nripendra N. Biswas, C. Srikanth, James Jacob
1993 — book
Logic design theory.
Nripendra N. Biswas
1992 J jnl
Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures.
IEEE Trans. Computers
Sampalli Srinivas, Nripendra N. Biswas
1990 J jnl
A Reconfigurable Tree Architecture with Multistage Interconnection Network.
IEEE Trans. Computers
Nripendra N. Biswas, Sampalli Srinivas
1990 J jnl
Further Comments on "Detection of Faults in Programmable Logic Arrays".
IEEE Trans. Computers
James Jacob, Nripendra N. Biswas
1990 J jnl
On covering distant minterms by the camp algorithm.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Nripendra N. Biswas
1989 J jnl
An algorithm for multiple output minimization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
B. Gurunath, Nripendra N. Biswas
1988 J jnl
Design of Crosspoint-Irredundant PLA's Using Minimal Number of Control Inputs.
IEEE Trans. Computers
K. S. Ramanatha, Nripendra N. Biswas
1987 J jnl
A centrally controlled shuffle network for reconfigurable and fault-tolerant architecture.
SIGARCH Comput. Archit. News
Nripendra N. Biswas, Sampalli Srinivas, Trishala Dharanendra
1987 J jnl
Simple methods for the calculation of root of a reconfigurable binary tree structure.
Proc. IEEE
Nripendra N. Biswas, S. Srinivas
1986 J jnl
Computer-Aided Minimization Procedure for Boolean Functions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Nripendra N. Biswas
1985 A conf
: A Testable PLA Design with Minimal Hardware and Test Set.
ITC
James Jacob, Nripendra N. Biswas
1985 A* conf
Multiple output minimization.
DAC
Prathima Agrawal, Vishwani D. Agrawal, Nripendra N. Biswas
1985 J jnl
On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors.
IEEE Trans. Computers
Nripendra N. Biswas
1984 A* conf
Computer aided minimization procedure for boolean functions.
DAC
Nripendra N. Biswas
1983 J jnl
A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays.
IEEE Trans. Computers
K. S. Ramanatha, Nripendra N. Biswas
1983 J jnl
An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays.
IEEE Trans. Computers
K. S. Ramanatha, Nripendra N. Biswas
1983 J jnl
On the Minimization of Wordwidth in the Control Memory of a Microprogrammed Digital Computer.
IEEE Trans. Computers
Chamarty D. V. P. Rao, Nripendra N. Biswas
1982 A conf
A Design for Complete Testability of Programmable Logic Arrays.
ITC
K. S. Ramanatha, Nripendra N. Biswas
1981 J jnl
Bit Steering in the Minimization of Control Memory in Microprogrammed Digital Computers.
IEEE Trans. Computers
Ayakannu Mathialagan, Nripendra N. Biswas
1980 J jnl
Optimal Interconnections in the Design of Microprocessors and Digital Systems.
IEEE Trans. Computers
Ayakannu Mathialagan, Nripendra N. Biswas
1979 J jnl
A New Approach to 2-Asummability Testing.
IEEE Trans. Computers
Anil K. Sarje, Nripendra N. Biswas
1977 J jnl
An Algorithm for Testing 2-Asummability of Boolean Functions.
IEEE Trans. Computers
Anil K. Sarje, Nripendra N. Biswas
1976 J jnl
Further Comments on "Closure Partition Method for Minimizing Incomplete Sequential Machines".
IEEE Trans. Computers
C. V. S. Rao, Nripendra N. Biswas
1975 J jnl
Minimization of Incompletely Specified Sequential Machines.
IEEE Trans. Computers
C. V. S. Rao, Nripendra N. Biswas
1974 J jnl
State Minimization of Incompletely Specified Sequential Machines.
IEEE Trans. Computers
Nripendra N. Biswas
1973 J jnl
Comments on "Identification of Totally Symmetric Boolean Functions".
IEEE Trans. Computers
Nripendra N. Biswas
1971 J jnl
Minimization of Boolean Functions.
IEEE Trans. Computers
Nripendra N. Biswas
1970 J jnl
On Identification of Totally Symmetric Boolean Functions.
IEEE Trans. Computers
Nripendra N. Biswas