Norbert Wehn - RankMe

419 papers A* 6A 47B 26C 30Misc 14Journal 112Unranked 178

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	AnaCraft: Duel-Play Probabilistic-Model-Based Reinforcement Learning for Sample-Efficient PVT-Robust Analog Circuit Sizing Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mohsen Ahmadzadeh, Jan Lappas, Norbert Wehn, Georges G. E. Gielen
2026	J	`jnl`	From RTL to Prompt Coding: Empowering the Next Generation of Chip Designers through LLMs. CoRR Lukas Krupp, Matthew Venn, Norbert Wehn
2026	J	`jnl`	Security Risks in Machining Process Monitoring: Sequence-to-Sequence Learning for Reconstruction of CNC Axis Positions. CoRR Lukas Krupp, Rickmar Stahlschmidt, Norbert Wehn
2026	J	`jnl`	Towards a Unified Coding Scheme for 6G. CoRR Paul Bezner, Erdem Eray Cil, Jannis Clausius, Oliver Griebel, Tim Janz, Lucas Johannsen, Claus Kestel, Felix Krieg, Haizheng Li, Jonathan Mandelbaum, Sisi Miao, Marvin Rübenacke, Daniel Tandler, Andreas Zunker, Laurent Schmalen, Norbert Wehn, Stephan ten Brink
2025	—	`conf`	A 15 Gb/s Single-Ended Active-Inductive Equalizer with an Optimized Gain-Enhancing Technique. NewCAS Mohammadreza Esmaeilpour, Marco Mestice, Jan Lappas, Christian Weis, Norbert Wehn
2025	—	`conf`	A 4.266 Gbps/pin LPDDR4X PHY with an Integrated RISC-V Subsystem Optimized for Large Bump Pitch in 12nm FinFET Technology. SOCC Marco Mestice, Johannes Feldmann, Jan Lappas, Mohammadreza Esmaeilpour, Christian Weis, Norbert Wehn
2025	J	`jnl`	A Lightweight PUF-Based Weights Obfuscation Technique for Secure In-Memory AI Inference. IEEE Trans. Circuits Syst. I Regul. Pap. Luca Parrini, Anirban Kar, Benjamin Hettwer, Taha Soliman, Yogesh Singh Chauhan, Hussam Amrouch, Norbert Wehn
2025	—	`conf`	A Mathematical Model for XOR-Based Application Specific DRAM Address Mapping Schemes. MEMSYS Andrei Rotaru, Oliver Bachtler, Lukas Steiner, Matthias Jung, Sven O. Krumke, Norbert Wehn
2025	B	`conf`	Analysis and Mitigation of Radiation Effects in SRAM-based Register Files. ETS Zhe Zhang, Surendra Hemaram, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian
2025	J	`jnl`	CRADLE: Conversational RTL Design Space Exploration with LLM-based Multi-Agent Systems. CoRR Lukas Krupp, Maximilian Schöffel, Elias Biehl, Norbert Wehn
2025	J	`jnl`	Correction: Split'n'Cover: ISO 26,262 Hardware Safety Analysis with SystemC. Int. J. Parallel Program. Lukas Steiner, Kira Kraft, Derek Christ, Denis Uecker, Christian Malek, Matthias Jung, Norbert Wehn
2025	J	`jnl`	DATE on the Edge: On-Site Oil Spill Detection and Thickness Estimation Using Drone-Based Radar Backscattering. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. Bilal Hammoud, Charbel Bou-Mosleh, Norbert Wehn
2025	—	`conf`	DRAMPower 5: An Open-Source Power Simulator for Current Generation DRAM Standards. RAPIDO@HiPEAC Lukas Steiner, Thomas Psota, Marco Mörz, Derek Christ, Matthias Jung, Norbert Wehn
2025	C	`conf`	Design of a Low-Power 4.3 Gb/s Transceiver Using Pre-computed Lookup Tables. DDECS Hussien Abdo, Jan Lappas, Mohammadreza Esmaeilpour, Christian Weis, Norbert Wehn
2025	J	`jnl`	ECNN: A Low-complex, Adjustable CNN for Industrial Pump Monitoring Using Vibration Data. CoRR Jonas Ney, Norbert Wehn
2025	J	`jnl`	Efficient Deep Neural Network Training With a Novel 5.3-Bit Block Floating Point Data Format. IEEE Trans. Circuits Syst. Artif. Intell. Mohammad Hassani Sadi, Chirag Sudarshan, Sani R. Nassif, Norbert Wehn
2025	J	`jnl`	Enhanced LPDDR4X PHY in 12 nm FinFET. CoRR Johannes Feldmann, Jan Lappas, Mohammadreza Esmaeilpour, Hussien Abdo, Christian Weis, Norbert Wehn
2025	J	`jnl`	HLS4PC: A Parametrizable Framework For Accelerating Point-Based 3D Point Cloud Models on FPGA. CoRR Amur Saqib Pal, Muhammad Mohsin Ghaffar, Faisal Shafait, Christian Weis, Norbert Wehn
2025	—	`conf`	HW/SW Implementation of MiRitH on Embedded Platforms. LASCAS Maximilian Schöffel, Hiandra Tomasi, Norbert Wehn
2025	A	`conf`	Improving Chip Design Enablement for Universities in Europe - A Position Paper. DATE Lukas Krupp, Ian O'Connor, Luca Benini, Christoph Studer, Joachim Rodrigues, Norbert Wehn
2025	J	`jnl`	Improving Chip Design Enablement for Universities in Europe - A Position Paper. CoRR Lukas Krupp, Ian O'Connor, Luca Benini, Christoph Studer, Joachim Rodrigues, Norbert Wehn
2025	J	`jnl`	Lessons learned from designing an open-source automated feedback system for STEM education. Educ. Inf. Technol. Steffen Steinert, Lars Krupp, Karina E. Avila, Anke S. Janssen, Verena Ruf, David Dzsotjan, Christian de Schryver, Jakob Karolus, Stefan Ruzika, Karen Joisten, Paul Lukowicz, Jochen Kuhn, Norbert Wehn, Stefan Küchemann
2025	—	`conf`	Low-power, Energy-efficient, Cardiologist-level Atrial Fibrillation Detection for Wearable Devices. SOCC Dominik Marek Loroch, Johannes Feldmann, Vladimir Rybalkin, Norbert Wehn
2025	J	`jnl`	Low-power, Energy-efficient, Cardiologist-level Atrial Fibrillation Detection for Wearable Devices. CoRR Dominik Marek Loroch, Johannes Feldmann, Vladimir Rybalkin, Norbert Wehn
2025	C	`conf`	Machine Learning for Improving Timing Accuracy. ISCAS Mohamed Amine Riahi, Sani R. Nassif, Norbert Wehn
2025	A	`conf`	Multi-Partner Project: Open-Source Design Tools for Co-Development of AI Algorithms and AI Chips: (Initial Stage). DATE Mehdi B. Tahoori, Jürgen Becker, Jörg Henkel, Wolfgang Kunz, Ulf Schlichtmann, Georg Sigl, Jürgen Teich, Norbert Wehn
2025	A	`conf`	Multi-Partner Project: Sustainable Textile Electronics (STELEC). DATE Bo Zhou, Mengxi Liu, Sizhen Bian, Daniel Geißler, Paul Lukowicz, José Miranda, Jonathan Dan, David Atienza, Mohamed Amine Riahi, Norbert Wehn, Russel N. Torah, Sheng Yong, Jidong Liu, Stephen P. Beeby, Magdalena Kohler, Berit Greinke, Junchun Yu, Vincent Nierstrasz, Leila Sheldrick, Rebecca Stewart, Tommaso Nieri, Matteo Maccanti, Daniele S. Spinelli
2025	J	`jnl`	No Scratch Quantum Computing by Reducing Qubit Overhead for Efficient Arithmetics. CoRR Omid Faizy, Norbert Wehn, Paul Lukowicz, Maximilian Kiefer-Emmanouilidis
2025	J	`jnl`	Optimization and Implementation of DRAM-Based Interleavers for Free-Space Optical Communication Beyond 100 Gbit/s. IEEE Access Lukas Steiner, Uwe Wasenmüller, Norbert Wehn
2025	—	`conf`	Performance and Power Analysis of LPDDR6. CCMCC Derek Christ, Lukas Steiner, Thomas Zimmermann, Marco Mörz, Nils Wilbert, Matthias Jung, Norbert Wehn
2025	—	`conf`	Recent Advances on Machine Learning-aided DSP for Short-reach and Long-haul Optical Communications. OFC Laurent Schmalen, Vincent Lauinger, Jonas Ney, Norbert Wehn, Patrick Matalla, Sebastian Randel, Alexander von Bank, Eike-Manuel Edelmann
2025	J	`jnl`	Row-Merged Polar Codes: Analysis, Design, and Decoder Implementation. IEEE Trans. Commun. Andreas Zunker, Marvin Geiselhart, Lucas Johannsen, Claus Kestel, Stephan ten Brink, Timo Vogt, Norbert Wehn
2025	Misc	`conf`	Special Session - Hardware-Software Co-Design for Machine Learning Systems Made Open-Source. CODES+ISSS Mehdi B. Tahoori, Vincent Meyers, Mahboobe Sadeghipour Roodsari, Huashuangyang Xu, Jürgen Becker, Tanja Harbaum, Felix Frombach, Julian Höfer, Georgios Sotiropoulos, Jörg Henkel, Zeynep Demirdag, Heba Khdr, Hassan Nassar, Ulf Schlichtmann, Johannes Geier, Philipp van Kempen, Georg Sigl, Stefan Koegler, Matthias Probst, Jürgen Teich, Frank Hannig, Muhammad Sabih, Batuhan Sesli, Norbert Wehn, Lukas Steiner, Wolfgang Kunz, Mohamed Shelkamy Ali
2025	J	`jnl`	Split'n'Cover: ISO 26262 Hardware Safety Analysis with SystemC. Int. J. Parallel Program. Lukas Steiner, Kira Kraft, Derek Christ, Denis Uecker, Christian Malek, Matthias Jung, Norbert Wehn
2025	J	`jnl`	eFAirWrite: Bringing energy efficient text entry to next generation smart devices. Expert Syst. Appl. Muhammad Mohsin Ghaffar, Ahmad Abdullah, Junaid Younas, Vladimir Rybalkin, Jonas Ney, Paul Lukowicz, Norbert Wehn
2025	—	`conf`	rptu.de/channel-codes: An Update on the Maximum Likelihood Decoding Performance of 5G-NR Channel Codes. ISTC Oliver Griebel, Kira Kraft, Lucas Johannsen, Claus Kestel, Gabriel Machado Dick, Norbert Wehn
2024	—	`conf`	A 10 Gb/s Low-Power Single-Ended Linear Equalizer for DRAM Interfaces. NorCAS Mohammadreza Esmaeilpour, Jan Lappas, Christian Weis, Norbert Wehn
2024	—	`conf`	A 5 Gb/s Low-Power Receiver with a Novel Data Sampling Method for LPDDR Interfaces. NewCAS Mohammadreza Esmaeilpour, Jan Lappas, Hussien Abdo, Christian Weis, Norbert Wehn
2024	C	`conf`	A Low-Power Linear Phase Interpolation-Based Delay Line in 12nm FinFET Technology. VLSI-SoC Mohammadreza Esmaeilpour, Jan Lappas, Christian Weis, Norbert Wehn
2024	A	`conf`	A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication. DATE Lukas Steiner, Timo Lehnigk-Emden, Markus Fehrenz, Norbert Wehn
2024	—	`conf`	A Novel System Simulation Framework for HBM2 FPGA Platforms. SAMOS Hector Gerardo Muñoz Hernandez, Veronia Iskandar, Lukas Steiner, Philipp Holzinger, Matthias Jung, Diana Göhringer, Michael Hübner, Norbert Wehn, Marc Reichenbach
2024	—	`conf`	A Wide-Range Low-Power Phase Interpolation-Based Delay Line with a Linearity Improvement Technique. VLSI-SoC (Selected Papers) Mohammadreza Esmaeilpour, Jan Lappas, Christian Weis, Norbert Wehn
2024	C	`conf`	Achieving High Throughput with a Trainable Neural-Network-Based Equalizer for Communications on FPGA. DSD Jonas Ney, Norbert Wehn
2024	J	`jnl`	Adaptive Sliding Window Decoding of Spatially Coupled Low-Density Parity-Check Codes: Algorithms and Energy Efficient Implementations. IEEE Access Oliver Griebel, Bilal Hammoud, Norbert Wehn
2024	Misc	`conf`	Addressing the Combined Effect of Transistor and Interconnect Aging in SRAM towards Silicon Lifecycle Management. VTS Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian
2024	J	`jnl`	CNN-Based Equalization for Communications: Achieving Gigabit Throughput with a Flexible FPGA Hardware Architecture. CoRR Jonas Ney, Christoph Füllner, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn
2024	—	`conf`	Channel Coding Under Silicon Implementation Constraints. IEEECONF Oliver Griebel, Lucas Johannsen, Claus Kestel, Matthias Herrmann, Norbert Wehn
2024	C	`conf`	Do Radiation and Aging Impact DVFS? TCAD-based Analysis on 22 nm FDSOI Latches. IOLTS Zhe Zhang, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif
2024	—	`conf`	Enabling cell selection optimization for non-traditional CMOS topologies. ISOCC André Lucas Chinazzo, Norbert Wehn, Sani R. Nassif
2024	B	`conf`	Error Detection and Correction Codes for Safe In-Memory Computations. ETS Luca Parrini, Taha Soliman, Benjamin Hettwer, Jan Micha Borrmann, Simranjeet Singh, Ankit Bende, Vikas Rana, Farhad Merchant, Norbert Wehn
2024	J	`jnl`	Error Detection and Correction Codes for Safe In-Memory Computations. CoRR Luca Parrini, Taha Soliman, Benjamin Hettwer, Jan Micha Borrmann, Simranjeet Singh, Ankit Bende, Vikas Rana, Farhad Merchant, Norbert Wehn
2024	C	`conf`	FPGA Onboard Processing of Tiny-ML Models Using Radar-Sensing for Oil Spill Monitoring. IGARSS Bilal Hammoud, Jonas Ney, Charbel Bou-Mosleh, Norbert Wehn
2024	—	`conf`	Fully-blind Neural Network Based Equalization for Severe Nonlinear Distortions in 112 Gbit/s Passive Optical Networks. OFC Vincent Lauinger, Patrick Matalla, Jonas Ney, Norbert Wehn, Sebastian Randel, Laurent Schmalen
2024	J	`jnl`	Fully-blind Neural Network Based Equalization for Severe Nonlinear Distortions in 112 Gbit/s Passive Optical Networks. CoRR Vincent Lauinger, Patrick Matalla, Jonas Ney, Norbert Wehn, Sebastian Randel, Laurent Schmalen
2024	J	`jnl`	HW/SW Implementation of MiRitH on Embedded Platforms. CoRR Maximilian Schöffel, Hiandra Tomasi, Norbert Wehn
2024	J	`jnl`	High Throughput Polar Code Decoders with Information Bottleneck Quantization. CoRR Claus Kestel, Lucas Johannsen, Norbert Wehn
2024	J	`jnl`	High-Throughput Polar Code Decoders with Information Bottleneck Quantization. Entropy Claus Kestel, Lucas Johannsen, Norbert Wehn
2024	J	`jnl`	Lessons Learned from Designing an Open-Source Automated Feedback System for STEM Education. CoRR Steffen Steinert, Lars Krupp, Karina E. Avila, Anke S. Janssen, Verena Ruf, David Dzsotjan, Christian de Schryver, Jakob Karolus, Stefan Ruzika, Karen Joisten, Paul Lukowicz, Jochen Kuhn, Norbert Wehn, Stefan Küchemann
2024	J	`jnl`	Novel adaptive quantization methodology for 8-bit floating-point DNN training. Des. Autom. Embed. Syst. Mohammad Hassani Sadi, Chirag Sudarshan, Norbert Wehn
2024	—	`conf`	PIMSys: A Virtual Prototype for Processing in Memory. MEMSYS Derek Christ, Lukas Steiner, Matthias Jung, Norbert Wehn
2024	C	`conf`	Radar Backscattering Sensitivity to Emulsions Using Spectral Analysis from Nadir-Aerial Response Systems. IGARSS Bilal Hammoud, Norbert Wehn
2024	J	`jnl`	Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications. CoRR Jonas Ney, Patrick Matalla, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn
2024	J	`jnl`	Recent Advances on Machine Learning-aided DSP for Short-reach and Long-haul Optical Communications. CoRR Laurent Schmalen, Vincent Lauinger, Jonas Ney, Norbert Wehn, Patrick Matalla, Sebastian Randel, Alexander von Bank, Eike-Manuel Edelmann
2024	A	`conf`	Testing for aging in advanced SRAM: From front end of the line transistors to back end of the line interconnects. ITC Zhe Zhang, Mahta Mayahinia, Christian Weis, Norbert Wehn, Mehdi B. Tahoori, Sani R. Nassif, Grigor Tshagharyan, Gurgen Harutyunyan, Yervant Zorian
2024	B	`conf`	Timing Analysis beyond Complementary CMOS Logic Styles. ASPDAC Jan Lappas, Mohamed Amine Riahi, Christian Weis, Norbert Wehn, Sani R. Nassif
2024	—	`conf`	Timing Analysis with Analytical Sensitivity. ISOCC Jan Lappas, Norbert Wehn, Sani R. Nassif
2024	J	`jnl`	Trends in Channel Coding for 6G. Proc. IEEE Sisi Miao, Claus Kestel, Lucas Johannsen, Marvin Geiselhart, Laurent Schmalen, Alexios Balatsoukas-Stimming, Gianluigi Liva, Norbert Wehn, Stephan ten Brink
2024	J	`jnl`	Variational Quantum Linear Solver Enhanced Quantum Support Vector Machine. Adv. Artif. Intell. Mach. Learn. Jianming Yi, Kalyani Suresh, Ali Moghiseh, Norbert Wehn
2023	J	`jnl`	A Hybrid Approach combining ANN-based and Conventional Demapping in Communication for Efficient FPGA-Implementation. CoRR Jonas Ney, Bilal Hammoud, Norbert Wehn
2023	C	`conf`	A Learning-Based Approach for Single Event Transient Analysis in Pass Transistor Logic. IOLTS Zhe Zhang, Zhihang Wu, Christian Weis, Norbert Wehn, Mehdi Baradaran Tahoori
2023	J	`jnl`	A Mapping of Triangular Block Interleavers to DRAM for Optical Satellite Communication. CoRR Lukas Steiner, Timo Lehnigk-Emden, Markus Fehrenz, Norbert Wehn
2023	C	`conf`	A Novel Iterative Estimation Technique Using Radar Sensing to Remotely Characterize Oil Slicks During Spills. IGARSS Bilal Hammoud, Norbert Wehn
2023	—	`conf`	A Precise Measurement Platform for LPDDR4 Memories. MEMSYS Johannes Feldmann, Lukas Steiner, Derek Christ, Thomas Psota, Matthias Jung, Norbert Wehn
2023	—	`conf`	Automatic DRAM Subsystem Configuration with irace. DroneSE/RAPIDO@HiPEAC Lukas Steiner, Gustavo Delazeri, Iron Prando da Silva, Matthias Jung, Norbert Wehn
2023	J	`jnl`	Automorphism Ensemble Polar Code Decoders for 6G URLLC. CoRR Claus Kestel, Marvin Geiselhart, Lucas Johannsen, Stephan ten Brink, Norbert Wehn
2023	J	`jnl`	Code-based Cryptography in IoT: A HW/SW Co-Design of HQC. CoRR Maximilian Schöffel, Johannes Feldmann, Norbert Wehn
2023	J	`jnl`	Efficient Hardware Implementation of Constant Time Sampling for HQC. CoRR Maximilian Schöffel, Johannes Feldmann, Norbert Wehn
2023	—	`conf`	Energy-Efficient Decoding of Spatially Coupled Low-Density Parity-Check Codes using Adaptive Window Sizes. ISTC Oliver Griebel, Matthias Herrmann, Bilal Hammoud, Norbert Wehn
2023	—	`conf`	From Algorithm to Implementation: Enabling High-Throughput CNN-Based Equalization on FPGA for Optical Communications. SAMOS Jonas Ney, Christoph Füllner, Vincent Lauinger, Laurent Schmalen, Sebastian Randel, Norbert Wehn
2023	C	`conf`	Oil Spill Detection in Calm Ocean Conditions: A U-Net Model Novel Solution. IGARSS Bilal Hammoud, Charbel Bou-Mosleh, Mohamed Moursi, Norbert Wehn
2023	J	`jnl`	Row-Merged Polar Codes: Analysis, Design and Decoder Implementation. CoRR Andreas Zunker, Marvin Geiselhart, Lucas Johannsen, Claus Kestel, Stephan ten Brink, Timo Vogt, Norbert Wehn
2023	—	`conf`	Successive Cancellation Automorphism List Decoding of Polar Codes. ISTC Lucas Johannsen, Claus Kestel, Marvin Geiselhart, Timo Vogt, Stephan ten Brink, Norbert Wehn
2023	J	`jnl`	Successive Cancellation Automorphism List Decoding of Polar Codes. CoRR Lucas Johannsen, Claus Kestel, Marvin Geiselhart, Timo Vogt, Stephan ten Brink, Norbert Wehn
2023	J	`jnl`	The NWRD Dataset: An Open-Source Annotated Segmentation Dataset of Diseased Wheat Crop. Sensors Hirra Anwar, Saad Ullah Khan, Muhammad Mohsin Ghaffar, Muhammad Fayyaz, Muhammad Jawad Khan, Christian Weis, Norbert Wehn, Faisal Shafait
2023	—	`conf`	Torwards Variability Immune Scalable FeFET-based Macros for IMC DNN Accelerators. ICECS Nellie Laleni, Taha Soliman, Cecilia De la Parra, Franz Müller, Tobias Kirchner, Andre Guntoro, Thomas Kämpfe, Norbert Wehn, T. Jang
2023	—	`conf`	Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation. EuCNC/6G Summit Jonas Ney, Vincent Lauinger, Laurent Schmalen, Norbert Wehn
2023	J	`jnl`	Unsupervised ANN-Based Equalizer and Its Trainable FPGA Implementation. CoRR Jonas Ney, Vincent Lauinger, Laurent Schmalen, Norbert Wehn
2023	J	`jnl`	Variational Quantum Linear Solver enhanced Quantum Support Vector Machine. CoRR Jianming Yi, Kalyani Suresh, Ali Moghiseh, Norbert Wehn
2023	A	`conf`	ZuSE Ki-Avf: Application-Specific AI Processor for Intelligent Sensor Signal Processing in Autonomous Driving. DATE Gia Bao Thieu, Sven Gesper, Guillermo Payá-Vayá, Christoph Riggers, Oliver Renke, Till Fiedler, Jakob Marten, Tobias Stuckenberg, Holger Blume, Christian Weis, Lukas Steiner, Chirag Sudarshan, Norbert Wehn, Lennart M. Reimann, Rainer Leupers, Michael Beyer, Daniel Köhler, Alisa Jauch, Jan Micha Borrmann, Setareh Jaberansari, Tim Berthold, Meinolf Blawat, Markus Kock, Gregor Schewior, Jens Benndorf, Frederik Kautz, Hans-Martin Blüthgen, Christian Sauer
2022	—	`conf`	A Critical Assessment of DRAM-PIM Architectures - Trends, Challenges and Solutions. SAMOS Chirag Sudarshan, Mohammad Hassani Sadi, Lukas Steiner, Christian Weis, Norbert Wehn
2022	—	`ch.`	A Custom Hardware Architecture for the Link Assessment Problem. Algorithms for Big Data André Lucas Chinazzo, Christian de Schryver, Katharina A. Zweig, Norbert Wehn
2022	—	`conf`	A Framework for Formal Verification of DRAM Controllers. MEMSYS Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn
2022	J	`jnl`	A Framework for Formal Verification of DRAM Controllers. CoRR Lukas Steiner, Chirag Sudarshan, Matthias Jung, Dominik Stoffel, Norbert Wehn
2022	—	`conf`	A Hybrid Approach combining ANN-based and Conventional Demapping in Communication for Efficient FPGA-Implementation. IPDPS Workshops Jonas Ney, Bilal Hammoud, Norbert Wehn
2022	C	`conf`	A Maximum A-Posteriori Probabilistic Approach using UAV-Nadir-Looking Wide-Band Radar for Remote Sensing Oil-Spill Detection. IGARSS Bilal Hammoud, Norbert Wehn
2022	J	`jnl`	A Weighted Current Summation Based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference. IEEE J. Emerg. Sel. Topics Circuits Syst. Chirag Sudarshan, Taha Soliman, Jan Lappas, Christian Weis, Mohammad Hassani Sadi, Matthias Jung, Andre Guntoro, Norbert Wehn
2022	—	`conf`	Artificial Neural Networks-Based Radar Remote Sensing to Estimate Geographical Information during Oil-Spills. EUSIPCO Bilal Hammoud, Charbel Bou-Mosleh, Jonas Ney, Norbert Wehn
2022	J	`jnl`	Beyond 100 Gbit/s Pipeline Decoders for Spatially Coupled LDPC Codes. EURASIP J. Wirel. Commun. Netw. Matthias Herrmann, Norbert Wehn
2022	B	`conf`	Blind and Channel-agnostic Equalization Using Adversarial Networks. GLOBECOM Vincent Lauinger, Manuel Hoffmann, Jonas Ney, Norbert Wehn, Laurent Schmalen
2022	J	`jnl`	Blind and Channel-agnostic Equalization Using Adversarial Networks. CoRR Vincent Lauinger, Manuel Hoffmann, Jonas Ney, Norbert Wehn, Laurent Schmalen
2022	—	`conf`	Code-based Cryptography in IoT: A HW/SW Co-Design of HQC. WF-IoT Maximilian Schöffel, Johannes Feldmann, Norbert Wehn
2022	J	`jnl`	DRAMSys4.0: An Open-Source Simulation Framework for In-depth DRAM Analyses. Int. J. Parallel Program. Lukas Steiner, Matthias Jung, Felipe S. Prado, Kirill Bykov, Norbert Wehn
2022	—	`conf`	Efficient Hardware Approximation for Bit-Decomposition Based Deep Neural Network Accelerators. SOCC Taha Soliman, Amro Eldebiky, Cecilia De la Parra, Andre Guntoro, Norbert Wehn
2022	—	`conf`	Exploration of Thermoelectric Energy Harvesting for Secure, TLS-Based Industrial IoT Nodes. ICIOT Frederik Lauer, Maximilian Schöffel, Carl Christian Rheinländer, Norbert Wehn
2022	J	`jnl`	FELIX: A Ferroelectric FET Based Low Power Mixed-Signal In-Memory Architecture for DNN Acceleration. ACM Trans. Embed. Comput. Syst. Taha Soliman, Nellie Laleni, Tobias Kirchner, Franz Müller, Ashish Shrivastava, Thomas Kämpfe, Andre Guntoro, Norbert Wehn
2022	A	`conf`	FPGA-based Trainable Autoencoder for Communication Systems. FPGA Jonas Ney, Sebastian Dörner, Matthias Herrmann, Mohammad Hassani Sadi, Jannis Clausius, Stephan ten Brink, Norbert Wehn
2022	C	`conf`	FeFET versus DRAM based PIM Architectures: A Comparative Study. VLSI-SoC Chirag Sudarshan, Taha Soliman, Thomas Kämpfe, Christian Weis, Norbert Wehn
2022	—	`conf`	Finite-Alphabet Message Passing using only Integer Operations for Highly Parallel LDPC Decoders. SPAWC Tobias Monsees, Dirk Wübben, Armin Dekorsy, Oliver Griebel, Matthias Herrmann, Norbert Wehn
2022	J	`jnl`	Increasing Throughput of In-Memory DNN Accelerators by Flexible Layerwise DNN Approximation. IEEE Micro Cecilia De la Parra, Taha Soliman, Andre Guntoro, Akash Kumar, Norbert Wehn
2022	—	`ch.`	Increasing the Sampling Efficiency for the Link Assessment Problem. Algorithms for Big Data André Lucas Chinazzo, Christian de Schryver, Katharina A. Zweig, Norbert Wehn
2022	—	`conf`	Investigation of Pass Transistor Logic in a 12nm FinFET CMOS Technology. ICECS 2022 André Lucas Chinazzo, Jan Lappas, Christian Weis, Qinhui Huang, Zhihang Wu, Leibin Ni, Norbert Wehn
2022	B	`conf`	Machine learning based soft error rate estimation of pass transistor logic in high-speed communication. ETS Zhe Zhang, Jan Lappas, André Lucas Chinazzo, Christian Weis, Zhihang Wu, Leibin Ni, Norbert Wehn, Mehdi B. Tahoori
2022	J	`jnl`	Minimum-Integer Computation Finite Alphabet Message Passing Decoder: From Theory to Decoder Implementations towards 1 Tb/s. Entropy Tobias Monsees, Oliver Griebel, Matthias Herrmann, Dirk Wübben, Armin Dekorsy, Norbert Wehn
2022	J	`jnl`	Multidimensional Minimum Euclidean Distance Approach Using Radar Reflectivities for Oil Slick Thickness Estimation. Sensors Bilal Hammoud, Georges Daou, Norbert Wehn
2022	C	`conf`	Optimization of DRAM based PIM Architecture for Energy-Efficient Deep Neural Network Training. ISCAS Chirag Sudarshan, Mohammad Hassani Sadi, Christian Weis, Norbert Wehn
2022	A	`conf`	Revisiting Pass-Transistor Logic Styles in a 12nm FinFET Technology Node. DATE Jan Lappas, André Lucas Chinazzo, Christian Weis, ChenYang Xia, Zhihang Wu, Leibin Ni, Norbert Wehn
2022	J	`jnl`	Secure IoT in the Era of Quantum Computers - Where Are the Bottlenecks? Sensors Maximilian Schöffel, Frederik Lauer, Carl Rheinländer, Norbert Wehn
2022	J	`jnl`	Smart Sensors for Augmented Electrical Experiments. Sensors Sebastian Kapp, Frederik Lauer, Fabian Beil, Carl Christian Rheinländer, Norbert Wehn, Jochen Kuhn
2022	—	`conf`	Smart Teaching Materials with Real-Time Augmented Reality Support for Introductory Physics Education. UbiComp/ISWC Adjunct Hamraz Javaheri, Frederik Lauer, Luisa Lauer, Kristin Altmeyer, Roland Brünken, Markus Peschel, Norbert Wehn, Paul Lukowicz
2022	J	`jnl`	Spatially Coupled Serially Concatenated Codes: Performance Evaluation and VLSI Design Tradeoffs. IEEE Trans. Circuits Syst. I Regul. Pap. Mojtaba Mahdavi, Stefan Weithoffer, Matthias Herrmann, Liang Liu, Ove Edfors, Norbert Wehn, Michael Lentmaier
2022	—	`conf`	Towards More Secure PUF Applications: A Low-Area Polar Decoder Implementation. SOCC Claus Kestel, Christoph Frisch, Michael Pehl, Norbert Wehn
2022	—	`conf`	Unveiling the Real Performance of LPDDR5 Memories. MEMSYS Lukas Steiner, Matthias Jung, Michael Huonker, Norbert Wehn
2022	J	`jnl`	Unveiling the Real Performance of LPDDR5 Memories. CoRR Lukas Steiner, Matthias Jung, Michael Huonker, Norbert Wehn
2022	J	`jnl`	When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. ACM Trans. Reconfigurable Technol. Syst. Vladimir Rybalkin, Jonas Ney, Menbere Kina Tekleyohannes, Norbert Wehn
2021	—	`conf`	A 336 Gbit/s Full-Parallel Window Decoder for Spatially Coupled LDPC Codes. EuCNC/6G Summit Matthias Herrmann, Norbert Wehn, Max Thalmaier, Markus Fehrenz, Timo Lehnigk-Emden, Matthias Alles
2021	J	`jnl`	A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation. IEEE Trans. Circuits Syst. II Express Briefs Chirag Sudarshan, Lukas Steiner, Matthias Jung, Jan Lappas, Christian Weis, Norbert Wehn
2021	—	`conf`	A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs. ASP-DAC Chirag Sudarshan, Taha Soliman, Cecilia De la Parra, Christian Weis, Leonardo Ecco, Matthias Jung, Norbert Wehn, Andre Guntoro
2021	Misc	`conf`	ADMM-Based ML Decoding: from Theory to Practice. ICASSP Kira Kraft, Norbert Wehn
2021	—	`conf`	Adaptable Approximation Based on Bit Decomposition for Deep Neural Network Accelerators. AICAS Taha Soliman, Cecilia De la Parra, Andre Guntoro, Norbert Wehn
2021	—	`conf`	An LPDDR4 Safety Model for Automotive Applications. MEMSYS Lukas Steiner, Kira Kraft, Denis Uecker, Matthias Jung, Michael Huonker, Norbert Wehn
2021	Misc	`conf`	Burnt Forest Estimation from Sentinel-2 Imagery of Australia using Unsupervised Deep Learning. DICTA Nosheen Abid, Muhammad Imran Malik, Muhammad Shahzad, Faisal Shafait, Haider Ali, Muhammad Mohsin Ghaffar, Christian Weis, Norbert Wehn, Marcus Liwicki
2021	J	`jnl`	Correction to: Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
2021	—	`conf`	Embedded Face Recognition for Personalized Services in the Assistive Robotics. PKDD/ECML Workshops (1) Iris Walter, Jonas Ney, Tim Hotfilter, Vladimir Rybalkin, Julian Höfer, Norbert Wehn, Jürgen Becker
2021	—	`conf`	Energy Efficient FEC Decoders. ISTC Matthias Herrmann, Claus Kestel, Norbert Wehn
2021	C	`conf`	Exploiting Resiliency for Kernel-Wise CNN Approximation Enabled by Adaptive Hardware Design. ISCAS Cecilia De la Parra, Ahmed El-Yamany, Taha Soliman, Akash Kumar, Norbert Wehn, Andre Guntoro
2021	—	`conf`	Exploration of DDR5 with the Open-Source Simulator DRAMSys. MBMV Lukas Steiner, Matthias Jung, Norbert Wehn
2021	—	`conf`	Forward-Error-Correction for Beyond-5G Ultra-High Throughput Communications. ISTC Norbert Wehn, Onur Sahin, Matthias Herrmann
2021	B	`conf`	HALF: Holistic Auto Machine Learning for FPGAs. FPL Jonas Ney, Dominik Marek Loroch, Vladimir Rybalkin, Nico Weber, Jens Krüger, Norbert Wehn
2021	J	`jnl`	HALF: Holistic Auto Machine Learning for FPGAs. CoRR Jonas Ney, Dominik Marek Loroch, Vladimir Rybalkin, Nico Weber, Jens Krüger, Norbert Wehn
2021	J	`jnl`	Longevity of Commodity DRAMs in Harsh Environments Through Thermoelectric Cooling. IEEE Access Deepak M. Mathew, Hammam Kattan, Christian Weis, Jörg Henkel, Norbert Wehn, Hussam Amrouch
2021	—	`conf`	On the Energy Costs of Post-Quantum KEMs in TLS-based Low-Power Secure IoT. IoTDI Maximilian Schöffel, Frederik Lauer, Carl Christian Rheinländer, Norbert Wehn
2021	—	`conf`	Online Working Set Change Detection with Constant Complexity: The Cornerstone for Memory Management Algorithms in Scalable Systems. MEMSYS L. J. Gokul Vasan, Éder F. Zulian, Christian Weis, Matthias Jung, Norbert Wehn
2021	Misc	`conf`	QuantYOLO: A High-Throughput and Power-Efficient Object Detection Network for Resource and Power Constrained UAVs. DICTA Muhammad Gohar Javed, Minahil Raza, Muhammad Mohsin Ghaffar, Christian Weis, Norbert Wehn, Muhammad Shahzad, Faisal Shafait
2021	—	`conf`	The Dynamic Random Access Memory Challenge in Embedded Computing Systems. A Journey of Embedded and Cyber-Physical Systems Matthias Jung, Christian Weis, Norbert Wehn
2021	—	`conf`	Towards Fully Pipelined Decoding of Spatially Coupled Serially Concatenated Codes. ISTC Mojtaba Mahdavi, Liang Liu, Ove Edfors, Michael Lentmaier, Norbert Wehn, Stefan Weithoffer
2021	J	`jnl`	iDocChip: A Configurable Hardware Accelerator for an End-to-End Historical Document Image Processing. J. Imaging Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Javier Alejandro Varela, Norbert Wehn, Andreas Dengel
2021	J	`jnl`	iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing. Int. J. Parallel Program. Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Javier Alejandro Varela, Norbert Wehn, Andreas Dengel
2020	B	`conf`	A 506Gbit/s Polar Successive Cancellation List Decoder with CRC. PIMRC Claus Kestel, Lucas Johannsen, Oliver Griebel, Jhon Jimenez, Timo Vogt, Timo Lehnigk-Emden, Norbert Wehn
2020	—	`conf`	A Ferroelectric FET Based In-memory Architecture for Multi-Precision Neural Networks. SoCC Taha Soliman, Ricardo Olivo, Tobias Kirchner, Maximilian Lederer, Thomas Kämpfe, Andre Guntoro, Norbert Wehn
2020	—	`conf`	A Low Power In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions. MEMSYS Muhammad Mohsin Ghaffar, Chirag Sudarshan, Christian Weis, Matthias Jung, Norbert Wehn
2020	J	`jnl`	A Reduced-Complexity Projection Algorithm for ADMM-Based LP Decoding. IEEE Trans. Inf. Theory Florian Gensheimer, Tobias Dietz, Kira Kraft, Stefan Ruzika, Norbert Wehn
2020	C	`conf`	Access-Aware Per-Bank DRAM Refresh for Reduced DRAM Refresh Overhead. ISCAS Éder F. Zulian, Christian Weis, Norbert Wehn
2020	B	`conf`	Advanced Hardware Architectures for Turbo Code Decoding Beyond 100 Gb/s. WCNC Stefan Weithoffer, Oliver Griebel, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn
2020	—	`conf`	An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices. MEMSYS Deepak M. Mathew, Felipe S. Prado, Éder F. Zulian, Christian Weis, Muhammad Mohsin Ghaffar, Matthias Jung, Norbert Wehn
2020	B	`conf`	Analysis and Optimization of TLS-based Security Mechanisms for Low Power IoT Systems. CCGRID Frederik Lauer, Carl Christian Rheinländer, Claus Kestel, Norbert Wehn
2020	—	`conf`	DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator. SAMOS Lukas Steiner, Matthias Jung, Felipe S. Prado, Kirill Bykov, Norbert Wehn
2020	—	`conf`	Efficient FeFET Crossbar Accelerator for Binary Neural Networks. ASAP Taha Soliman, Ricardo Olivo, Tobias Kirchner, Cecilia De la Parra, Maximilian Lederer, Thomas Kämpfe, Andre Guntoro, Norbert Wehn
2020	—	`conf`	Efficient Generation of Application Specific Memory Controllers. MEMSYS Marco V. Natale, Matthias Jung, Kira Kraft, Frederik Lauer, Johannes Feldmann, Chirag Sudarshan, Christian Weis, Sven Oliver Krumke, Norbert Wehn
2020	J	`jnl`	Efficient Hardware Architectures for 1D- and MD-LSTM Networks. J. Signal Process. Syst. Vladimir Rybalkin, Chirag Sudarshan, Christian Weis, Jan Lappas, Norbert Wehn, Li Cheng
2020	—	`conf`	FERA: A Framework for Critical Assessment of Execution Monitoring Based Approaches for Finding Concurrency Bugs. SAI (1) Jasmin Jahic, Thomas Bauer, Thomas Kuhn, Norbert Wehn, Pablo Oliveira Antonino
2020	A	`conf`	Fast and Accurate DRAM Simulation: Can we Further Accelerate it? DATE Johannes Feldmann, Kira Kraft, Lukas Steiner, Norbert Wehn, Matthias Jung
2020	Misc	`conf`	Fully Pipelined Iteration Unrolled Decoders the Road to TB/S Turbo Decoding. ICASSP Stefan Weithoffer, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard
2020	J	`jnl`	Harvester-aware transient computing: Utilizing the mechanical inertia of kinetic energy harvesters for a proactive frequency-based power loss detection. Integr. Carl Christian Rheinländer, Norbert Wehn
2020	B	`conf`	Low-complexity Computational Units for the Local-SOVA Decoding Algorithm. PIMRC Stefan Weithoffer, Rami Klaimi, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard
2020	—	`conf`	Multi-Valued Physical Unclonable Functions based on Dynamic Random Access Memory. MEMSYS Sven Müelich, Chirag Sudarshan, Christian Weis, Martin Bossert, Robert F. H. Fischer, Norbert Wehn
2020	J	`jnl`	Real-Time Energy Efficient Hand Pose Estimation: A Case Study. Sensors Mhd Rashed Al Koutayni, Vladimir Rybalkin, Jameel Malik, Ahmed Elhayek, Christian Weis, Gerd Reis, Norbert Wehn, Didier Stricker
2020	—	`conf`	System simulation with PULP virtual platform and SystemC. RAPIDO Éder F. Zulian, Germain Haugou, Christian Weis, Matthias Jung, Norbert Wehn
2020	A	`conf`	TLS-Level Security for Low Power Industrial IoT Network Infrastructures. DATE Jochen Mades, Gerd Ebelt, Boris Janjic, Frederik Lauer, Carl Christian Rheinländer, Norbert Wehn
2020	J	`jnl`	The gem5 Simulator: Version 20.0+. CoRR Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian
2020	A	`conf`	When Massive GPU Parallelism Ain't Enough: A Novel Hardware Architecture of 2D-LSTM Neural Network. FPGA Vladimir Rybalkin, Norbert Wehn
2020	J	`jnl`	eBrainII: a 3 kW Realtime Custom 3D DRAM Integrated ASIC Implementation of a Biologically Plausible Model of a Human Scale Cortex. J. Signal Process. Syst. Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
2019	—	`conf`	A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing. SAMOS Chirag Sudarshan, Jan Lappas, Christian Weis, Deepak M. Mathew, Matthias Jung, Norbert Wehn
2019	J	`jnl`	A Reduced-Complexity Projection Algorithm for ADMM-based LP Decoding. CoRR Florian Gensheimer, Tobias Dietz, Kira Kraft, Stefan Ruzika, Norbert Wehn
2019	—	`conf`	Adaptive Transient Computing for Power-Neutral Embedded Devices. PATMOS Carl Christian Rheinländer, Norbert Wehn
2019	C	`conf`	An In-DRAM Neural Network Processing Engine. ISCAS Chirag Sudarshan, Jan Lappas, Muhammad Mohsin Ghaffar, Vladimir Rybalkin, Christian Weis, Matthias Jung, Norbert Wehn
2019	Misc	`conf`	Channel Models for Physical Unclonable Functions based on DRAM Retention Measurements. REDUNDANCY Sven Müelich, Sebastian Bitzer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Martin Bossert, Robert F. H. Fischer
2019	—	`conf`	Fast validation of DRAM protocols with timed petri nets. MEMSYS Matthias Jung, Kira Kraft, Taha Soliman, Chirag Sudarshan, Christian Weis, Norbert Wehn
2019	A	`conf`	Polar Code Decoder Framework. DATE Timo Lehnigk-Emden, Matthias Alles, Claus Kestel, Norbert Wehn
2019	—	`conf`	RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM. SAMOS Deepak M. Mathew, André Lucas Chinazzo, Christian Weis, Matthias Jung, Bastien Giraud, Pascal Vivet, Alexandre Levisse, Norbert Wehn
2019	—	`conf`	Rapid Identification of Shared Memory in Multithreaded Embedded Systems with Static Scheduling. ICPP Workshops Jasmin Jahic, Varun Kumar, Matthias Jung, Gerhard Wirrer, Norbert Wehn, Thomas Kuhn
2019	A	`conf`	Speculative Temporal Decoupling Using fork(). DATE Matthias Jung, Frank Schnicke, Markus Damm, Thomas Kuhn, Norbert Wehn
2019	—	`conf`	Wednesday Keynote: The Memory Wall: Challenges and Solutions. SoCC Norbert Wehn
2019	J	`jnl`	eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex. CoRR Dimitrios Stathis, Chirag Sudarshan, Yu Yang, Matthias Jung, Syed Mohammad Asad Hassan Jafri, Christian Weis, Ahmed Hemani, Anders Lansner, Norbert Wehn
2019	—	`conf`	iDocChip - A Configurable Hardware Architecture for Historical Document Image Processing: Text Line Extraction. ReConFig Menbere Kina Tekleyohannes, Vladimir Rybalkin, Muhammad Mohsin Ghaffar, Norbert Wehn, Andreas Dengel
2018	—	`conf`	25 Years of Turbo Codes: From Mb/s to beyond 100 Gb/s. ISTC Stefan Weithoffer, Charbel Abdel Nour, Norbert Wehn, Catherine Douillard, Claude Berrou
2018	B	`conf`	A Framework for Non-intrusive Trace-driven Simulation of Manycore Architectures with Dynamic Tracing Configuration. RV Jasmin Jahic, Matthias Jung, Thomas Kuhn, Claus Kestel, Norbert Wehn
2018	—	`conf`	A Low-Complexity Projection Algorithm for ADMM-Based LP Decoding. ISTC Florian Gensheimer, Tobias Dietz, Stefan Ruzika, Kira Kraft, Norbert Wehn
2018	J	`jnl`	A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs. IEEE Des. Test Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian de Schryver, Christian Weis, Norbert Wehn, Katharina Anna Zweig
2018	—	`conf`	A Reconfigurable Accelerator for Morphological Operations. IPDPS Workshops Menbere Kina Tekleyohannes, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist
2018	A	`conf`	An analysis on retention error behavior and power consumption of recent DDR4 DRAMs. DATE Deepak M. Mathew, Martin Schultheis, Carl Christian Rheinländer, Chirag Sudarshan, Christian Weis, Norbert Wehn, Matthias Jung
2018	—	`conf`	BOSMI: a framework for non-intrusive monitoring and testing of embedded multithreaded software on the logical level. SAMOS Jasmin Jahic, Thomas Kuhn, Matthias Jung, Norbert Wehn
2018	—	`conf`	Driving into the memory wall: the role of memory for advanced driver assistance systems and autonomous driving. MEMSYS Matthias Jung, Sally A. McKee, Chirag Sudarshan, Christoph Dropmann, Christian Weis, Norbert Wehn
2018	—	`conf`	Efficient coding scheme for DDR4 memory subsystems. MEMSYS Kira Kraft, Deepak M. Mathew, Chirag Sudarshan, Matthias Jung, Christian Weis, Norbert Wehn, Florian Longnos
2018	B	`conf`	FINN-L: Library Extensions and Design Trade-Off Analysis for Variable Precision LSTM Networks on FPGAs. FPL Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott
2018	J	`jnl`	FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs. CoRR Vladimir Rybalkin, Alessandro Pappalardo, Muhammad Mohsin Ghaffar, Giulio Gambardella, Norbert Wehn, Michaela Blott
2018	—	`conf`	Improved Maximum-Likelihood Decoding Using Sparse Parity-Check Matrices. ICT Florian Gensheimer, Tobias Dietz, Stefan Ruzika, Kira Kraft, Norbert Wehn
2018	A	`conf`	Improving the error behavior of DRAM by exploiting its Z-channel property. DATE Kira Kraft, Chirag Sudarshan, Deepak M. Mathew, Christian Weis, Norbert Wehn, Matthias Jung
2018	J	`jnl`	Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact. CoRR Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn
2018	J	`jnl`	Low-Latency CRC Calculation in Turbo-Code Decoding. Int. J. Wirel. Inf. Networks Stefan Weithoffer, Norbert Wehn
2018	—	`conf`	Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant. DMLE/IOTSTREAMING@PKDD/ECML Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper
2018	J	`jnl`	Sparsity in Deep Neural Networks - An Empirical Investigation with TensorQuant. CoRR Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper
2018	C	`conf`	The Role of Memories in Transprecision Computing. ISCAS Christian Weis, Matthias Jung, Éder F. Zulian, Chirag Sudarshan, Deepak M. Mathew, Norbert Wehn
2018	A	`conf`	The transprecision computing paradigm: Concept, design, and applications. DATE A. Cristiano I. Malossi, Michael Schaffner, Anca Molnos, Luca Gammaitoni, Giuseppe Tagliavini, Andrew P. J. Emerson, Andrés Tomás, Dimitrios S. Nikolopoulos, Eric Flamand, Norbert Wehn
2018	—	`conf`	When Channel Coding Hits the Implementation Wall. ISTC Claus Kestel, Matthias Herrmann, Norbert Wehn
2018	B	`conf`	iDocChip: A Configurable Hardware Architecture for Historical Document Image Processing: Percentile Based Binarization. DocEng Vladimir Rybalkin, Syed Saqib Bukhari, Muhammad Mohsin Ghaffar, Aqib Ghafoor, Norbert Wehn, Andreas Dengel
2017	J	`jnl`	3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems. Int. J. Parallel Program. Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn
2017	—	`conf`	A Bank-Wise DRAM Power Model for System Simulations. RAPIDO Deepak M. Mathew, Éder F. Zulian, Subash Kannoth, Matthias Jung, Christian Weis, Norbert Wehn
2017	J	`jnl`	A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D-Stacked Architecture. J. Signal Process. Syst. Pei Liu, Ahmed Hemani, Kolin Paul, Christian Weis, Matthias Jung, Norbert Wehn
2017	A*	`conf`	A Heterogeneous SDR MPSoC in 28 nm CMOS for Low-Latency Wireless Applications. DAC Sebastian Haas, Tobias Seifert, Benedikt Nöthen, Stefan Scholze, Sebastian Höppner, Andreas Dixius, Esther Pérez Adeva, Thomas R. Augustin, Friedrich Pauls, Sadia Moriam, Mattis Hasler, Erik Fischer, Yong Chen, Emil Matús, Georg Ellguth, Stephan Hartmann, Stefan Schiefer, Love Cederström, Dennis Walter, Stephan Henker, Stefan Hänzsche, Johannes Uhlig, Holger Eisenreich, Stefan Weithoffer, Norbert Wehn, René Schüffny, Christian Mayr, Gerhard P. Fettweis
2017	J	`jnl`	A Platform to Analyze DDR3 DRAM's Power and Retention Time. IEEE Des. Test Matthias Jung, Deepak M. Mathew, Carl Christian Rheinländer, Christian Weis, Norbert Wehn
2017	—	`conf`	A Wearable Flexible Sensor Network Platform for the Analysis of Different Sport Movements. AHFE (24) Marcus Schmidt, Sebastian Wille, Carl Rheinländer, Norbert Wehn, Thomas Jaitner
2017	—	`conf`	A new state model for DRAMs using Petri Nets. SAMOS Matthias Jung, Kira Kraft, Norbert Wehn
2017	—	`conf`	Advanced wireless digital baseband signal processing beyond 100 Gbit/s. SiPS Stefan Weithoffer, Matthias Herrmann, Claus Kestel, Norbert Wehn
2017	A	`conf`	An advanced embedded architecture for connected component analysis in industrial applications. DATE Menbere Tekleyohannes, MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Martin Klein, Michael Siegrist
2017	—	`conf`	Bit-level pipelining for highly parallel turbo-code decoders: A critical assessment. AFRICON Stefan Weithoffer, Kira Kraft, Norbert Wehn
2017	J	`jnl`	DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool. Int. J. Parallel Program. Christian Weis, Abdul Mutaal, Omar Naji, Matthias Jung, Andreas Hansson, Norbert Wehn
2017	—	`conf`	Enhanced decoding for high-rate LTE Turbo-Codes with short block lengths. ICC Workshops Stefan Weithoffer, Norbert Wehn
2017	—	`conf`	Exploiting Decoupled OpenCL Work-Items with Data Dependencies on FPGAs: A Case Study. IPDPS Workshops Javier Alejandro Varela, Norbert Wehn, Qian Liang, Songyin Tang
2017	A	`conf`	Hardware architecture of Bidirectional Long Short-Term Memory Neural Network for Optical Character Recognition. DATE Vladimir Rybalkin, Norbert Wehn, Mohammad Reza Yousefi, Didier Stricker
2017	—	`conf`	Integrating DRAM power-down modes in gem5 and quantifying their impact. MEMSYS Radhika Jagtap, Matthias Jung, Wendy Elsasser, Christian Weis, Andreas Hansson, Norbert Wehn
2017	—	`conf`	Near Real-Time Risk Simulation of Complex Portfolios on Heterogeneous Computing Systems with OpenCL. IWOCL Javier Alejandro Varela, Norbert Wehn
2017	—	`conf`	Real-Time Financial Risk Measurement of Dynamic Complex Portfolios with Python and PyOpenCL. PyHPC@SC Javier Alejandro Varela, Norbert Wehn, Sascha Desmettre, Ralf Korn
2017	—	`conf`	Supervised testing of concurrent software in embedded systems. SAMOS Jasmin Jahic, Thomas Kuhn, Matthias Jung, Norbert Wehn
2017	—	`conf`	System simulation with gem5 and SystemC: The keystone for full interoperability. SAMOS Christian Menard, Jerónimo Castrillón, Matthias Jung, Norbert Wehn
2017	J	`jnl`	TensorQuant - A Simulation Toolbox for Deep Neural Network Quantization. CoRR Dominik Marek Loroch, Norbert Wehn, Franz-Josef Pfreundt, Janis Keuper
2017	—	`conf`	TensorQuant: A Simulation Toolbox for Deep Neural Network Quantization. MLHPC@SC Dominik Marek Loroch, Franz-Josef Pfreundt, Norbert Wehn, Janis Keuper
2017	—	`conf`	The memory challenge in computing systems: A survey. SoCC Norbert Wehn
2017	—	`conf`	The memory challenge in computing systems: A survey. SoCC Norbert Wehn
2017	—	`conf`	Using run-time reverse-engineering to optimize DRAM refresh. MEMSYS Deepak M. Mathew, Éder F. Zulian, Matthias Jung, Kira Kraft, Christian Weis, Bruce L. Jacob, Norbert Wehn
2016	—	`conf`	A New Architecture for High Speed, Low Latency NB-LDPC Check Node Processing for GF(256). VTC Spring Vladimir Rybalkin, Philipp Schläfer, Norbert Wehn
2016	J	`jnl`	A cross layer approach for efficient thermal management in 3D stacked SoCs. Microelectron. Reliab. Matthias Jung, Christian Weis, Norbert Wehn
2016	—	`conf`	A new bank sensitive DRAMPower model for efficient design space exploration. PATMOS Matthias Jung, Deepak M. Mathew, Éder F. Zulian, Christian Weis, Norbert Wehn
2016	—	`conf`	ADMM versus simplex algorithm for LP decoding. ISTC Florian Gensheimer, Stefan Ruzika, Stefan Scholl, Norbert Wehn
2016	—	`conf`	Advanced iterative channel coding schemes: When Shannon meets Moore. ISTC Stefan Scholl, Stefan Weithoffer, Norbert Wehn
2016	—	`conf`	ConGen: An Application Specific DRAM Memory Controller Generator. MEMSYS Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn, Irene Heinrich, Marco V. Natale, Sven O. Krumke
2016	—	`conf`	Efficient reliability management in SoCs - an approximate DRAM perspective. ASP-DAC Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn
2016	A	`conf`	Error resilience and energy efficiency: An LDPC decoder design study. DATE Philipp Schläfer, Chu-Hsiang Huang, Clayton Schoeny, Christian Weis, Yao Li, Norbert Wehn, Lara Dolecek
2016	—	`conf`	Exploring system performance using elastic traces: Fast, accurate and portable. SAMOS Radhika Jagtap, Stephan Diestelhorst, Andreas Hansson, Matthias Jung, Norbert Wehn
2016	—	`conf`	IMU-based determination of fatigue during long sprint. UbiComp Adjunct Marcus Schmidt, Carl Christian Rheinländer, Sebastian Wille, Norbert Wehn, Thomas Jaitner
2016	J	`jnl`	Increasing sampling efficiency for the fixed degree sequence model with phase transitions. Soc. Netw. Anal. Min. Christian Brugger, André Lucas Chinazzo, Alexandre Flores John, Christian de Schryver, Norbert Wehn, Wolfgang Eugen Schlauch, Katharina Anna Zweig
2016	A*	`conf`	Invited - Approximate computing with partially unreliable dynamic random access memory - approximate DRAM. DAC Matthias Jung, Deepak M. Mathew, Christian Weis, Norbert Wehn
2016	—	`conf`	On the applicability of trellis compression to Turbo-Code decoder hardware architectures. ISTC Stefan Weithoffer, Frederic Pohl, Norbert Wehn
2016	—	`conf`	Precise synchronization time stamp generation for Bluetooth low energy. IEEE SENSORS Carl Christian Rheinländer, Norbert Wehn
2016	J	`jnl`	Precision-tuning and hybrid pricer for closed-form solution-based Heston calibration. Concurr. Comput. Pract. Exp. Christian Brugger, Gongda Liu, Christian de Schryver, Norbert Wehn
2016	—	`conf`	Reverse Engineering of DRAMs: Row Hammer with Crosshair. MEMSYS Matthias Jung, Carl Christian Rheinländer, Christian Weis, Norbert Wehn
2016	A	`conf`	Saturated min-sum decoding: An "afterburner" for LDPC decoder hardware. DATE Stefan Scholl, Philipp Schläfer, Norbert Wehn
2015	—	`conf`	A Custom Computing System for Finding Similarties in Complex Networks. ISVLSI Christian Brugger, Valentin Grigorovici, Matthias Jung, Christian Weis, Christian de Schryver, Katharina Anna Zweig, Norbert Wehn
2015	—	`conf`	A high-level DRAM timing, power and area exploration tool. SAMOS Omar Naji, Christian Weis, Matthias Jung, Norbert Wehn, Andreas Hansson
2015	B	`conf`	A new architecture for high throughput, low latency NB-LDPC check node processing. PIMRC Philipp Schläfer, Vladimir Rybalkin, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon
2015	J	`jnl`	Application-aware cross-layer reliability analysis and optimization. it Inf. Technol. Michael Glaß, Hananeh Aliee, Liang Chen, Mojtaba Ebrahimi, Faramarz Khosravi, Veit B. Kleeberger, Alexandra Listl, Daniel Müller-Gritschneder, Fabian Oboril, Ulf Schlichtmann, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis
2015	J	`jnl`	DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework. IPSJ Trans. Syst. LSI Des. Methodol. Matthias Jung, Christian Weis, Norbert Wehn
2015	B	`conf`	Exploiting Phase Transitions for the Efficient Sampling of the Fixed Degree Sequence Model. ASONAM Christian Brugger, André Lucas Chinazzo, Alexandre Flores John, Christian de Schryver, Norbert Wehn, Andreas Spitz, Katharina Anna Zweig
2015	—	`conf`	Exploiting the brownian bridge technique to improve longstaff-schwartz american option pricing on FPGA systems. ReConFig Javier Alejandro Varela, Christian Brugger, Christian de Schryver, Norbert Wehn, Songyin Tang, Steffen Omland
2015	B	`conf`	Latency reduction for LTE/LTE-A turbo-code decoders by on-the-fly calculation of CRC. PIMRC Stefan Weithoffer, Norbert Wehn
2015	—	`conf`	Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs. MEMSYS Matthias Jung, Éder Zulian, Deepak M. Mathew, Matthias Herrmann, Christian Brugger, Christian Weis, Norbert Wehn
2015	—	`conf`	Optimization strategies for portable code for Monte Carlo-based value-at-risk systems. WHPCF@SC Javier Alejandro Varela, Claus Kestel, Christian de Schryver, Norbert Wehn, Sascha Desmettre, Ralf Korn
2015	A	`conf`	Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs. DATE Christian Weis, Matthias Jung, Peter Ehses, Cristiano Santos, Pascal Vivet, Sven Goossens, Martijn Koedam, Norbert Wehn
2015	A	`conf`	Reverse longstaff-schwartz american option pricing on hybrid CPU/FPGA systems. DATE Christian Brugger, Javier Alejandro Varela, Norbert Wehn, Songyin Tang, Ralf Korn
2015	—	`conf`	Syndrome based check node processing of high order NB-LDPC decoders. ICT Philipp Schläfer, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden, Emmanuel Boutillon
2015	—	`conf`	Thermal Aspects and High-Level Explorations of 3D Stacked DRAMs. ISVLSI Christian Weis, Matthias Jung, Omar Naji, Norbert Wehn, Cristiano Santos, Pascal Vivet, Andreas Hansson
2014	J	`jnl`	A Cross-Layer Reliability Design Methodology for Efficient, Dependable Wireless Receivers. ACM Trans. Embed. Comput. Syst. Christina Gimmler-Dumont, Norbert Wehn
2014	—	`conf`	A Wearable Inertial Sensor Unit for Jump Diagnosis in Multiple Athletes. icSPORTS Marcus Schmidt, Thomas Jaitner, Kevin Nolte, Carl Rheinländer, Sebastian Wille, Norbert Wehn
2014	C	`conf`	A new architecture for minimum mean square error sorted QR decomposition for MIMO wireless communication systems. DDECS Victor Tomashevich, Christina Gimmler-Dumont, Christian Fesl, Norbert Wehn, Ilia Polian
2014	B	`conf`	A simplex algorithm for LP decoding hardware. PIMRC Florian Gensheimer, Stefan Ruzika, Stefan Scholl, Norbert Wehn
2014	—	`conf`	A systematic methodology for analyzing closed-form Heston pricer regarding their accuracy and runtime. WHPCF@SC Christian Brugger, Gongda Liu, Christian de Schryver, Norbert Wehn
2014	—	`conf`	Advanced hardware architecture for soft decoding Reed-Solomon codes. ISTC Stefan Scholl, Norbert Wehn
2014	A	`conf`	Connecting different worlds - Technology abstraction for reliability-aware design and Test. DATE Ulf Schlichtmann, Veit Kleeberger, Jacob A. Abraham, Adrian Evans, Christina Gimmler-Dumont, Michael Glaß, Andreas Herkersdorf, Sani R. Nassif, Norbert Wehn
2014	A	`conf`	Energy optimization in 3D MPSoCs with Wide-I/O DRAM using temperature variation aware bank-wise refresh. DATE MohammadSadegh Sadri, Matthias Jung, Christian Weis, Norbert Wehn, Luca Benini
2014	A	`conf`	Exploiting expendable process-margins in DRAMs for run-time performance optimization. DATE Karthik Chandrasekar, Sven Goossens, Christian Weis, Martijn Koedam, Benny Akesson, Norbert Wehn, Kees Goossens
2014	—	`conf`	Feedforward carrier synchronization for pilotless bursts of DVB-RCS2. CSNDSP Imran Ali, Uwe Wasenmüller, Norbert Wehn
2014	A	`conf`	Hardware implementation of a Reed-Solomon soft decoder based on information set decoding. DATE Stefan Scholl, Norbert Wehn
2014	B	`conf`	HyPER: A runtime reconfigurable architecture for monte carlo option pricing in the Heston model. FPL Christian Brugger, Christian de Schryver, Norbert Wehn
2014	—	`conf`	Mixed precision multilevel Monte Carlo on hybrid computing systems. CIFEr Christian Brugger, Christian de Schryver, Norbert Wehn, Steffen Omland, Mario Hefter, Klaus Ritter, Anton Kostiuk, Ralf Korn
2014	Misc	`conf`	Monitoring household activities and user location with a cheap, unobtrusive thermal sensor array. UbiComp Peter Hevesi, Sebastian Wille, Gerald Pirkl, Norbert Wehn, Paul Lukowicz
2014	C	`conf`	Optimized active and power-down mode refresh control in 3D-DRAMs. VLSI-SoC Matthias Jung, Christian Weis, Norbert Wehn, MohammadSadegh Sadri, Luca Benini
2014	—	`conf`	Reliability analysis of MIMO channel preprocessing by fault injection. WiSEE Victor Tomashevich, Christina Gimmler-Dumont, Norbert Wehn, Ilia Polian
2014	J	`jnl`	Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience. Microelectron. Reliab. Andreas Herkersdorf, Hananeh Aliee, Michael Engel, Michael Glaß, Christina Gimmler-Dumont, Jörg Henkel, Veit Kleeberger, Michael A. Kochte, Johannes Maximilian Kühn, Daniel Mueller-Gritschneder, Sani R. Nassif, Holm Rauchfuss, Wolfgang Rosenstiel, Ulf Schlichtmann, Muhammad Shafique, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Christian Weis, Hans-Joachim Wunderlich
2014	A	`conf`	Technology transfer towards Horizon 2020. DATE Rainer Leupers, Norbert Wehn, Marco Roodzant, Johannes Stahl, Luca Fanucci, Albert Cohen, Bernd Janson
2013	J	`jnl`	A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience. IEEE Micro Veit Kleeberger, Christina Gimmler-Dumont, Christian Weis, Andreas Herkersdorf, Daniel Mueller-Gritschneder, Sani R. Nassif, Ulf Schlichtmann, Norbert Wehn
2013	A	`conf`	A multi-level Monte Carlo FPGA accelerator for option pricing in the Heston model. DATE Christian de Schryver, Pedro Torruella, Norbert Wehn
2013	—	`conf`	A new dimension of parallelism in ultra high throughput LDPC decoding. SiPS Philipp Schläfer, Norbert Wehn, Matthias Alles, Timo Lehnigk-Emden
2013	—	`conf`	ASIC implementation of a modified QR decomposition for tree search based MIMO detection. LASCAS Christina Gimmler-Dumont, Philipp Schläfer, Norbert Wehn
2013	—	`conf`	Activity recognition and nutrition monitoring in every day situations with a textile capacitive neckband. UbiComp (Adjunct Publication) Jingyuan Cheng, Bo Zhou, Kai Kunze, Carl Christian Rheinländer, Sebastian Wille, Norbert Wehn, Jens Weppner, Paul Lukowicz
2013	C	`conf`	Code-aided synchronization with QPSK, 8-PSK and 16-QAM modulations. APCC Imran Ali, Uwe Wasenmüller, Norbert Wehn
2013	J	`jnl`	Cross-Layer Error Resilience and Its Application to Wireless Communication Systems. J. Low Power Electron. Christina Gimmler-Dumont, Matthias May, Norbert Wehn
2013	—	`conf`	Energy and performance exploration of accelerator coherency port using Xilinx ZYNQ. FPGAworld MohammadSadegh Sadri, Christian Weis, Norbert Wehn, Luca Benini
2013	J	`jnl`	Exploration and Optimization of 3-D Integrated DRAM Subsystems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Christian Weis, Igor Loi, Luca Benini, Norbert Wehn
2013	—	`conf`	Hardware implementations of Gaussian elimination over GF(2) for channel decoding algorithms. AFRICON Stefan Scholl, Christopher Stumm, Norbert Wehn
2013	—	`conf`	Loopy - An open-source TCP/IP rapid prototyping and validation framework. ReConFig Christian de Schryver, Philipp Schläfer, Norbert Wehn, Thomas Fischer, Arnd Poetzsch-Heffter
2013	J	`jnl`	Performance evaluation of ambient services by combining robotic frameworks and a smart environment platform. Robotics Auton. Syst. Michael Arndt, Sebastian Wille, Luiza de Souza, Vítor Fortes Rey, Norbert Wehn, Karsten Berns
2013	A*	`conf`	Reliable on-chip systems in the nano-era: lessons learnt and future trends. DAC Jörg Henkel, Lars Bauer, Nikil D. Dutt, Puneet Gupta, Sani R. Nassif, Muhammad Shafique, Mehdi Baradaran Tahoori, Norbert Wehn
2013	A	`conf`	System and circuit level power modeling of energy-efficient 3D-stacked wide I/O DRAMs. DATE Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
2013	—	`conf`	TLM modelling of 3D stacked wide I/O DRAM subsystems: a virtual platform for memory controller design space exploration. RAPIDO Matthias Jung, Christian Weis, Norbert Wehn, Karthik Chandrasekar
2013	A*	`conf`	Towards variation-aware system-level power estimation of DRAMs: an empirical approach. DAC Karthik Chandrasekar, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
2012	—	`conf`	A 2.15GBit/s turbo code decoder for LTE advanced base station applications. ISTC Thomas Ilnseher, Frank Kienle, Christian Weis, Norbert Wehn
2012	—	`conf`	A Case Study on Error Resilient Architectures for Wireless Communication. ARCS Christian Brehm, Matthias May, Christina Gimmler, Norbert Wehn
2012	J	`jnl`	A Hardware Efficient Random Number Generator for Nonuniform Distributions with Arbitrary Precision. Int. J. Reconfigurable Comput. Christian de Schryver, Daniel Schmidt, Norbert Wehn, Elke Korn, Henning Marxen, Anton Kostiuk, Ralf Korn
2012	—	`conf`	A High-Performance FPGA-Based Implementation of the LZSS Compression Algorithm. IPDPS Workshops Ivan Shcherbakov, Christian Weis, Norbert Wehn
2012	B	`conf`	A Parallel Adaptive Range Coding Compressor: Algorithm, FPGA Prototype, Evaluation. DCC Ivan Shcherbakov, Norbert Wehn
2012	Misc	`conf`	ASIC design of a Gbit/s LDPC decoder for iterative MIMO systems. ICNC Christina Gimmler, Frank Kienle, Christian Weis, Norbert Wehn, Matthias Alles
2012	A	`conf`	An energy efficient DRAM subsystem for 3D integrated SoCs. DATE Christian Weis, Igor Loi, Luca Benini, Norbert Wehn
2012	Misc	`conf`	Combining robotic frameworks with a smart environment framework: MCA2/SimVis3D and TinySEP. UbiComp Michael Arndt, Karsten Berns, Sebastian Wille, Norbert Wehn, Luiza de Souza
2012	A	`conf`	DRAM selection and configuration for real-time mobile systems. DATE Manil Dev Gomony, Christian Weis, Benny Akesson, Norbert Wehn, Kees Goossens
2012	B	`conf`	Dependable embedded systems: The German research foundation DFG priority program SPP 1500. ETS Jörg Henkel, Oliver Bringmann, Andreas Herkersdorf, Wolfgang Rosenstiel, Norbert Wehn
2012	J	`jnl`	Design Space of Flexible Multigigabit LDPC Decoders. VLSI Design Philipp Schläfer, Christian Weis, Norbert Wehn, Matthias Alles
2012	—	`conf`	FPGA-based rapid prototyping platform for MIMO-BICM design space exploration. ReConFig Christina Gimmler-Dumont, Philipp Schläfer, Norbert Wehn
2012	C	`conf`	Reliability study on system memories of an iterative MIMO-BICM system. VLSI-SoC Christina Gimmler-Dumont, Christian Brehm, Norbert Wehn
2011	—	`conf`	A monolithic LTE interleaver generator for highly parallel SMAP decoders. WTS Thomas Ilnseher, Matthias May, Norbert Wehn
2011	—	`conf`	A scalable multi-ASIP architecture for standard compliant trellis decoding. ISOCC Christian Brehm, Thomas Ilnseher, Norbert Wehn
2011	—	`conf`	Algorithmic complexity in the heston model: an implementation view. WHPCF@SC Henning Marxen, Anton Kostiuk, Ralf Korn, Christian de Schryver, Stephan Wurm, Ivan Shcherbakov, Norbert Wehn
2011	—	`conf`	An Energy Efficient FPGA Accelerator for Monte Carlo Option Pricing with the Heston Model. ReConFig Christian de Schryver, Ivan Shcherbakov, Frank Kienle, Norbert Wehn, Henning Marxen, Anton Kostiuk, Ralf Korn
2011	C	`conf`	Bringing C++ productivity to VHDL world: From language definition to a case study. FDL Ivan Shcherbakov, Christian Weis, Norbert Wehn
2011	Misc	`conf`	Design and architectures for dependable embedded systems. CODES+ISSS Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich
2011	A	`conf`	Design space exploration for 3D-stacked DRAMs. DATE Christian Weis, Norbert Wehn, Igor Loi, Luca Benini
2011	—	`conf`	Energy Efficient Acceleration and Evaluation of Financial Computations towards Real-Time Pricing. KES (4) Christian de Schryver, Matthias Jung, Norbert Wehn, Henning Marxen, Anton Kostiuk, Ralf Korn
2011	J	`jnl`	On Complexity, Energy- and Implementation-Efficiency of Channel Decoders. IEEE Trans. Commun. Frank Kienle, Norbert Wehn, Heinrich Meyr
2011	—	`conf`	Reliability: A Cross-Disciplinary and Cross-Layer Approach. Asian Test Symposium Norbert Wehn
2011	C	`conf`	Validation of channel decoding ASIPs a case study. International Symposium on Rapid System Prototyping Christian Brehm, Norbert Wehn, Sacha Loitz, Wolfgang Kunz
2010	A	`conf`	A 150Mbit/s 3GPP LTE Turbo code decoder. DATE Matthias May, Thomas Ilnseher, Norbert Wehn, Wolfgang Raab
2010	—	`conf`	A 477mW NoC-based digital baseband for MIMO 4G SDR. ISSCC Fabien Clermidy, Christian Bernard, Romain Lemaire, Jérôme Martin, Ivan Miro Panades, Yvain Thonnart, Pascal Vivet, Norbert Wehn
2010	—	`conf`	A New Hardware Efficient Inversion Based Random Number Generator for Non-uniform Distributions. ReConFig Christian de Schryver, Daniel Schmidt, Norbert Wehn, Elke Korn, Henning Marxen, Ralf Korn
2010	A	`conf`	A rapid prototyping system for error-resilient multi-processor systems-on-chip. DATE Matthias May, Norbert Wehn, Abdelmajid Bouajila, Johannes Zeppenfeld, Walter Stechele, Andreas Herkersdorf, Daniel Ziener, Jürgen Teich
2010	J	`jnl`	A separation algorithm for improved LP-decoding of linear block codes. IEEE Trans. Inf. Theory Akin Tanatmis, Stefan Ruzika, Horst W. Hamacher, Mayur Punekar, Frank Kienle, Norbert Wehn
2010	C	`conf`	AmICA - A Flexible, Compact, Easy-to-Program and Low-Power WSN Platform. MobiQuitous Sebastian Wille, Norbert Wehn, Ivan Martinovic, Simon Kunz, Peter Göhner
2010	C	`conf`	Complete Verification of Weakly Programmable IPs against Their Operational ISA Model. FDL Sacha Loitz, Markus Wedler, Dominik Stoffel, Christian Brehm, Norbert Wehn, Wolfgang Kunz
2010	—	`book`	Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications. Dynamically Reconfigurable Systems Marco Platzner, Jürgen Teich, Norbert Wehn
2010	—	`ch.`	FlexiChaP: A Dynamically Reconfigurable ASIP for Channel Decoding for Future Mobile Systems. Dynamically Reconfigurable Systems Matthias Alles, Timo Vogt, Christian Brehm, Norbert Wehn
2010	C	`conf`	Fully integrated UWB impulse transmitter and 402-to-405MHz super-regenerative receiver for medical implant devices. ISCAS Muhammad Anis, Maurits Ortmanns, Norbert Wehn
2010	—	`conf`	Implementation comparisons of the QR decomposition for MIMO detection. SBCCI Gabriel Luca Nazar, Christina Gimmler, Norbert Wehn
2010	B	`conf`	Low-complexity iteration control for MIMO-BICM systems. PIMRC Christina Gimmler, Timo Lehnigk-Emden, Norbert Wehn
2010	J	`jnl`	On Complexity, Energy- and Implementation-Efficiency of Channel Decoders CoRR Frank Kienle, Norbert Wehn, Heinrich Meyr
2010	—	`conf`	RF spectrum sensing technique for cognitive UWB radio network. ESSCIRC Muhammad Anis, Maurits Ortmanns, Norbert Wehn
2009	A	`conf`	A novel LDPC decoder for DVB-S2 IP. DATE Stefan Müller, Manuel Schreger, Marten Kabutz, Matthias Alles, Frank Kienle, Norbert Wehn
2009	—	`conf`	DRAM power management and energy consumption: a critical assessment. SBCCI Daniel Schmidt, Norbert Wehn
2009	J	`jnl`	Energy simulation of embedded XScale systems with XEEMU. J. Embed. Comput. Zoltán Herczeg, Daniel Schmidt, Ákos Kiss, Norbert Wehn, Tibor Gyimóthy
2009	A	`conf`	Error correction in single-hop wireless sensor networks - A case study. DATE Daniel Schmidt, Matthias Berning, Norbert Wehn
2009	B	`conf`	Valid inequalities for binary linear codes. ISIT Stefan Ruzika, Akin Tanatmis, Frank Kienle, Horst W. Hamacher, Norbert Wehn, Mayur Punekar
2008	C	`conf`	3.1-to-7GHz UWB impulse radio transceiver front-end based on statistical correlation technique. ISCAS Muhammad Anis, Reinhard Tielert, Norbert Wehn
2008	A	`conf`	A Case Study in Reliability-Aware Design: A Resilient LDPC Code Decoder. DATE Matthias May, Matthias Alles, Norbert Wehn
2008	J	`jnl`	A Reconfigurable ASIP for Convolutional and Turbo Decoding in an SDR Environment. IEEE Trans. Very Large Scale Integr. Syst. Timo Vogt, Norbert Wehn
2008	A	`conf`	A Reconfigurable Application Specific Instruction Set Processor for Convolutional and Turbo Decoding in a SDR Environment. DATE Timo Vogt, Norbert Wehn
2008	J	`jnl`	A Separation Algorithm for Improved LP-Decoding of Linear Block Codes CoRR Akin Tanatmis, Stefan Ruzika, Horst W. Hamacher, Mayur Punekar, Frank Kienle, Norbert Wehn
2008	B	`conf`	Application-specific reconfigurable processors. FPL Heiko Hinkelmann, Peter Zipf, Manfred Glesner, Matthias Alles, Timo Vogt, Norbert Wehn, Götz Kappen, Tobias G. Noll
2008	—	`conf`	Cognitive Radio Prototyping. CrownCom Peter Jung, Alexander Vießmann, Christoph Spiegel, Admir Burnic, Zijian Bai, Guido Horst Bruck, Konstantin Statnikov, Andreas Waadt, Shangbo Wang, Xavier Popon, Rafael Rodriguez Velilla, Harri Saarnisaari, Matthias Alles, Torben Brack, Frank Kienle, Friedbert Berens, Salvatore Rotolo, Fabio Mario Scalise, Norbert Wehn
2008	J	`jnl`	Designing efficient irregular networks for heterogeneous systems-on-chip. J. Syst. Archit. Christian Neeb, Norbert Wehn
2008	—	`conf`	Fully integrated self-quenched super-regenerative UWB impulse detector. ISWPC Muhammad Anis, Reinhard Tielert, Norbert Wehn
2008	—	`conf`	Macro Interleaver Design for Bit Interleaved Coded Modulation with Low-Density Parity-Check Codes. VTC Spring Frank Kienle, Norbert Wehn
2008	—	`conf`	Proving Functional Correctness of Weakly Programmable IPs - A Case Study with Formal Property Checking. SASP Sacha Loitz, Markus Wedler, Christian Brehm, Timo Vogt, Norbert Wehn, Wolfgang Kunz
2008	—	`conf`	Super-regenerative UWB impulse detector with synchronized quenching mechanism. ESSCIRC Muhammad Anis, Reinhard Tielert, Norbert Wehn
2007	—	`conf`	A Reliability-Aware LDPC Code Decoding Algorithm. VTC Spring Matthias Alles, Torben Brack, Norbert Wehn
2007	—	`conf`	A Survey on LDPC Codes and Decoders for OFDM-based UWB Systems. VTC Spring Torben Brack, Matthias Alles, Timo Lehnigk-Emden, Frank Kienle, Norbert Wehn, Friedbert Berens, Andreas Ruegg
2007	C	`conf`	Evaluation of High Throughput Turbo-Decoder Architectures. ISCAS Matthias May, Christian Neeb, Norbert Wehn
2007	B	`conf`	Implementation Issues of Turbo Synchronization with Duo-Binary Turbo Decoding. PIMRC Matthias Alles, Timo Lehnigk-Emden, Uwe Wasenmüller, Norbert Wehn
2007	A	`conf`	Low complexity LDPC code decoders for next generation standards. DATE Torben Brack, Matthias Alles, Timo Lehnigk-Emden, Frank Kienle, Norbert Wehn, Nicola E. L'Insalata, Francesco Rossi, Massimo Rovini, Luca Fanucci
2007	—	`conf`	XEEMU: An Improved XScale Power Simulator. PATMOS Zoltán Herczeg, Ákos Kiss, Daniel Schmidt, Norbert Wehn, Tibor Gyimóthy
2006	—	`conf`	A Reconfigurable Applcation Specific Instruction Set Processor for Viterbi and Log-MAP Decoding. SiPS Timo Vogt, Norbert Wehn
2006	—	`conf`	A Reconfigurable Multi-Processor Platform for Convolutional and Turbo Decoding. ReCoSoC Timo Vogt, Christian Neeb, Norbert Wehn
2006	—	`conf`	A Reconfigurable Outer Modem Platform for Future Communications Systems. Dynamically Reconfigurable Architectures Norbert Wehn, Timo Vogt, Christian Neeb
2006	B	`conf`	A Synthesizable IP Core for WIMAX 802.16E LDPC Code Decoding. PIMRC Torben Brack, Matthias Alles, Frank Kienle, Norbert Wehn
2006	—	`conf`	Advanced Channel Decoding Algorithms and Their Implementation for Future Communication Systems. ISVLSI Norbert Wehn
2006	C	`conf`	Designing Efficient Irregular Networks for Heterogeneous Systems-on-Chip. DSD Christian Neeb, Norbert Wehn
2006	A	`conf`	Disclosing the LDPC code decoder design space. DATE Torben Brack, Frank Kienle, Norbert Wehn
2006	—	`conf`	Fast convergence algorithm for LDPC Codes. VTC Spring Frank Kienle, Timo Lehnigk-Emden, Norbert Wehn
2005	J	`jnl`	A Scalable System Architecture for High-Throughput Turbo-Decoders. J. VLSI Signal Process. Michael J. Thul, Frank Gilbert, Timo Vogt, Gerd Kreiselmaier, Norbert Wehn
2005	A	`conf`	A Synthesizable IP Core for DVB-S2 LDPC Code Decoding. DATE Frank Kienle, Torben Brack, Norbert Wehn
2005	J	`jnl`	Architecture-driven voltage scaling for high-throughput turbo-decoders. J. Embed. Comput. Frank Gilbert, Timo Vogt, Norbert Wehn
2005	—	`conf`	Energieminimierung von Basisbandsignalverarbeitungsalgorithmen auf programmierbaren Plattformen. GI Jahrestagung (1) Christian Neeb, Norbert Wehn
2005	—	`conf`	Network-on-chip-centric approach to interleaving in high throughput channel decoders. ISCAS (2) Christian Neeb, Michael J. Thul, Norbert Wehn
2005	—	`conf`	Power Optimization in advanced Channel Coding. Power-aware Computing Systems Norbert Wehn
2004	—	`conf`	A multi-standard channel-decoder for base-station applications. SBCCI Timo Vogt, Norbert Wehn, Philippe Alves
2004	A	`conf`	Channel Decoder Architecture for 3G Mobile Wireless Terminals. DATE Friedbert Berens, Gerd Kreiselmaier, Norbert Wehn
2004	—	`conf`	Design methodology for IRA codes. ASP-DAC Frank Kienle, Norbert Wehn
2004	—	`conf`	Energy- and Area-Efficient Deinterleaving Architecture for High-Throughput Wireless Applications. PATMOS Armin Wellig, Julien Zory, Norbert Wehn
2004	—	`conf`	FPGA implementation of parallel turbo-decoders. SBCCI Michael J. Thul, Norbert Wehn
2004	—	`conf`	Joint graph-decoder design of IRA codes on scalable architectures [LDPC codes]. ICASSP (4) Frank Kienle, Norbert Wehn
2003	—	`conf`	Architecture-Driven Voltage Scaling for High-Throughput Turbo-Decoders. PATMOS Frank Gilbert, Norbert Wehn
2003	A	`conf`	Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors . DATE Frank Gilbert, Michael J. Thul, Norbert Wehn
2003	—	`conf`	Concurrent interleaving architectures for high-throughput channel coding. ICASSP (2) Michael J. Thul, Frank Gilbert, Norbert Wehn
2003	—	`book`	Embedded Software for SoC Embedded Software for SoC Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest, Norbert Wehn
2003	J	`jnl`	System-on-Chip - Ein Sonderheft anlässlich des 60. Geburtstages von Prof. Dr. Dr. h.c. mult. Manfred Glesner. it Inf. Technol. Norbert Wehn
2003	—	`conf`	VLSI-implementation issues of turbo trellis-coded modulation. ICASSP (2) Frank Kienle, Gerd Kreiselmaier, Norbert Wehn
2003	J	`jnl`	Vergleich von Hardware- und Software-Implementierungen in der digitalen Kommunikation am Beispiel der Kanalcodierung (Hardware-/Software Trade-Offs in Digital Communication Systems with Special Emphasis on Channel-Coding). it Inf. Technol. Norbert Wehn
2002	—	`conf`	Combined Turbo and Convolutional Decoder Architecture for UMTS Wireless Applications. SBCCI Gerd Kreiselmaier, Timo Vogt, Norbert Wehn, Friedbert Berens
2002	—	`conf`	Enabling high-speed turbo-decoding through concurrent interleaving. ISCAS (1) Michael J. Thul, Norbert Wehn, L. P. Rao
2002	Misc	`conf`	Evaluation of algorithm optimizations for low-power Turbo-Decoder implementations. ICASSP Michael J. Thul, Timo Vogt, Frank Gilbert, Norbert Wehn
2002	A	`conf`	Hardware/Software Trade-Offs for Advanced 3G Channel Coding. DATE Heiko Michel, Alexander Worm, Norbert Wehn, Michael Münch
2002	—	`conf`	Optimized concurrent interleaving architecture for high-throughput turbo-decoding. ICECS Michael J. Thul, Frank Gilbert, Norbert Wehn
2001	A	`conf`	Design of low-power high-speed maximum a priori decoder architectures. DATE Alexander Worm, Holger Lamm, Norbert Wehn
2001	J	`jnl`	Embedded DRAM Development: Technology, Physical Design, and Application Issues. IEEE Des. Test Comput. Doris Keitel-Schulz, Norbert Wehn
2001	Misc	`conf`	Embedded Memories in System Design: Technology, Application, Design and Tools. VLSI Design Doris Keitel-Schulz, Norbert Wehn, Francky Catthoor, Preeti Ranjan Panda
2001	—	`conf`	Low power implementation of a turbo-decoder on programmable architectures. ASP-DAC Frank Gilbert, Alexander Worm, Norbert Wehn
2001	J	`jnl`	Turbo-decoder quantization for UMTS. IEEE Commun. Lett. Heiko Michel, Norbert Wehn
2001	Misc	`conf`	Vlsi Architectures For High-Speed Map Decoders. VLSI Design Alexander Worm, Holger Lamm, Norbert Wehn
2000	A	`conf`	Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths. DATE Michael Münch, Norbert Wehn, Bernd Wurth, Renu Mehra, Jim Sproch
2000	J	`jnl`	Turbo-decoding without SNR estimation. IEEE Commun. Lett. Alexander Worm, Peter A. Hoeher, Norbert Wehn
1998	A	`conf`	Embedded DRAM Architectural Trade-Offs. DATE Norbert Wehn, Søren Hein
1998	—	`conf`	Issues in Embedded DRAM Development and Applications. ISSS Doris Keitel-Schulz, Norbert Wehn
1997	J	`jnl`	An efficient ILP-based scheduling algorithm for control-dominated VHDL descriptions. ACM Trans. Design Autom. Electr. Syst. Michael Münch, Norbert Wehn, Manfred Glesner
1996	—	`conf`	An Efficient ILP-Based Scheduling Algorithm for Control-Dominated VHDL Descriptions. ISSS Michael Münch, Manfred Glesner, Norbert Wehn
1995	B	`conf`	Advanced Method for Industry Related Education with an FPGA Design Self-Learning Kit. FPL U. Zahm, Thomas Hollstein, Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner
1994	—	`conf`	Efficient Calculation of Boolean Relations for Multi-Level Logic Optimization. EDAC-ETC-EUROASIC Bernd Wurth, Norbert Wehn
1994	—	`conf`	Scheduling of behavioral VHDL by retiming techniques. EURO-DAC Norbert Wehn, Jörg Biesenack, Peter Duzy, T. Langmaier, Michael Münch, Michael Pilsl, Steffen Rumler
1994	J	`jnl`	The Hyeti Defect Tolerant Microprocessor: A Practical Experiment and its Cost-Effectiveness Analysis. IEEE Trans. Computers Régis Leveugle, Zahava Koren, Israel Koren, Gabriele Saucier, Norbert Wehn
1993	—	`conf`	Estimating lower hardware bounds in high-level synthesis. VLSI Norbert Wehn, Manfred Glesner, C. Vielhauer
1993	—	`conf`	Synthesis of complex VHDL operators. EURO-DAC Michael Gasteier, Norbert Wehn, Manfred Glesner
1993	J	`jnl`	The Siemens high-level synthesis system CALLAS. IEEE Trans. Very Large Scale Integr. Syst. Jörg Biesenack, Michael Koster, Anton Langmaier, Stephane Ledeux, Sabine März, Michael Payer, Michael Pilsl, Steffen Rumler, Holger Soukup, Norbert Wehn, Peter Duzy
1992	—	`conf`	Data Part Optimizations in the CALLAS Synthesis Environment. Synthesis for Control Dominated Circuits Jörg Biesenack, Norbert Wehn, A. Stoll, Michael Payer
1992	—	`conf`	High-level synthesis in a rapid-prototype environment for mechatronic systems. EURO-DAC Norbert Wehn, Hans-Jürgen Herpel, Thomas Hollstein, Peter Poechmueller, Manfred Glesner
1991	—	`conf`	A New Approach to Multiplexer Minimisation in the CALLAS Synthesis Environment. VLSI Norbert Wehn, Jörg Biesenack, Michael Pilsl
1991	—	`conf`	A VLSI System Design for the Control of High Performance Combustion Engines. VLSI Andreas Laudenbach, Manfred Glesner, Norbert Wehn
1991	—	`conf`	A new approach to timing driven partitioning of combinational logic. Great Lakes Symposium on VLSI Norbert Wehn, Manfred Glesner
1991	—	`conf`	HADES-high-level architecture development and exploration system. Great Lakes Symposium on VLSI Peter Poechmueller, Michael Held, Norbert Wehn, Manfred Glesner
1991	C	`conf`	RAMSES-a rapid prototyping environment for embedded control applications. RSP Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner
1991	—	`conf`	Verifikation mikroelektronischer Systeme zur Prozeßsteuerung durch schnelle Prototypenrealisierung. ASIM Hans-Jürgen Herpel, Norbert Wehn, Manfred Glesner
1990	—	`conf`	Timing Driven Partitioning of Combinational Logic. Rechnergestützter Entwurf und Architektur mikroelektronischer Systeme Norbert Wehn, Manfred Glesner, A. Kister, S. Kastner
1989	—	`—`	Effiziente Verfahren für den physikalischen Entwurf von MOS-VLSI-Schaltungen und ihre Anwendung beim Entwurf eines defekttoleranten Mikroprozessors. Norbert Wehn
1988	A*	`conf`	A Defect-Tolerant and Fully Testable PLA. DAC Norbert Wehn, Manfred Glesner, K. Caesar, P. Mann, A. Roth
1987	A*	`conf`	The ALGIC Silicon Compiler System: Implementation, Design Experience and Results. DAC Johannes Schuck, Norbert Wehn, Manfred Glesner, G. Kamp
1986	J	`jnl`	Statische und dynamische CMOS-Schaltungstechniken im Vergleich. it Inf. Technol. Norbert Wehn, Manfred Glesner