Norbert Felber

59 papers A* 1A 6B 1C 16Misc 1Journal 10Unranked 24

Year	Rank	Type	Title / Venue / Authors
2016	A	`conf`	Low-power multichannel spectro-temporal feature extraction circuit for audio pattern wake-up. DATE Dinko Oletic, Vedran Bilas, Michele Magno, Norbert Felber, Luca Benini
2014	C	`conf`	Dynamic memory-based physically unclonable function for the generation of unique identifiers and true random numbers. ISCAS Christoph Keller, Frank K. Gürkaynak, Hubert Kaeslin, Norbert Felber
2013	C	`conf`	A Security-Enhanced UHF RFID Tag Chip. DSD Johann Ertl, Thomas Plos, Martin Feldhofer, Norbert Felber, Luca Henzen
2013	C	`conf`	Live demonstration: Real-time audio restoration using sparse signal recovery. ISCAS David E. Bellasi, Patrick Maechler, Andreas Burg, Norbert Felber, Hubert Kaeslin, Christoph Studer
2012	C	`conf`	100 Gbit/s authenticated encryption based on quantum key distribution. VLSI-SoC Michael Muehlberghuber, Christoph Keller, Norbert Felber, Christian Pendl
2012	—	`conf`	Compressive sensing for WiFi-based passive bistatic radar. EUSIPCO Patrick Maechler, Norbert Felber, Hubert Kaeslin
2012	—	`conf`	FPGA-Based High-Speed Authenticated Encryption System. VLSI-SoC (Selected Papers) Michael Muehlberghuber, Christoph Keller, Frank K. Gürkaynak, Norbert Felber
2012	C	`conf`	Hardware-efficient random sampling of fourier-sparse signals. ISCAS Patrick Maechler, Norbert Felber, Hubert Kaeslin, Andreas Burg
2012	—	`conf`	Sparsity-based real-time audio restoration. DASIP Patrick Maechler, David E. Bellasi, Andreas Burg, Norbert Felber, Hubert Kaeslin, Christoph Studer
2012	J	`jnl`	VLSI Design of Approximate Message Passing for Signal Restoration and Compressive Sensing. IEEE J. Emerg. Sel. Topics Circuits Syst. Patrick Maechler, Christoph Studer, David E. Bellasi, Arian Maleki, Andreas Burg, Norbert Felber, Hubert Kaeslin, Richard G. Baraniuk
2011	—	`conf`	Random sampling ADC for sparse spectrum sensing. EUSIPCO Patrick Maechler, Norbert Felber, Andreas Peter Burg
2010	Misc	`conf`	Low-Resource Hardware Design of an Elliptic Curve Processor for Contactless Devices. WISA Erich Wenger, Martin Feldhofer, Norbert Felber
2010	C	`conf`	Matching pursuit: Evaluation and implementatio for LTE channel estimation. ISCAS Patrick Maechler, Pierre Greisen, Norbert Felber, Andreas Burg
2010	J	`jnl`	Signal Transmission by Galvanic Coupling Through the Human Body. IEEE Trans. Instrum. Meas. Marc Simon Wegmueller, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner
2009	J	`jnl`	Galvanic Coupling Enabling Wireless Implant Communications. IEEE Trans. Instrum. Meas. Marc Simon Wegmueller, Sonja Huclova, Juerg Froehlich, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner
2009	C	`conf`	Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed. ISCAS Markus Wenk, Peter Luethi, Thomas Koch, Patrick Maechler, Norbert Felber, Wolfgang Fichtner, Michael Lerjen
2009	A	`conf`	Hardware evaluation of the stream cipher-based hash functions RadioGatún and irRUPT. DATE Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner
2009	C	`conf`	Live Demonstration: Hardware Platform and Implementation of a Real-time Multi-user MIMO-OFDM Testbed. ISCAS Markus Wenk, Peter Luethi, Thomas Koch, Patrick Maechler, Norbert Felber, Wolfgang Fichtner, Michael Lerjen
2008	C	`conf`	A transform, lighting and setup ASIC for surface splatting. ISCAS Simon Heinzle, Olivier Saurer, Sebastian Axmann, Diego Browarnik, Andreas Schmidt, Flavio Carbognani, Peter Luethi, Norbert Felber, Markus H. Gross
2008	B	`conf`	ECC Is Ready for RFID - A Proof in Silicon. Selected Areas in Cryptography Daniel M. Hein, Johannes Wolkerstorfer, Norbert Felber
2008	—	`conf`	FPGA implementation of a 2G fibre channel link encryptor with authenticated encryption mode GCM. SoC Luca Henzen, Flavio Carbognani, Norbert Felber, Wolfgang Fichtner
2008	—	`conf`	Gram-Schmidt-based QR decomposition for MIMO detection: VLSI implementation and comparison. APCCAS Peter Luethi, Christoph Studer, Sebastian Duetsch, Eugen Zgraggen, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2008	—	`conf`	Multi-user MIMO testbed. WiNTECH Peter Luethi, Markus Wenk, Thomas Koch, Wolfgang Fichtner, Michael Lerjen, Norbert Felber
2008	J	`jnl`	Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers. IEEE Trans. Very Large Scale Integr. Syst. Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner
2007	—	`conf`	A 0.25 μm 0.92 mW per Mb/s Viterbi decoder featuring resonant clocking for ultra-low-power 54 Mb/s WLAN communication. CICC Flavio Carbognani, Simon Haene, Manuel Arrigo, Claudio Pagnamenta, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner
2007	J	`jnl`	A hardware architecture for surface splatting. ACM Trans. Graph. Tim Weyrich, Simon Heinzle, Timo Aila, Daniel Bernhard Fasnacht, Stephan Oetiker, Mario Botsch, Cyril Flaig, Simon Mall, Kaspar Rohrer, Norbert Felber, Hubert Kaeslin, Markus H. Gross
2007	J	`jnl`	An Attempt to Model the Human Body as a Communication Channel. IEEE Trans. Biomed. Eng. Marc Simon Wegmueller, Andreas Kuhn, Juerg Froehlich, Michael Oberle, Norbert Felber, Niels Kuster, Wolfgang Fichtner
2007	C	`conf`	FFT Processor for OFDM Channel Estimation. ISCAS Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner
2007	A	`conf`	Multi-gigabit GCM-AES Architecture Optimized for FPGAs. CHES Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli
2007	—	`conf`	Reduced-complexity mimo detector with close-to ml error rate performance. ACM Great Lakes Symposium on VLSI C. Hess, Markus Wenk, Andreas Burg, Peter Luethi, Christoph Studer, Norbert Felber, Wolfgang Fichtner
2007	C	`conf`	VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition. ISCAS Peter Luethi, Andreas Burg, Simon Haene, David Perels, Norbert Felber, Wolfgang Fichtner
2006	C	`conf`	42% power savings through glitch-reducing clocking strategy in a hearing aid application. ISCAS Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner
2006	—	`conf`	A Frame-Start Detector for a 4×4 MIMO-OFDM System. ICASSP (4) David Perels, Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner
2006	C	`conf`	Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems. ISCAS Andreas Burg, Simon Haene, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner
2006	—	`conf`	GALS at ETH Zurich: Success or Failure. ASYNC Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2006	C	`conf`	K-best MIMO detection VLSI architectures achieving up to 424 Mbps. ISCAS Markus Wenk, Martin Zellweger, Andreas Burg, Norbert Felber, Wolfgang Fichtner
2006	A*	`conf`	Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm. DAC Felix Bürgin, Flavio Carbognani, Martin Hediger, Hektor Meier, Robert Meyer-Piening, Rafael Santschi, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2006	C	`conf`	Silicon implementation of an MMSE-based soft demapper for MIMO-BICM. ISCAS Simon Haene, Andreas Burg, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner
2006	A	`conf`	Two-phase resonant clocking for ultra-low-power hearing aid applications. DATE Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner
2005	—	`conf`	A 0.67-mm ECCTD Flavio Carbognani, Felix Bürgin, Luca Henzen, Herbert Koch, Hovig Magdassian, Christoph Pedretti, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2005	—	`conf`	ASIC implementation of a MIMO-OFDM transceiver for 192 Mbps WLANs. ESSCIRC David Perels, Simon Haene, Peter Luethi, Andreas Peter Burg, Norbert Felber, Wolfgang Fichtner, Helmut Bölcskei
2005	—	`conf`	Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC. FMGALS@MEMOCODE Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2005	—	`conf`	Improving DPA security by using globally-asynchronous locally-synchronous systems. ESSCIRC Frank K. Gürkaynak, Stephan Oetiker, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2005	—	`conf`	Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications. PATMOS Flavio Carbognani, Felix Bürgin, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner
2004	—	`conf`	A 2 Gb/s balanced AES crypto-chip implementation. ACM Great Lakes Symposium on VLSI Frank K. Gürkaynak, Andreas Burg, Norbert Felber, Wolfgang Fichtner, D. Gasser, Franco Hug, Hubert Kaeslin
2004	—	`conf`	Towards an AES crypto-chip resistant to differential power analysis. ESSCIRC Norbert Pramstaller, Frank K. Gürkaynak, Simon Haene, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2004	—	`conf`	VLSI implementation of the sphere decoding algorithm. ESSCIRC Andreas Burg, Markus Wenk, Martin Zellweger, Marc Simon Wegmueller, Norbert Felber, Wolfgang Fichtner
2003	—	`conf`	A 50 Mbps 4×4 maximum likelihood decoder for multiple-input multiple-output systems with QPSK modulation. ICECS Andreas Burg, Norbert Felber, Wolfgang Fichtner
2003	J	`jnl`	Waveform coding for low-power digital filtering of speech data. IEEE Trans. Signal Process. Jürgen Wassner, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2002	—	`conf`	A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems. ASYNC Thomas Villiger, Stephan Oetiker, Frank K. Gürkaynak, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner
2001	—	`conf`	A new approach for controlling series-connected IGBT modules. ISCAS (3) Jan Thalheim, Norbert Felber, Wolfgang Fichtner
2001	J	`jnl`	Design and Verification of a Stack Processor Virtual Component. IEEE Micro Manfred Stadler, Markus Thalmann, Thomas Röwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
2000	J	`jnl`	A 30-frames/s megapixel real-time CMOS image processor. IEEE J. Solid State Circuits Daniel Doswald, Jürg Häfliger, Patrick Blessing, Norbert Felber, Peter Niederer, Wolfgang Fichtner
2000	—	`conf`	A new paradigm for very flexible SONET/SDH IP-modules. CICC Thomas Roewer, Manfred Stadler, Markus Thalmann, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
1999	A	`conf`	Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor. ITC Manfred Stadler, Thomas Röwer, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner, Markus Thalmann
1998	—	`conf`	An embedded stack microprocessor for SDH telecommunication applications. CICC Manfred Stadler, Markus Thalmann, Thomas Röwer, Norbert Felber, Wolfgang Fichtner
1994	J	`jnl`	A 177 Mb/s VLSI implementation of the International Data Encryption Algorithm. IEEE J. Solid State Circuits Reto Zimmermann, Andreas Curiger, Heinz Bonnenberg, Hubert Kaeslin, Norbert Felber, Wolfgang Fichtner
1993	A	`conf`	VINCI: Secure Test of a VLSI High-Speed Encryption System. ITC Heinz Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, Reto Zimmermann, Wolfgang Fichtner
1991	C	`conf`	VLSI Implementation of a New Block Cipher. ICCD Heinz Bonnenberg, Andreas Curiger, Norbert Felber, Hubert Kaeslin, Xuejia Lai