Nobuyuki Yamashita

11 papers B 1Misc 3Journal 7
YearRankTypeTitle / Venue / Authors
2005 J jnl
Near-Field Sound-Source Localization Based on a Signed Binary Code.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Miki Sato, Akihiko Sugiyama, Osamu Hoshuyama, Nobuyuki Yamashita, Yoshihiro Fujita
1996 J jnl
A 3.84 gips integrated memory array processor.
Syst. Comput. Jpn.
Yoshihiro Fujita, Nobuyuki Yamashita, Tohru Kimura, Kazuyuki Nakamura, Shin'ichiro Okazaki
1996 B conf
An integrated memory array processor with a synchronous-DRAM interface for real-time vision applications.
ICPR
Nobuyuki Yamashita, Yoshihiro Fujita, Shin'ichiro Okazaki
1996 Misc conf
IMAP-VISION: An SIMD Processor with High-Speed On-chip Memory and Large Capacity External Memory.
MVA
Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro Okazaki
1995 J jnl
A compact real-time vision system using integrated memory array processor architecture.
IEEE Trans. Circuits Syst. Video Technol.
Shin'ichiro Okazaki, Yoshihiro Fujita, Nobuyuki Yamashita
1995 J jnl
Design of 1.28-GB/s high bandwidth 2-Mb SRAM for integrated memory array processor applications.
IEEE J. Solid State Circuits
Tohru Kimura, Kazuyuki Nakamura, Yoshiharu Aimoto, Takashi Manabe, Nobuyuki Yamashita, Yoshihiro Fujita, Shin'ichiro Okazaki, Masakazu Yamashina
1994 J jnl
A 3.84 GIPS integrated memory array processor with 64 processing elements and a 2-Mb SRAM.
IEEE J. Solid State Circuits
Nobuyuki Yamashita, Tohru Kimura, Yoshihiro Fujita, Yoshiharu Aimoto, Takashi Manabe, Shin'ichiro Okazaki, Kazuyuki Nakamura, Masakazu Yamashina
1994 Misc conf
A Compact 30GIPS Real-Time Vision System RVS-2.
MVA
Shin'ichiro Okazaki, Yoshihiro Fujita, Nobuyuki Yamashita
1994 J jnl
A real-time vision system using an integrated memory array processor prototype.
Mach. Vis. Appl.
Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro Okazaki
1992 Misc conf
A Real-Time Vision System Using Integrated Memory Array Processor Prototype LSI.
MVA
Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro Okazaki
1992 J jnl
Imap: Integrated Memory Array Processor.
J. Circuits Syst. Comput.
Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro Okazaki