Nobutaka Kuroki

52 papers C 5Journal 23Unranked 24
YearRankTypeTitle / Venue / Authors
2024 J jnl
Technology Remapping Approach Using Multi-Gate Reconfigurable Cells for Post-Mask Functional ECO.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Tomohiro Nishiguchi, Nobutaka Kuroki, Masahiro Numa
2021 J jnl
A 35-mV supply ring oscillator consisting of stacked body bias inverters for extremely low-voltage LSIs.
IEICE Electron. Express
Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
2021 J jnl
Multi-Category Image Super-Resolution with Convolutional Neural Network and Multi-Task Learning.
IEICE Trans. Inf. Syst.
Kazuya Urazoe, Nobutaka Kuroki, Yu Kato, Shinya Ohtani, Tetsuya Hirose, Masahiro Numa
2020 — conf
A 34-mV Startup Ring Oscillator Using Stacked Body Bias Inverters for Extremely Low-Voltage Thermoelectric Energy Harvesting.
NEWCAS
Masaya Nishi, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Hikaru Sebe, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
2020 J jnl
An 11.8 nA ultra-low power active diode using a hysteresis common gate comparator for low-power energy harvesting systems.
IEICE Electron. Express
Kaori Matsumoto, Hiroki Asano, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
2020 — conf
Detecting tampered regions in JPEG images via CNN.
NEWCAS
Kunihiko Taya, Nobutaka Kuroki, Naoto Takeda, Tetsuya Hirose, Masahiro Numa
2020 J jnl
Improvement of Luminance Isotropy for Convolutional Neural Networks-Based Image Super-Resolution.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kazuya Urazoe, Nobutaka Kuroki, Yu Kato, Shinya Ohtani, Tetsuya Hirose, Masahiro Numa
2019 — conf
Sub-0.1V Input, Low-Voltage CMOS Driver Circuit for Multi-Stage Switched Capacitor Voltage Boost Converter.
ICECS
Masaya Nishi, Yuichiro Nakazawa, Kaori Matsumoto, Nobutaka Kuroki, Masahiro Numa, Ryo Matsuzuka, Osamu Maida, Daisuke Kanemoto, Tetsuya Hirose
2018 J jnl
A Sub-1-µs Start-Up Time, Fully-Integrated 32-MHz Relaxation Oscillator for Low-Power Intermittent Systems.
IEICE Trans. Electron.
Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
2018 C conf
An ultra-low power active diode using a hysteresis common gate comparator for low-voltage and low-power energy harvesting systems.
VLSI-SoC
Kaori Matsumoto, Tetsuya Hirose, Hiroki Asano, Yuto Tsuji, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa
2018 C conf
Analytical Study of Multi-stage Switched-Capacitor Voltage Boost Converter for Ultra-low Voltage Energy Harvesting.
ISCAS
Yuichiro Nakazawa, Tetsuya Hirose, Toshihiro Ozaki, Yuto Tsuji, Shuto Kanzaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
2018 — conf
Switched-Capacitor Voltage Buck Converter with Step-Down-Ratio and Clock-Frequency Controllers for Ultra-Low-Power IoT Devices.
ICECS
Shuto Kanzaki, Tetsuya Hirose, Hiroki Asano, Yuichiro Nakazawa, Nobutaka Kuroki, Masahiro Numa
2017 — conf
A 0.1-0.6 V input range voltage boost converter with low-leakage driver for low-voltage energy harvesting.
ICECS
Yuto Tsuji, Tetsuya Hirose, Toshihiro Ozaki, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
2017 J jnl
An 80-mV-to-1.8-V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Kyohei Shinonaga, Nobutaka Kuroki, Masahiro Numa
2017 C conf
An area-efficient, 0.022-mm2, fully integrated resistor-less relaxation oscillator for ultra-low power real-time clock applications.
ISCAS
Hiroki Asano, Tetsuya Hirose, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
2017 — conf
An ultra-low-power supercapacitor voltage monitoring system for low-voltage energy harvesting.
ICECS
Takanori Sato, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
2017 J jnl
Multi-Channel Convolutional Neural Networks for Image Super-Resolution.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Shinya Ohtani, Yu Kato, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa
2017 — conf
Sub-1-μs start-up time, 32-MHz relaxation oscillator for low-power intermittent VLSI systems.
ASP-DAC
Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
2016 — conf
A 0.38-μW stand-by power, 50-nA-to-1-mA load current range DC-DC converter with self-biased linear regulator for ultra-low power battery management.
A-SSCC
Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
2016 — conf
A 1.66-nW/kHz, 32.7-kHz, 99.5ppm/°C fully integrated current-mode RC oscillator for real-time clock applications with PVT stability.
ESSCIRC
Hiroki Asano, Tetsuya Hirose, Keishi Tsubaki, Taro Miyoshi, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
2016 J jnl
A Highly Efficient Switched-Capacitor Voltage Boost Converter with Nano-Watt MPPT Controller for Low-Voltage Energy Harvesting.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
2016 — conf
A fully integrated, 1-µs start-up time, 32-MHz relaxation oscillator for low-power intermittent systems.
NEWCAS
Hiroki Asano, Tetsuya Hirose, Taro Miyoshi, Keishi Tsubaki, Toshihiro Ozaki, Nobutaka Kuroki, Masahiro Numa
2016 J jnl
Fully-Integrated High-Conversion-Ratio Dual-Output Voltage Boost Converter With MPPT for Low-Voltage Energy Harvesting.
IEEE J. Solid State Circuits
Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
2016 — conf
Image super-resolution with multi-channel convolutional neural networks.
NEWCAS
Yu Kato, Shinya Ohtani, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa
2015 C conf
A 0.19-V minimum input low energy level shifter for extremely low-voltage VLSIs.
ISCAS
Ryo Matsuzuka, Tetsuya Hirose, Yuzuru Shizuku, Nobutaka Kuroki, Masahiro Numa
2015 — conf
A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated 3-terminal voltage converter with MPPT for low-voltage energy harvesters.
ASP-DAC
Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
2015 J jnl
A 32-kHz Real-Time Clock Oscillator with On-Chip PVT Variation Compensation Circuit for Ultra-Low Power MCUs.
IEICE Trans. Electron.
Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2015 — conf
A fully-integrated, high-conversion-ratio and dual-output voltage boost converter with MPPT for low-voltage energy harvesting.
A-SSCC
Toshihiro Ozaki, Tetsuya Hirose, Hiroki Asano, Nobutaka Kuroki, Masahiro Numa
2015 J jnl
An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada
2015 J jnl
Energy-efficient AES SubBytes transformation circuit using asynchronous circuits for ultra-low voltage operation.
IEICE Electron. Express
Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada
2014 — conf
A 0.21-V minimum input, 73.6% maximum efficiency, fully integrated voltage boost converter with MPPT for low-voltage energy harvesters.
ESSCIRC
Toshihiro Ozaki, Tetsuya Hirose, Takahiro Nagai, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
2014 — conf
A 24-transistor static flip-flop consisting of nors and inverters for low-power digital vlsis.
NEWCAS
Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada
2014 J jnl
A Fully On-Chip, 6.66-kHz, 320-nA, 56ppm/°C, CMOS Relaxation Oscillator with PVT Variation Compensation Circuit.
IEICE Trans. Electron.
Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa
2013 J jnl
1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs.
IEEE J. Solid State Circuits
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2013 — conf
A 32.55-kHz, 472-nW, 120ppm/°C, fully on-chip, variation tolerant CMOS relaxation oscillator for a real-time clock application.
ESSCIRC
Keishi Tsubaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2012 — conf
A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator.
ICECS
Keishi Tsubaki, Tetsuya Hirose, Yuji Osaki, Seiichiro Shiga, Nobutaka Kuroki, Masahiro Numa
2012 J jnl
A Low-Power Level Shifter With Logic Error Correction for Extremely Low-Voltage Digital CMOS LSIs.
IEEE J. Solid State Circuits
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2012 — conf
A low-power single-slope analog-to-digital converter with digital PVT calibration.
ICECS
Yuji Osaki, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
2012 — conf
A nano-watt power CMOS amplifier with adaptive biasing for power-aware analog LSIs.
ESSCIRC
Yumiko Tsuruya, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa, Osamu Kobayashi
2011 — conf
A 18.9-nA standby current comparator with adaptive bias current generator.
A-SSCC
Kosuke Isono, Tetsuya Hirose, Keishi Tsubaki, Nobutaka Kuroki, Masahiro Numa
2011 — conf
A 95-nA, 523ppm/°C, 0.6-μW CMOS current reference circuit with subthreshold MOS resistor ladder.
ASP-DAC
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2011 — conf
A level shifter with logic error correction circuit for extremely low-voltage digital CMOS LSIs.
ESSCIRC
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2011 J jnl
A wide input voltage range level shifter circuit for extremely low-voltage digital LSIs.
IEICE Electron. Express
Yuji Osaki, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2011 J jnl
Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique.
IEICE Trans. Electron.
Yuji Osaki, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, Masahiro Numa
2011 J jnl
Subthreshold SRAM with Write Assist Technique Using On-Chip Threshold Voltage Monitoring Circuit.
IEICE Trans. Electron.
Kei Matsumoto, Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa
2010 — conf
A nano-ampere current reference circuit and its temperature dependence control by using temperature characteristics of carrier mobilities.
ESSCIRC
Tetsuya Hirose, Yuji Osaki, Nobutaka Kuroki, Masahiro Numa
2010 J jnl
An Error Diagnosis Technique Based on Clustering of Elements.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kosuke Shioki, Narumi Okada, Kosuke Watanabe, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2010 C conf
Super-resolution technique for thermography with dual-camera system.
ISCAS
Shingo Chikamatsu, Tomohiro Nakaya, Masakazu Kouda, Nobutaka Kuroki, Tetsuya Hirose, Masahiro Numa
2009 J jnl
An Error Diagnosis Technique Based on Location Sets to Rectify Subcircuits.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Kosuke Shioki, Narumi Okada, Toshiro Ishihara, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa
2006 J jnl
An Evaluation of Triple Density Error Diffusion for Medical Monochrome LCDs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Nobutaka Kuroki, Nobuhiro Oka, Masahiro Numa, Keisuke Yamamoto
2004 — conf
Adaptive arithmetic coding for image prediction errors.
ISCAS (3)
Nobutaka Kuroki, Takahiro Manabe, Masahiro Numa
2000 J jnl
Layered blind deconvolution with interband prediction.
Syst. Comput. Jpn.
Hirokazu Masuda, Nobutaka Kuroki, Masahiro Numa, Kotaro Hirano