Nobuo Tsuda

13 papers C 1Journal 5Unranked 7
YearRankTypeTitle / Venue / Authors
2002 C conf
Configurable PC Clusters Using a Hierarchical Complete-Connection-Based Switching Network.
PRDC
Nobuo Tsuda
2001 — conf
ABL-Tree: A Constant Diameter Interconnection Network for Reconfigurable Processor Arrays Capable of Distributed Communication .
DFT
Nobuo Tsuda
2000 J jnl
Fault-Tolerant Processor Arrays Using Additional Bypass Linking Allocated by Graph-Node Coloring.
IEEE Trans. Computers
Nobuo Tsuda
2000 — conf
Fault-Tolerant Ring- and Toroidal Mesh-Connected Processor Arrays Able to Enhance Emulation of Hypercubes.
DFT
Nobuo Tsuda
2000 — conf
Reconfigurable Mesh-Connected Processor Arrays Using Row-Column Bypassing and Direct Replacement.
ISPAN
Nobuo Tsuda, Tatsuyuki Shimizu
1997 — conf
Fault-Tolerant Hierarchical Interconnection Networks Constructed by Additional Bypass Linking with Graph-Node Coloring.
DFT
Nobuo Tsuda
1996 — conf
Fault-Tolerant Shuffle-Exchange and de Bruijn Networks Capable of Quick Broadcasting.
DFT
Nobuo Tsuda
1995 J jnl
A Rule-Embedded Neural-Network and Its Effectiveness in Pattern Recognition with III-Posed Conditions.
IEICE Trans. Inf. Syst.
Mina Maruyama, Nobuo Tsuda, Kiyoshi Nakabayashi
1995 — conf
Totally defect-tolerant arrays capable of quick broadcasting.
DFT
Nobuo Tsuda, Tsutomu Ishikawa, Yukihiro Nakamura
1993 J jnl
Defect- and fault-tolerant static ram module designs based on parity checking and automatic testing.
Syst. Comput. Jpn.
Nobuo Tsuda
1993 J jnl
Hierarchical redundancy for array-structure wsis.
Syst. Comput. Jpn.
Nobuo Tsuda
1993 J jnl
Hierarchical redundancy for two-dimensional orthogonal arrays using defect-tolerant replacement circuits.
Syst. Comput. Jpn.
Nobuo Tsuda
1989 — conf
A Compact Multiway Merge Sorter using Linear-Array Comparators.
FODO
Tetsuji Satoh, Hideaki Takeda, Nobuo Tsuda