Nobukazu Takai

45 papers Journal 10Unranked 35

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Continuous-Time Modeling of a Hysteretic DC-DC Converter Using an Amplifier Model in Place of the Hysteretic Comparator. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yasuhiro Sugimoto, Nobukazu Takai
2025	J	`jnl`	GNN-Opt: Enhancing Automated Circuit Design Optimization with Graph Neural Networks. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kazuya Yamamoto, Nobukazu Takai
2025	—	`conf`	Improving the Efficiency of Bayesian Optimization Using Robust Scaling Tchebycheff Method in Op-Amp Circuit Design. ICECS Tsuyoshi Masubuchi, Nobukazu Takai
2025	—	`conf`	Interpreting and Reducing Variables in Analog Circuit Sizing Models with Explainable AI. NewCAS Takayoshi Namura, Nobukazu Takai
2025	—	`conf`	Optimal Mapping of Monte Carlo Analysis for Analog Circuit Designing using Bayesian Neural Networks. AICAS Yuto Moriguchi, Nobukazu Takai
2024	—	`conf`	Op-Amp sizing with large number of design variables using TuRBO. APCCAS Tsuyoshi Masubuchi, Nobukazu Takai
2020	—	`conf`	Determination of circuit topology and element values from desired characteristics by machine learning. ICECS Akihiro Saito, Nobukazu Takai, Satoshi Konno
2019	—	`conf`	Self-improvement of OPAmp parameters using Q-Learning. SMACD Nobukazu Takai, Masafumi Fukuda, Masahiro Saruta
2018	—	`conf`	Inference of Suitable for Required Specification Analog Circuit Topology using Deep Learning. ISPACS Teruki Matsuba, Nobukazu Takai, Masafumi Fukuda, Yusuke Kubo
2018	—	`conf`	Output Voltage Ripple Compensation for Switching Power Supply in EMI Reduction Method with Theoretical Analysis. ISPACS Takayuki Arai, Natsuko Miki, Yifei Sun, Nobukazu Takai
2017	J	`jnl`	Automatic Design of Operational Amplifier Utilizing both Equation-Based Method and Genetic Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Kento Suzuki, Nobukazu Takai, Yoshiki Sugawara, Masato Kato
2017	—	`conf`	Automatic design of the analog integrated circuit based on Equation-Based and Characterize results. ISPACS Tsukasa Ishii, Nobukazu Takai, Masafumi Fukuda
2017	—	`conf`	Delay-time suppression technique for DC/DC buck converter using voltage mode PWM control. ISPACS Manimel Wadu Sahan Dulara, Nobukazu Tsukiji, Yasunori Kobori, Koyo Asaishi, Nobukazu Takai, Haruo Kobayashi
2017	—	`conf`	EMI reduction technique with noise spread spectrum using swept frequency modulation for hysteretic DC-DC converters. ISPACS Natsuko Miki, Nobukazu Tsukiji, Koyo Asaishi, Yasunori Kobori, Nobukazu Takai, Hamo Kobayashi
2017	—	`conf`	Noise spread spectrum with adjustable notch frequency in complex pulse coding controlled DC-DC converters. ISPACS Yasunori Kobori, Nobukazu Tsukiji, Takuya Arafune, Manimel Wadu Sahan, Dulara Yifei Sun, Nobukazu Takai, Haruo Kobayashi
2017	—	`conf`	OP-AMP sizing by inference of element values using machine learning. ISPACS Masafumi Fukuda, Tsukasa Ishii, Nobukazu Takai
2015	—	`conf`	Automatic design of RC polyphase filters with small element value spread using genetic algorithm. ISPACS Nobukazu Takai, Yoshiki Sugawara, Kento Suzuki, Takayuki Negishi, Hiroaki Seki, Masato Kato
2015	—	`conf`	Automatic design of doubly-terminated RC polyphase filters by using distributed genetic algorithm. ASICON Yoshiki Sugawara, Nobukazu Takai, Masato Kato, Hiroaki Seki, Kento Suzuki, Haruo Kobayashi
2015	—	`conf`	Comparator circuits automation by combination of distributed genetic algorithm and HSPICE optimization. ASICON Kento Suzuki, Nobukazu Takai, Masato Kato, Hiroaki Seki, Yoshiki Sugawara, Haruo Kobayashi
2015	—	`conf`	EMI reduction by analog noise spread spectrum in new ripple controlled converter. ASICON Yasunori Kobori, Taifeng Wang, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi
2015	—	`conf`	High efficiency single-inductor dual-output DC-DC converter with ZVS-PWM control. ASICON Yoshiki Sunaga, Naoya Shiraishi, Koyo Asaishi, Nobukazu Tsukiji, Yasunori Kobori, Nobukazu Takai, Haruo Kobayashi
2015	—	`conf`	Selectable notch frequencies of EMI spread spectrum using pulse modulation in switching converter. ASICON Yasunori Kobori, Takuya Arafune, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi
2013	—	`conf`	An Analysis of Stochastic Self-Calibration of TDC Using Two Ring Oscillators. Asian Test Symposium Kentaroh Katoh, Yuta Doi, Satoshi Ito, Haruo Kobayashi, Ensi Li, Nobukazu Takai
2013	J	`jnl`	Multi-bit Sigma-Delta TDC Architecture with Improved Linearity. J. Electron. Test. Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Daiki Hirabayashi, Yuta Arakawa, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuji Yano, Tatsuhiro Gake, Takahiro J. Yamaguchi, Nobukazu Takai
2012	—	`conf`	DC-DC converter with continuous-time feed-forward Sigma-Delta modulator control. APCCAS Hong Gao, Lin Xing, Yasunori Kobori, Feng Zhao, Haruo Kobayashi, Shyunsuke Miwa, Atsushi Motozawa, Zachary Nosker, Kiichi Niitsu, Nobukazu Takai, Takahiro Odaguchi, Isao Nakanishi, Kenji Nemoto, Jun-Ichi Matsuda
2012	—	`conf`	Digitally-controlled Gm-C bandpass filter. APCCAS Guanglei Jin, Hao Chen, Chuan Gao, Yunpeng Zhang, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Khayrollah Hadidi
2012	—	`conf`	Multi-bit sigma-delta TDC architecture with self-calibration. APCCAS Satoshi Uemori, Masamichi Ishii, Haruo Kobayashi, Yuta Doi, Osamu Kobayashi, Tatsuji Matsuura, Kiichi Niitsu, Yuta Arakawa, Daiki Hirabayashi, Yuji Yano, Tatsuhiro Gake, Nobukazu Takai, Takahiro J. Yamaguchi
2012	—	`conf`	Single inductor dual output DC-DC converter design with exclusive control. APCCAS Yasunori Kobori, Qiulin Zhu, Murong Li, Feng Zhao, Zachary Nosker, Shu Wu, Shaiful N. Mohyar, Masanori Onozawa, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Takahiro Odaguchi, Isao Nakanishi, Kenji Nemoto, Jun-Ichi Matsuda, Asahi Kasei
2011	J	`jnl`	Design for Testability That Reduces Linearity Testing Time of SAR ADCs. IEICE Trans. Electron. Tomohiko Ogawa, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Satoshi Ito, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu
2010	—	`conf`	ADC linearity test signal generation algorithm. APCCAS Satoshi Uemori, Takahiro J. Yamaguchi, Satoshi Ito, Yohei Tan, Haruo Kobayashi, Nobukazu Takai, Kiichi Niitsu, Nobuyoshi Ishikawa
2010	—	`conf`	Non-binary SAR ADC with digital error correction for low power applications. APCCAS Tomohiko Ogawa, Tatsuji Matsuura, Haruo Kobayashi, Nobukazu Takai, Masao Hotta, Hao San, Akira Abe, Katsuyoshi Yagi, Toshihiko Mori
2010	J	`jnl`	SAR ADC Algorithm with Redundancy and Digital Error Correction. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Tomohiko Ogawa, Haruo Kobayashi, Yosuke Takahashi, Nobukazu Takai, Masao Hotta, Hao San, Tatsuji Matsuura, Akira Abe, Katsuyoshi Yagi, Toshihiko Mori
2010	—	`conf`	SAR ADC that is configurable to optimize yield. APCCAS Tomohiko Ogawa, Haruo Kobayashi, Yohei Tan, Satoshi Ito, Satoshi Uemori, Nobukazu Takai, Kiichi Niitsu, Takahiro J. Yamaguchi, Tatsuji Matsuura, Nobuyoshi Ishikawa
2010	—	`conf`	Single inductor DC-DC converter with bipolar outputs using charge pump. APCCAS Kenji Takahashi, Hajime Yokoo, Shyunsuke Miwa, Kengo Tsushida, Hiroyuki Iwase, Kazuki Murakami, Nobukazu Takai, Haruo Kobayashi, Takahiro Odaguchi, Shigeki Takayama, Isao Fukai, Jun-Ichi Matsuda
2010	—	`conf`	Stochastic TDC architecture with self-calibration. APCCAS Satoshi Ito, Shigeyuki Nishimura, Haruo Kobayashi, Satoshi Uemori, Yohei Tan, Nobukazu Takai, Takahiro J. Yamaguchi, Kiichi Niitsu
2009	—	`conf`	A Time-to-Digital Converter with small circuitry. ASP-DAC Kazuya Shimizu, Masato Kaneta, Haijun Lin, Haruo Kobayashi, Nobukazu Takai, Masao Hotta
2009	J	`jnl`	EMI Reduction by Spread-Spectrum Clocking in Digitally-Controlled DC-DC Converters. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Ibuki Mori, Yoshihisa Yamada, Santhos A. Wibowo, Masashi Kono, Haruo Kobayashi, Yukihiro Fujimura, Nobukazu Takai, Toshio Sugiyama, Isao Fukai, Norihisa Onishi, Ichiro Takeda, Jun-Ichi Matsuda
2009	J	`jnl`	Steep Down-Slope Sawtooth Wave Generator Utilizing Two Triangluar Waves Exclusively. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Nobukazu Takai, Yukihiro Fujimura
2008	—	`conf`	New architecture for envelope-tracking power amplifier for base station. APCCAS Akihiro Kanbe, Masato Kaneta, Fuminori Yui, Haruo Kobayashi, Nobukazu Takai, Tatsuhiro Shimura, Hitoshi Hirata, Kentarou Yamagishi
2008	—	`conf`	SAR ADC algorithm with redundancy. APCCAS Tomohiko Ogawa, Haruo Kobayashi, Masao Hotta, Yosuke Takahashi, Hao San, Nobukazu Takai
2007	—	`conf`	Compensation method of amplitude error in sawtooth wave generator. ECCTD Nobukazu Takai, Yukihiro Fujimura
2005	J	`jnl`	Rail-to-Rail OTA Based on Signal Decomposition. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Nobukazu Takai, Shigetaka Takagi, Nobuo Fujii
2005	J	`jnl`	Rail-to-Rail OTA Utilizing Linear V-I Conversion Circuit Whose Input Stage is Composed of Single Channel MOSFETs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Nobukazu Takai, Keigo Kawai
2005	—	`conf`	Rail-to-rail OTA utilizing linear V-I conversion circuit using single channel MOSFETs for input stage. ECCTD Nobukazu Takai, Shinji Nomura
1998	—	`conf`	GaAs MESFET multi-output current mirrors and their application to high frequency filters. ICECS Nobukazu Takai, Nobuo Fujii