Nithin George - RankMe

13 papers A 2B 4Misc 1Journal 2Unranked 3

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	CodePin: An Instrumentation-Based Debug Tool of SYCLomatic. IWOCL Andy Huang, Zhiming Wang, Wenhui Ni, Sheng Chen, Nithin George
2020	A	`conf`	SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs. ICCAD Yi-Hsiang Lai, Hongbo Rong, Size Zheng, Weihao Zhang, Xiuping Cui, Yunshan Jia, Jie Wang, Brendan Sullivan, Zhiru Zhang, Yun Liang, Youhui Zhang, Jason Cong, Nithin George, Jose Alvarez, Christopher J. Hughes, Pradeep Dubey
2017	J	`jnl`	Design Space Exploration of LDPC Decoders Using High-Level Synthesis. IEEE Access João Andrade, Nithin George, Kimon Karras, David Novo, Frederico Pratas, Leonel Sousa, Paolo Ienne, Gabriel Falcão, Vítor Silva
2017	J	`jnl`	Virtualized Execution Runtime for FPGA Accelerators in the Cloud. IEEE Access Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
2016	B	`conf`	Designing a virtual runtime for FPGA accelerators in the cloud. FPL Mikhail Asiatici, Nithin George, Kizheppatt Vipin, Suhaib A. Fahmy, Paolo Ienne
2016	—	`conf`	Enriching C-based High-Level Synthesis with parallel pattern templates. FPT Lana Josipovic, Nithin George, Paolo Ienne
2016	—	`—`	FPGAs for the Masses: Affordable Hardware Synthesis from Domain-Specific Languages. Nithin George
2015	B	`conf`	Automatic support for multi-module parallelism from computational patterns. FPL Nithin George, HyoukJoong Lee, David Novo, Muhsen Owaida, David Andrews, Kunle Olukotun, Paolo Ienne
2015	Misc	`conf`	Fast Design Space Exploration Using Vivado HLS: Non-binary LDPC Decoders. FCCM João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes
2015	B	`conf`	From low-architectural expertise up to high-throughput non-binary LDPC decoders: Optimization guidelines using high-level synthesis. FPL João Andrade, Nithin George, Kimon Karras, David Novo, Vítor Manuel Mendes da Silva, Paolo Ienne, Gabriel Falcão Paiva Fernandes
2014	B	`conf`	Hardware system synthesis from Domain-Specific Languages. FPL Nithin George, HyoukJoong Lee, David Novo, Tiark Rompf, Kevin J. Brown, Arvind K. Sujeeth, Martin Odersky, Kunle Olukotun, Paolo Ienne
2013	—	`conf`	Making domain-specific hardware synthesis tools cost-efficient. FPT Nithin George, David Novo, Tiark Rompf, Martin Odersky, Paolo Ienne
2012	A	`conf`	Reducing the cost of floating-point mantissa alignment and normalization in FPGAs. FPGA Yehdhih Ould Mohammed Moctar, Nithin George, Hadi Parandeh-Afshar, Paolo Ienne, Guy G. F. Lemieux, Philip Brisk