Nishit Ashok Kapadia

14 papers A 1C 2Misc 2Journal 4Unranked 5
YearRankTypeTitle / Venue / Authors
2017 J jnl
A Runtime Framework for Robust Application Scheduling With Adaptive Parallelism in the Dark-Silicon Era.
IEEE Trans. Very Large Scale Integr. Syst.
Nishit Ashok Kapadia, Sudeep Pasricha
2017 J jnl
ARTEMIS: An Aging-Aware Runtime Application Mapping Framework for 3D NoC-Based Chip Multiprocessors.
IEEE Trans. Multi Scale Comput. Syst.
Venkata Yaswanth Raparti, Nishit Ashok Kapadia, Sudeep Pasricha
2016 J jnl
A System-Level Cosynthesis Framework for Power Delivery and On-Chip Data Networks in Application-Specific 3-D ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Nishit Ashok Kapadia, Sudeep Pasricha
2016 C conf
CHARM: A checkpoint-based resource management framework for reliable multicore computing in the dark silicon era.
ICCD
Venkata Yaswanth Raparti, Nishit Ashok Kapadia, Sudeep Pasricha
2015 — conf
ARTEMIS: An Aging-Aware Runtime Application Mapping Framework for 3D NoC-based Chip Multiprocessors.
NOCS
Nishit Ashok Kapadia, Venkata Yaswanth Raparti, Sudeep Pasricha
2015 — conf
Process variation aware dynamic power management in multicore systems with extended range voltage/frequency scaling.
MWSCAS
Shoumik Maiti, Nishit Ashok Kapadia, Sudeep Pasricha
2015 A conf
VARSHA: variation and reliability-aware application scheduling with adaptive parallelism in the dark-silicon era.
DATE
Nishit Ashok Kapadia, Sudeep Pasricha
2014 C conf
PRATHAM: A power delivery-aware and thermal-aware mapping framework for parallel embedded applications on 3D MPSoCs.
ICCD
Nishit Ashok Kapadia, Sudeep Pasricha
2014 Misc conf
Process Variation Aware Synthesis of Application-Specific MPSoCs to Maximize Yield.
VLSID
Nishit Ashok Kapadia, Sudeep Pasricha
2013 — conf
A co-synthesis methodology for power delivery and data interconnection networks in 3D ICs.
ISQED
Nishit Ashok Kapadia, Sudeep Pasricha
2013 — conf
VERVE: A framework for variation-aware energy efficient synthesis of NoC-based MPSoCs with voltage islands.
ISQED
Nishit Ashok Kapadia, Sudeep Pasricha
2012 Misc conf
A Power Delivery Network Aware Framework for Synthesis of 3D Networks-on-Chip with Multiple Voltage Islands.
VLSI Design
Nishit Ashok Kapadia, Sudeep Pasricha
2012 J jnl
A framework for low power synthesis of interconnection networks-on-chip with multiple voltage islands.
Integr.
Nishit Ashok Kapadia, Sudeep Pasricha
2011 — conf
VISION: a framework for voltage island aware synthesis of interconnection networks-on-chip.
ACM Great Lakes Symposium on VLSI
Nishit Ashok Kapadia, Sudeep Pasricha