Nishant Patil

34 papers A* 8A 6C 1Journal 14Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
Efficient Supply Chains in Agriculture Through Cluster-Based Route Optimization.
Oper. Res. Forum
Bhavik Bharambe, Nishant Patil, Naman Kothari, Sandip Shingade, Sushila Shingade
2026 — conf
Full-Duplex RF Canceler Achieving Wideband High-SI-Power Low-Noise Cancellation Through a Novel N-Path-Filter-Based Architecture and ML-Based Canceler Configuration.
ISSCC
Lakshminarasimha Sastry Garimella, Alfred Davidson, Nishant Patil, Yuan Ma, Ammaar Junaid, Kaustubh Pabba, Harish Krishnaswamy
2024 — conf
A 3-to-13 GHz Quasi-Elliptic Higher-Order N-path Filter.
MWSCAS
Nishant Patil, Abdul Rakib Hossain, Sasank Garikapati, Harish Krishnaswamy, Aravind Nagulu
2023 — conf
Area and Power Efficient Receiver for Narrowband Internet of Things Applications.
SENSORS
Nishant Patil, Sankaran Aniruddhan
2023 A* conf
TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings.
ISCA
Norman P. Jouppi, George Kurian, Sheng Li, Peter C. Ma, Rahul Nagarajan, Lifeng Nai, Nishant Patil, Suvinay Subramanian, Andy Swing, Brian Towles, Cliff Young, Xiang Zhou, Zongwei Zhou, David A. Patterson
2023 J jnl
TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings.
CoRR
Norman P. Jouppi, George Kurian, Sheng Li, Peter C. Ma, Rahul Nagarajan, Lifeng Nai, Nishant Patil, Suvinay Subramanian, Andy Swing, Brian Towles, Cliff Young, Xiang Zhou, Zongwei Zhou, David A. Patterson
2023 A* conf
Understanding and Mitigating Hardware Failures in Deep Learning Training Systems.
ISCA
Yi He, Mike Hutton, Steven Chan, Robert De Gruijl, Rama Govindaraju, Nishant Patil, Yanjing Li
2021 A* conf
Ten Lessons From Three Generations Shaped Google's TPUv4i : Industrial Product.
ISCA
Norman P. Jouppi, Doe Hyun Yoon, Matthew Ashcraft, Mark Gottscho, Thomas B. Jablin, George Kurian, James Laudon, Sheng Li, Peter C. Ma, Xiaoyu Ma, Thomas Norrie, Nishant Patil, Sushma Prasad, Cliff Young, Zongwei Zhou, David A. Patterson
2021 J jnl
The Design Process for Google's Training Chips: TPUv2 and TPUv3.
IEEE Micro
Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman P. Jouppi, David A. Patterson
2020 J jnl
A domain-specific supercomputer for training deep neural networks.
Commun. ACM
Norman P. Jouppi, Doe Hyun Yoon, George Kurian, Sheng Li, Nishant Patil, James Laudon, Cliff Young, David A. Patterson
2020 — conf
Google's Training Chips Revealed: TPUv2 and TPUv3.
Hot Chips Symposium
Thomas Norrie, Nishant Patil, Doe Hyun Yoon, George Kurian, Sheng Li, James Laudon, Cliff Young, Norman P. Jouppi, David A. Patterson
2018 J jnl
A domain-specific architecture for deep neural networks.
Commun. ACM
Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson
2018 J jnl
Motivation for and Evaluation of the First Tensor Processing Unit.
IEEE Micro
Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson
2017 A* conf
In-Datacenter Performance Analysis of a Tensor Processing Unit.
ISCA
Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Daniel Killebrew, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Matt Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon
2017 J jnl
In-Datacenter Performance Analysis of a Tensor Processing Unit.
CoRR
Norman P. Jouppi, Cliff Young, Nishant Patil, David A. Patterson, Gaurav Agrawal, Raminder Bajwa, Sarah Bates, Suresh Bhatia, Nan Boden, Al Borchers, Rick Boyle, Pierre-luc Cantin, Clifford Chao, Chris Clark, Jeremy Coriell, Mike Daley, Matt Dau, Jeffrey Dean, Ben Gelb, Tara Vazir Ghaemmaghami, Rajendra Gottipati, William Gulland, Robert Hagmann, C. Richard Ho, Doug Hogberg, John Hu, Robert Hundt, Dan Hurt, Julian Ibarz, Aaron Jaffey, Alek Jaworski, Alexander Kaplan, Harshit Khaitan, Andy Koch, Naveen Kumar, Steve Lacy, James Laudon, James Law, Diemthu Le, Chris Leary, Zhuyuan Liu, Kyle Lucke, Alan Lundin, Gordon MacKean, Adriana Maggiore, Maire Mahony, Kieran Miller, Rahul Nagarajan, Ravi Narayanaswami, Ray Ni, Kathy Nix, Thomas Norrie, Mark Omernick, Narayana Penukonda, Andy Phelps, Jonathan Ross, Amir Salek, Emad Samadiani, Chris Severn, Gregory Sizikov, Matthew Snelham, Jed Souter, Dan Steinberg, Andy Swing, Mercedes Tan, Gregory Thorson, Bo Tian, Horia Toma, Erick Tuttle, Vijay Vasudevan, Richard Walter, Walter Wang, Eric Wilcox, Doe Hyun Yoon
2016 J jnl
Google's Neural Machine Translation System: Bridging the Gap between Human and Machine Translation.
CoRR
Yonghui Wu, Mike Schuster, Zhifeng Chen, Quoc V. Le, Mohammad Norouzi, Wolfgang Macherey, Maxim Krikun, Yuan Cao, Qin Gao, Klaus Macherey, Jeff Klingner, Apurva Shah, Melvin Johnson, Xiaobing Liu, Lukasz Kaiser, Stephan Gouws, Yoshikiyo Kato, Taku Kudo, Hideto Kazawa, Keith Stevens, George Kurian, Nishant Patil, Wei Wang, Cliff Young, Jason Smith, Jason Riesa, Alex Rudnick, Oriol Vinyals, Greg Corrado, Macduff Hughes, Jeffrey Dean
2012 J jnl
Carbon Nanotube Robust Digital VLSI.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jie Zhang, Albert Lin, Nishant Patil, Hai Wei, Lan Wei, H.-S. Philip Wong, Subhasish Mitra
2011 A conf
Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated.
ICCAD
Hai Wei, Jie Zhang, Lan Wei, Nishant Patil, Albert Lin, Max M. Shulaker, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra
2011 J jnl
Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jie Zhang, Nishant Patil, Arash Hazeghi, H.-S. Philip Wong, Subhasish Mitra
2011 J jnl
Robust System Design.
IPSJ Trans. Syst. LSI Des. Methodol.
Subhasish Mitra, Hyungmin Cho, Ted Hong, Young Moon Kim, Hsiao-Heng Lee, Larkhoon Leem, Yanjing Li, David Lin, Evelyn Mintarno, Diana Mui, Sung-Boem Park, Nishant Patil, Hai Wei, Jie Zhang
2010 A conf
Carbon nanotube circuits: Living with imperfections and variations.
DATE
Jie Zhang, Nishant Patil, Albert Lin, H.-S. Philip Wong, Subhasish Mitra
2010 A* conf
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement.
DAC
Jie Zhang, Shashikanth Bobba, Nishant Patil, Albert Lin, H.-S. Philip Wong, Giovanni De Micheli, Subhasish Mitra
2010 A conf
Efficient FPGAs using nanoelectromechanical relays.
FPGA
Chen Chen, Roozbeh Parsa, Nishant Patil, Soogine Chong, Kerem Akarvardar, J. Provine, David Lewis, Jeff Watt, Roger T. Howe, H.-S. Philip Wong, Subhasish Mitra
2009 A* conf
Carbon nanotube circuits in the presence of carbon nanotube density variations.
DAC
Jie Zhang, Nishant Patil, Arash Hazeghi, Subhasish Mitra
2009 A* conf
Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions.
DAC
Nishant Patil, Albert Lin, Jie Zhang, H.-S. Philip Wong, Subhasish Mitra
2009 C conf
Imperfection-immune Carbon Nanotube digital VLSI.
ICCD
Nishant Patil, Subhasish Mitra
2009 A conf
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors.
DATE
Subhasish Mitra, Jie Zhang, Nishant Patil, Hai Wei
2009 J jnl
Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jie Zhang, Nishant Patil, Subhasish Mitra
2008 A conf
Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits.
DATE
Jie Zhang, Nishant Patil, Subhasish Mitra
2008 J jnl
Design Methods for Misaligned and Mispositioned Carbon-Nanotube Immune Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Nishant Patil, Jie Deng, Albert Lin, H.-S. Philip Wong, Subhasish Mitra
2007 A* conf
Automated Design of Misaligned-Carbon-Nanotube-Immune Circuits.
DAC
Nishant Patil, Jie Deng, H.-S. Philip Wong, Subhasish Mitra
2007 — conf
Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections.
ISSCC
Jie Deng, Nishant Patil, Koungmin Ryu, Alexander Badmaev, Chongwu Zhou, Subhasish Mitra, H.-S. Philip Wong
2006 A conf
Signature Analyzer Design for Yield Learning Support.
ITC
Nishant Patil, Subhasish Mitra, Steven S. Lumetta
2005 J jnl
X-Tolerant Test Response Compaction.
IEEE Des. Test Comput.
Subhasish Mitra, Steven S. Lumetta, Michael Mitzenmacher, Nishant Patil