Ning-Chi Huang

19 papers A* 1A 5Misc 1Journal 7Unranked 5

Year	Rank	Type	Title / Venue / Authors
2025	A	`conf`	Integrating Neural Architecture Search and Rematerialization for Efficient On-Device Learning. GECCO Chih-Ling Chen, Kai-Chiang Wu, Ning-Chi Huang
2025	A*	`conf`	Palu: KV-Cache Compression with Low-Rank Projection. ICLR Chi-Chih Chang, Wei-Cheng Lin, Chien-Yu Lin, Chong-Yan Chen, Yu-Fang Hu, Pei-Shuo Wang, Ning-Chi Huang, Luis Ceze, Mohamed S. Abdelfattah, Kai-Chiang Wu
2025	J	`jnl`	Speculate Deep and Accurate: Lossless and Training-Free Acceleration for Offloaded LLMs via Substitute Speculative Decoding. CoRR Pei-Shuo Wang, Jian-Jia Chen, Chun-Che Yang, Chi-Chih Chang, Ning-Chi Huang, Mohamed S. Abdelfattah, Kai-Chiang Wu
2025	A	`conf`	Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration. FPGA Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu
2025	J	`jnl`	Systolic Sparse Tensor Slices: FPGA Building Blocks for Sparse and Dense AI Acceleration. CoRR Endri Taka, Ning-Chi Huang, Chi-Chih Chang, Kai-Chiang Wu, Aman Arora, Diana Marculescu
2024	—	`conf`	ELSA: Exploiting Layer-wise N: M Sparsity for Vision Transformer Acceleration. CVPR Workshops Ning-Chi Huang, Chi-Chih Chang, Wei-Cheng Lin, Endri Taka, Diana Marculescu, Kai-Chiang Wu
2024	J	`jnl`	ELSA: Exploiting Layer-wise N:M Sparsity for Vision Transformer Acceleration. CoRR Ning-Chi Huang, Chi-Chih Chang, Wei-Cheng Lin, Endri Taka, Diana Marculescu, Kai-Chiang Wu
2024	A	`conf`	FLORA: Fine-grained Low-Rank Architecture Search for Vision Transformer. WACV Chi-Chih Chang, Yuan-Yao Sung, Shixing Yu, Ning-Chi Huang, Diana Marculescu, Kai-Chiang Wu
2024	J	`jnl`	Palu: Compressing KV-Cache with Low-Rank Projection. CoRR Chi-Chih Chang, Wei-Cheng Lin, Chien-Yu Lin, Chong-Yan Chen, Yu-Fang Hu, Pei-Shuo Wang, Ning-Chi Huang, Luis Ceze, Kai-Chiang Wu
2024	J	`jnl`	V"Mean"ba: Visual State Space Models only need 1 hidden dimension. CoRR Tien-Yu Chi, Hung-Yueh Chiang, Chi-Chih Chang, Ning-Chi Huang, Kai-Chiang Wu
2023	—	`conf`	Decomposable Architecture and Fault Mitigation Methodology for Deep Learning Accelerators. ISQED Ning-Chi Huang, Min-Syue Yang, Ya-Chu Chang, Kai-Chiang Wu
2023	J	`jnl`	FLORA: Fine-grained Low-Rank Architecture Search for Vision Transformer. CoRR Chi-Chih Chang, Yuan-Yao Sung, Shixing Yu, Ning-Chi Huang, Diana Marculescu, Kai-Chiang Wu
2022	J	`jnl`	Timing Variability-Aware Analysis and Optimization for Variable-Latency Designs. IEEE Trans. Very Large Scale Integr. Syst. Ning-Chi Huang, Chao-Wei Cheng, Kai-Chiang Wu
2021	Misc	`conf`	An Energy-Efficient Approximate Systolic Array Based on Timing Error Prediction and Prevention. VTS Ning-Chi Huang, Wei-Kai Tseng, Huan-Jan Chou, Kai-Chiang Wu
2021	—	`conf`	ONNC Compiler Used in Fault-Mitigating Mechanisms Analysis on NVDLA-Based and ReRAM-Based Edge AI Chip Design. VLSI-DAT Samuel Liu, Jen-Ho Kuo, Luba Tang, Ning-Chi Huang, Der-Yu Tsai, M.-H. Yang, Kai-Chiang Wu
2020	—	`conf`	Fault-Tolerance Mechanism Analysis on NVDLA-Based Design Using Open Neural Network Compiler and Quantization Calibrator. VLSI-DAT Shu-Ming Liu, Luba Tang, Ning-Chi Huang, Der-Yu Tsai, Ming-Xue Yang, Kai-Chiang Wu
2019	—	`conf`	Exploration and Exploitation of Dual Timing Margins for Improving Power Efficiency of Variable-Latency Designs. ISVLSI Ning-Chi Huang, Yu-Guang Chen, Kai-Chiang Wu
2019	A	`conf`	Sensor-Based Approximate Adder Design for Accelerating Error-Tolerant and Deep-Learning Applications. DATE Ning-Chi Huang, Szu-Ying Chen, Kai-Chiang Wu
2017	A	`conf`	Analysis and optimization of variable-latency designs in the presence of timing variability. DATE Chang-Lin Tsai, Chao-Wei Cheng, Ning-Chi Huang, Kai-Chiang Wu