Nils Przigoda

31 papers A* 1A 3C 7Journal 6Unranked 12
YearRankTypeTitle / Venue / Authors
2023 — conf
Coverage-Driven Test Automation for Highly-Configurable Railway Systems.
VaMoS
Domenik Eichhorn, Tobias Pett, Nils Przigoda, Jessica Kindsvater, Christoph Seidl, Ina Schaefer
2023 J jnl
Design Tasks and Their Complexity for Hybrid Level 3 of the European Train Control System.
CoRR
Stefan Engels, Tom Peham, Judith Przigoda, Nils Przigoda, Robert Wille
2022 — conf
Optimal Railway Routing Using Virtual Subsections.
RSSRail
Tom Peham, Judith Przigoda, Nils Przigoda, Robert Wille
2021 A conf
Towards Automatic Design and Verification for Level 3 of the European Train Control System.
DATE
Robert Wille, Tom Peham, Judith Przigoda, Nils Przigoda
2019 — conf
Four-Valued Logic in UML/OCL Models: A "Playground" for the MVL Community.
ISMVL
Nils Przigoda, Judith Przigoda, Robert Wille
2018 C conf
Analyzing Frame Conditions in UML/OCL Models - Consistency Equivalence and Independence.
MODELSWARD
Philipp Niemann, Nils Przigoda, Robert Wille, Rolf Drechsler
2018 — book
Automated Validation & Verification of UML/OCL Models Using Satisfiability Solvers
Nils Przigoda, Robert Wille, Judith Przigoda, Rolf Drechsler
2018 J jnl
Frame conditions in the automatic validation and verification of UML/OCL models: A symbolic formulation of
Comput. Lang. Syst. Struct.
Nils Przigoda, Philipp Niemann, Jonas Gomes Filho, Robert Wille, Rolf Drechsler
2018 — conf
Generation and Validation of Frame Conditions in Formal Models.
MODELSWARD (Revised Selected Papers)
Philipp Niemann, Nils Przigoda, Robert Wille, Rolf Drechsler
2017 C conf
More than true or false: native support of irregular values in the automatic validation & verification of UML/OCL models.
MEMOCODE
Nils Przigoda, Philipp Niemann, Judith Peters, Frank Hilken, Robert Wille, Rolf Drechsler
2017 — —
SMT-based validation & verification of UML-OCL models.
Nils Przigoda
2017 J jnl
Towards a Verification Flow Across Abstraction Levels Verifying Implementations Against Their Formal Specification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pablo González de Aledo, Nils Przigoda, Robert Wille, Rolf Drechsler, Pablo Sánchez Espeso
2016 J jnl
Analyzing Inconsistencies in UML/OCL Models.
J. Circuits Syst. Comput.
Nils Przigoda, Robert Wille, Rolf Drechsler
2016 C conf
Clocks vs. instants relations: Verifying CCSL time constraints in UML/MARTE models.
MEMOCODE
Judith Peters, Nils Przigoda, Robert Wille, Rolf Drechsler
2016 — conf
Fault Detection in Parity Preserving Reversible Circuits.
ISMVL
Nils Przigoda, Gerhard W. Dueck, Robert Wille, Rolf Drechsler
2016 C conf
Frame conditions in symbolic representations of UML/OCL models.
MEMOCODE
Nils Przigoda, Jonas Gomes Filho, Philipp Niemann, Robert Wille, Rolf Drechsler
2016 A conf
Ground setting properties for an efficient translation of OCL in SMT-based model finding.
MoDELS
Nils Przigoda, Robert Wille, Rolf Drechsler
2016 — conf
Integrating an SMT-Based ModelFinder into USE.
MoDeVVa@MoDELS
Nils Przigoda, Frank Hilken, Judith Peters, Robert Wille, Martin Gogolla, Rolf Drechsler
2016 — conf
Towards a model-based verification methodology for Complex Swarm Systems (Invited paper).
ISED
Jonas Gomes Filho, Nils Przigoda, Robert Wille, Rolf Drechsler
2016 J jnl
Verifying the structure and behavior in UML/OCL models using satisfiability solvers.
IET Cyper-Phys. Syst.: Theory & Appl.
Nils Przigoda, Mathias Soeken, Robert Wille, Rolf Drechsler
2015 A* conf
A generic representation of CCSL time constraints for UML/MARTE models.
DAC
Judith Peters, Robert Wille, Nils Przigoda, Ulrich Kühne, Rolf Drechsler
2015 A conf
Checking concurrent behavior in UML/OCL models.
MoDELS
Nils Przigoda, Christoph Hilken, Robert Wille, Jan Peleska, Rolf Drechsler
2015 C conf
Contradiction Analysis for Inconsistent Formal Models.
DDECS
Nils Przigoda, Robert Wille, Rolf Drechsler
2015 C conf
Leveraging the Analysis for Invariant Independence in Formal System Models.
DSD
Nils Przigoda, Robert Wille, Rolf Drechsler
2015 — conf
Towards an Automatic Approach for Restricting UML/OCL Invariability Clauses.
MoDeVVa@MoDELS
Nils Przigoda, Judith Peters, Mathias Soeken, Robert Wille, Rolf Drechsler
2015 — conf
Verbesserung der Fehlersuche in inkonsistenten formalen Modellen (Erweiterte Zusammenfassung).
MBMV
Nils Przigoda, Robert Wille, Rolf Drechsler
2015 C conf
Verification-Driven Design Across Abstraction Levels: A Case Study.
DSD
Nils Przigoda, Jannis Stoppe, Julia Seiter, Robert Wille, Rolf Drechsler
2013 — conf
A compact and efficient SAT encoding for quantum circuits.
AFRICON
Robert Wille, Nils Przigoda, Rolf Drechsler
2013 J jnl
Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits.
J. Multiple Valued Log. Soft Comput.
Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler
2012 — conf
Exact Synthesis of Toffoli Gate Circuits with Negative Control Lines.
ISMVL
Robert Wille, Mathias Soeken, Nils Przigoda, Rolf Drechsler
2012 — conf
Synthesis of reversible circuits with minimal lines for large functions.
ASP-DAC
Mathias Soeken, Robert Wille, Christoph Hilken, Nils Przigoda, Rolf Drechsler