Nilanka T. Rajapaksha

11 papers C 1Journal 10
YearRankTypeTitle / Venue / Authors
2017 J jnl
DFT Computation Using Gauss-Eisenstein Basis: FFT Algorithms and VLSI Architectures.
IEEE Trans. Computers
Diego F. G. Coelho, Renato J. Cintra, Nilanka T. Rajapaksha, Gihan J. Mendis, Arjuna Madanayake, Vassil S. Dimitrov
2017 J jnl
Fast FPGA-architecture for fan/beam-steering in wave-digital RF aperture arrays.
Multidimens. Syst. Signal Process.
Sewwandi Wijayaratna, Nilanka T. Rajapaksha, Arjuna Madanayake, Len T. Bruton
2017 J jnl
VLSI Computational Architectures for the Arithmetic Cosine Transform.
CoRR
Nilanka T. Rajapaksha, Arjuna Madanayake, Renato J. Cintra, Jithra Adikari, Vassil S. Dimitrov
2015 J jnl
A Row-parallel 8×8 2-D DCT Architecture Using Algebraic Integer Based Exact Computation.
CoRR
Arjuna Madanayake, Renato J. Cintra, Denis Onen, Vassil S. Dimitrov, Nilanka T. Rajapaksha, Leonard T. Bruton, Amila Edirisuriya
2015 J jnl
Systolic array architecture for steerable multibeam VHF wave-digital RF apertures.
IEEE Trans. Aerosp. Electron. Syst.
Nilanka T. Rajapaksha, Arjuna Madanayake, Leonard T. Bruton
2015 J jnl
VLSI Computational Architectures for the Arithmetic Cosine Transform.
IEEE Trans. Computers
Nilanka T. Rajapaksha, Arjuna Madanayake, Renato J. Cintra, Jithra Adikari, Vassil S. Dimitrov
2014 J jnl
2D space-time wave-digital multi-fan filter banks for signals consisting of multiple plane waves.
Multidimens. Syst. Signal Process.
Nilanka T. Rajapaksha, Arjuna Madanayake, Leonard T. Bruton
2013 J jnl
A Single-Channel Architecture for Algebraic Integer-Based 8 × 8 2-D DCT Computation.
IEEE Trans. Circuits Syst. Video Technol.
Amila Edirisuriya, Arjuna Madanayake, Renato J. Cintra, Vassil S. Dimitrov, Nilanka T. Rajapaksha
2013 J jnl
Asynchronous Realization of Algebraic Integer-Based 2D DCT Using Achronix Speedster SPD60 FPGA.
J. Electr. Comput. Eng.
Nilanka T. Rajapaksha, Amila Edirisuriya, Arjuna Madanayake, Renato J. Cintra, Denis Onen, Ihab Amer, Vassil S. Dimitrov
2012 J jnl
A Row-Parallel 8 × 8 2-D DCT Architecture Using Algebraic Integer-Based Exact Computation.
IEEE Trans. Circuits Syst. Video Technol.
Arjuna Madanayake, Renato J. Cintra, Denis Onen, Vassil S. Dimitrov, Nilanka T. Rajapaksha, Leonard T. Bruton, Amila Edirisuriya
2011 C conf
Asynchronous-QDI 2D IIR digital filter circuits.
ISCAS
Nilanka T. Rajapaksha, Arjuna Madanayake