Nicolas Butzen

21 papers Journal 7Unranked 14
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Monolithic 5.7 A/mm
IEEE J. Solid State Circuits
Xiaosen Liu, Jingshu Yu, Minxiang Gong, Nicolas Butzen, Sheldon Weng, Harish K. Krishnamurthy, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Christopher Pelto, James W. Tschanz, Vivek De
2024 — conf
28.4 A Monolithic 12.7W/mm
ISSCC
Nicolas Butzen, Harish Krishnamurthy, Jingshu Yu, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Chris Pelto, James W. Tschanz
2024 J jnl
A Monolithic 12.7 W/mm
IEEE J. Solid State Circuits
Nicolas Butzen, Harish K. Krishnamurthy, Jingshu Yu, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, James Waldemer, Christopher Pelto, James W. Tschanz
2024 — conf
A Monolithic 5.7A/mm
VLSI Technology and Circuits
Jingshu Yu, Xiaosen Liu, Minxiang Gong, Nicolas Butzen, Sheldon Weng, Harish K. Krishnamurthy, Krishnan Ravichandran, Ramez Hosseinian Ahangharnejhad, Jim Waldemer, Christopher Pelto, James W. Tschanz, Vivek De
2023 — conf
A Monolithic 26A/mm
ISSCC
Nicolas Butzen, Harish Krishnamurthy, Zakir K. Ahmed, Sheldon Weng, Krishnan Ravichandran, Michael Zelikson, James W. Tschanz, Jonathan Douglas
2022 — conf
A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer.
ISSCC
Xiaosen Liu, Harish Krishnamurthy, Renzhi Liu, Krishnan Ravichandran, Zakir K. Ahmed, Nachiket V. Desai, Nicolas Butzen, James W. Tschanz, Vivek De
2022 J jnl
A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors.
IEEE J. Solid State Circuits
Nachiket V. Desai, Han Wui Then, Jingshu Yu, Harish K. Krishnamurthy, William J. Lambert, Nicolas Butzen, Sheldon Weng, Christopher Schaef, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2021 — conf
A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors.
VLSI Circuits
Nachiket V. Desai, Harish K. Krishnamurthy, William J. Lambert, Jingshu Yu, Han Wui Then, Nicolas Butzen, Sheldon Weng, Christopher Schaef, N. Nidhi, Marko Radosavljevic, Johann Rode, Justin Sandford, Kaladhar Radhakrishnan, Krishnan Ravichandran, Bernhard Sell, James W. Tschanz, Vivek De
2020 — conf
Digital Control of Switching and Linear Integrated Voltage Regulators.
CICC
Harish K. Krishnamurthy, Zakir A. Khondker, Xiaosen Liu, Nachiket V. Desai, Suhwan Kim, Nicolas Butzen, Sally Amin, Sheldon Weng, Krishnan Ravichandran, James W. Tschanz, Vivek De
2019 — conf
Advanced Multiphasing: Pushing the Envelope of Fully Integrated Power Conversion.
CICC
Nicolas Butzen, Michiel Steyaert
2019 J jnl
Design of Single-Topology Continuously Scalable-Conversion-Ratio Switched- Capacitor DC-DC Converters.
IEEE J. Solid State Circuits
Nicolas Butzen, Michiel Steyaert
2018 — conf
A Single-Topology Continuously-Scalable-Conversion-Ratio Fully Integrated Switched-Capacitor DC-DC Converter with 0-to-2.22V Output and 93% Peak-Efficiency.
VLSI Circuits
Nicolas Butzen, Michiel Steyaert
2018 — conf
A capacitive DC-DC converter for stacked loads with wide range DVS achieving 98.2% peak efficiency in 40nm CMOS.
CICC
Tim Thielemans, Nicolas Butzen, Athanasios Sarafianos, Michiel Steyaert, Filip Tavernier
2017 — conf
10.1 A 1.1W/mm
ISSCC
Nicolas Butzen, Michiel Steyaert
2017 J jnl
Design of Soft-Charging Switched-Capacitor DC-DC Converters Using Stage Outphasing and Multiphase Soft-Charging.
IEEE J. Solid State Circuits
Nicolas Butzen, Michel S. J. Steyaert
2017 — conf
Fully integrated power management: The missing link?
ECCTD
Michiel Steyaert, Athanasios Sarafianos, Nicolas Butzen, Elly De Pelecijn
2017 J jnl
MIMO Switched-Capacitor DC-DC Converters Using Only Parasitic Capacitances Through Scalable Parasitic Charge Redistribution.
IEEE J. Solid State Circuits
Nicolas Butzen, Michiel S. J. Steyaert
2016 — conf
12.2 A 94.6%-efficiency fully integrated switched-capacitor DC-DC converter in baseline 40nm CMOS using scalable parasitic charge redistribution.
ISSCC
Nicolas Butzen, Michiel Steyaert
2016 — conf
MIMO Switched-Capacitor converter using only parasitic capacitance with Scalable Parasitic Charge Redistribution.
ESSCIRC
Nicolas Butzen, Michiel Steyaert
2016 J jnl
Scalable Parasitic Charge Redistribution: Design of High-Efficiency Fully Integrated Switched-Capacitor DC-DC Converters.
IEEE J. Solid State Circuits
Nicolas Butzen, Michiel S. J. Steyaert
2015 — conf
When hardware is free, power is expensive! Is integrated power management the solution?
ESSCIRC
Michiel Steyaert, Filip Tavernier, Hans Meyvaert, Athanasios Sarafianos, Nicolas Butzen