Neus Vidal

13 papers Journal 8Unranked 5
YearRankTypeTitle / Venue / Authors
2022 J jnl
3D-Printed Broadband Power Divider Based on Helical-Microstrip Transmission Line Segments.
IEEE Access
José María López-Villegas, Neus Vidal, Arnau Salas Barenys
2022 J jnl
Microstrip-Fed 3D-Printed H-Sectorial Horn Phased Array.
Sensors
Ivan Zhou, Lluís Pradell, José María López-Villegas, Neus Vidal, Miquel Albert, Lluis Jofre, Jordi Romeu
2022 J jnl
Very compact 3D-printed folded branch-line hybrid coupler based on loaded helical-microstrip transmission lines.
Integr.
Arnau Salas Barenys, Neus Vidal, José María López-Villegas
2020 J jnl
3D-Printed UHF-RFID Tag for Embedded Applications.
IEEE Access
Neus Vidal, José María López-Villegas, Jordi Romeu, Arnau Salas Barenys, Aleix Garcia-Miquel, Giselle González-López, Lluis Jofre
2020 — conf
Compact 3D-Printed Folded Branch-Line Hybrid Coupler based on Helical-Microstrip Transmission Lines.
DCIS
Arnau Salas Barenys, Neus Vidal, José María López-Villegas
2020 — conf
Design and Characterization of Non-planar 3D-printed Passive UHF-RFID Tag.
DCIS
Neus Vidal, Arnau Salas Barenys, Aleix Garcia, Jordi Romeu, Giselle González, Lluis Jofre, José María López-Villegas
2019 — conf
3D Printed 5-Order Butterworth Passive Filter with Conical Inductors for RF Broadband Applications.
DCIS
Arnau Salas Barenys, Neus Vidal, José María López-Villegas
2019 J jnl
Analysis and Optimization of Multi-Winding Toroidal Inductors for Use in Multilayered Technologies.
IEEE Access
Neus Vidal, José María López-Villegas, Jesús A. del Alamo
2018 — conf
Fabrication of Full-3D Printed Electronics RF Passive Components and Circuits.
PRIME
Arnau Salas Barenys, Neus Vidal, Javier J. Sieiro, José María López-Villegas, B. Medina-Rodriguez, F. M. Ramos
2018 J jnl
Quasi-static PEEC planar solver using a weighted combination of 2D and 3D analytical Green's functions and a predictive meshing generator.
Integr.
Saiyd Ahyoune, Javier J. Sieiro, Tomás Carrasco Carrillo, Neus Vidal, José María López-Villegas, Elisenda Roca, Francisco V. Fernández
2017 J jnl
An Automated Design Methodology of RF Circuits by Using Pareto-Optimal Fronts of EM-Simulated Inductors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Reinier Gonzalez-Echevarria, Elisenda Roca, Rafael Castro-López, Francisco V. Fernández, Javier J. Sieiro, José María López-Villegas, Neus Vidal
2017 — conf
Extending the frequency range of quasi-static electromagnetic solvers.
SMACD
Saiyd Ahyoune, Javier J. Sieiro, Tomás Carrasco Carrillo, Neus Vidal, José María López-Villegas, Elisenda Roca, Francisco V. Fernández
2014 J jnl
Automated Generation of the Optimal Performance Trade-Offs of Integrated Inductors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Reinier Gonzalez-Echevarria, Rafael Castro-López, Elisenda Roca, Francisco V. Fernández, Javier J. Sieiro, Neus Vidal, José María López-Villegas