Nazanin Mansouri

21 papers A 2B 1C 1Journal 3Unranked 14
YearRankTypeTitle / Venue / Authors
2009 J jnl
Power Optimization With Power Islands Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Deniz Dal, Nazanin Mansouri
2008 — conf
Automated formal verification of scheduling with speculative code motions.
ACM Great Lakes Symposium on VLSI
Youngsik Kim, Nazanin Mansouri
2008 — conf
Determining the Optimal Number of Islands in Power Islands Synthesis.
ISVLSI
Deniz Dal, Nazanin Mansouri
2007 — conf
A high-level register optimization technique for minimizing leakage and dynamic power.
ACM Great Lakes Symposium on VLSI
Deniz Dal, Nazanin Mansouri
2007 J jnl
Reliability-Centric High-Level Synthesis
CoRR
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
2006 — conf
An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors.
ISCIS
Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Ozcan Ozturk
2006 — conf
Power Islands: A High-Level Technique for Counteracting Leakage in Deep Sub-Micron.
ISQED
Deniz Dal, Adrian Nunez, Nazanin Mansouri
2006 — conf
Pre-Layout Estimation of Interconnect Lengths for Digital Integrated Circuits.
CONIELECOMP
Shweta Shah, Nazanin Mansouri, Adrián Núñez-Aldana
2005 — conf
An ILP Formulation for Reliability-Oriented High-Level Synthesis.
ISQED
Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
2005 — conf
Constraint-based Code mapping for heterogeneous Chip multiprocessors.
SoCC
Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Özcan Özturk
2005 — conf
Exploiting PSL standard assertions in a theorem-proving-based verification environment.
ACM Great Lakes Symposium on VLSI
Youngsik Kim, Parija Sule, Nazanin Mansouri
2005 — conf
Reliability-Centric Hardware/Software Co-Design.
ISQED
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
2005 A conf
Reliability-Centric High-Level Synthesis.
DATE
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
2004 — conf
Automated Formal Verification of Scheduling Process Using Finite State Machines with Datapath (FSMD).
ISQED
Youngsik Kim, Shekhar Kopuri, Nazanin Mansouri
2004 — conf
Enhancing scheduling solutions through ant colony optimization.
ISCAS (5)
Shekhar Kopuri, Nazanin Mansouri
2004 — conf
Exploiting OVL standard assertions in a theorem-proving-based verification environment.
Circuits, Signals, and Systems
Anli He, Parija Sule, Youngsik Kim, Nazanin Mansouri
2003 — conf
Derving Intermediary RTLs for Verification of Pipelined Synthesized Designs.
VLSI
Suleyman Tosun, Hakduran Koc, Nazanin Mansouri
2000 J jnl
Automated Correctness Condition Generation for Formal Verification of Synthesized RTL Designs.
Formal Methods Syst. Des.
Nazanin Mansouri, Ranga Vemuri
1999 A conf
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs.
DATE
Nazanin Mansouri, Ranga Vemuri
1998 B conf
A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool.
FMCAD
Nazanin Mansouri, Ranga Vemuri
1998 C conf
Automatic data path abstraction for verification of large scale designs.
ICCD
Viresh Paruthi, Nazanin Mansouri, Ranga Vemuri