Nasser A. Kurd

25 papers C 1Journal 10Unranked 14
YearRankTypeTitle / Venue / Authors
2026 J jnl
A Compact, Highly-Digital Sensor-Fusion-Based Joint V
IEEE J. Solid State Circuits
Hikmet Seha Öztürk, Julian Arenas, Carlos Tokunaga, Nasser A. Kurd, Visvesh S. Sathe
2025 — conf
8.7 A Dual VDD-Temperature Sensor Employing Sensor Fusion with 2.4°C, 9mV (±3σ) Inaccuracy in 65nm CMOS.
ISSCC
Hikmet Seha Öztürk, Julian Arenas, Carlos Tokunaga, Nasser A. Kurd, Visvesh Sathe
2022 — conf
A 2-to-2.48GHz Voltage-Interpolator-Based Fractional-N Type-I Sampling PLL in 22nm FinFET Assisting Fast Crystal Startup.
ISSCC
Somnath Kundu, Timo Huusari, Hao Luo, Abhishek Agrawal, Eduardo Alban, Sarah Shahraini, Thao Xiong, Dan Lake, Stefano Pellerano, Jason Mix, Nasser A. Kurd, Mohamed Abdel-Moneum, Brent R. Carlton
2022 J jnl
A Fast Startup Crystal Oscillator Using Impedance Guided Chirp Injection in 22 nm FinFET CMOS.
IEEE J. Solid State Circuits
Hao Luo, Somnath Kundu, Timo Huusari, Sarah Shahraini, Eduardo Alban, Jason Mix, Nasser A. Kurd, Mohamed Abdel-Moneum, Brent R. Carlton
2022 J jnl
Improving SIMO-Regulated Digital SoC Energy Efficiencies Through Adaptive Clocking and Concurrent Domain Control.
IEEE J. Solid State Circuits
Chi-Hsiang Huang, Yidong Chen, Xun Sun, Arindam Mandal, Venkata Rajesh Pamula, Nasser A. Kurd, Visvesh S. Sathe
2021 — conf
29.3 80ns Fast-Lock 0.4-to-6.5GHz Clock Generator with Self- Referenced Asynchronous Adaptive Droop Mitigation.
ISSCC
Praveen Mosalikanti, Qi Wang, Kuan-Yueh James Shen, Mark Neidengard, Syed Feruz Syed Farooq, Vaughn Grossnickle, Nasser A. Kurd
2021 — conf
A 12MHz/38.4MHz Fast Start-Up Crystal Oscillator using Impedance Guided Chirp Injection in 22nm FinFET CMOS.
CICC
Hao Luo, Somnath Kundu, Chun C. Lee, Rinkle Jain, Sarah Shahraini, Eduardo Alban, Timo Huusari, Jason Mix, Nasser A. Kurd, Mohamed Abdel-Moneum, Brent R. Carlton
2018 J jnl
A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Mark Neidengard, Nasser A. Kurd, Amr Elshazly
2016 — conf
19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS.
ISSCC
Kuan-Yueh James Shen, Syed Feruz Syed Farooq, Yongping Fan, Khoa Minh Nguyen, Qi Wang, Amr Elshazly, Nasser A. Kurd
2016 J jnl
A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process.
IEEE J. Solid State Circuits
Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, George L. Geannopoulos, Jonathan Douglas, Nasser A. Kurd
2015 — conf
A system-verilog behavioral model for PLLs for pre-silicon validation and top-down design methodology.
CICC
Amr Lotfy, Syed Feruz Syed Farooq, Qi S. Wang, Soner Yaldiz, Praveen Mosalikanti, Nasser A. Kurd
2015 — conf
Broadwell: A family of IA 14nm processors.
VLSIC
Ankireddy Nalamalpu, Nasser A. Kurd, Anant Deval, Christopher Mozak, Jonathan Douglas, Ashish Khanna, Fabrice Paillet, Gerhard Schrom, Boyd Phelps
2015 J jnl
Haswell: A Family of IA 22 nm Processors.
IEEE J. Solid State Circuits
Nasser A. Kurd, Muntaquim Chowdhury, Edward Burton, Thomas P. Thomas, Christopher Mozak, Brent Boswell, Praveen Mosalikanti, Mark Neidengard, Anant Deval, Ashish Khanna, Nasirul Chowdhury, Ravi Rajwar, Timothy M. Wilson, Rajesh Kumar
2015 — conf
Low power analog circuit techniques in the 5
CICC
Praveen Mosalikanti, Nasser A. Kurd, Christopher Mozak, Takao Oshita
2014 — conf
5.9 Haswell: A family of IA 22nm processors.
ISSCC
Nasser A. Kurd, Muntaquim Chowdhury, Edward Burton, Thomas P. Thomas, Christopher Mozak, Brent Boswell, Manoj Lal, Anant Deval, Jonathan Douglas, Ali M. El-Husseini, Ankireddy Nalamalpu, Timothy M. Wilson, Matthew Merten, Srinivas Chennupaty, Wilfred Gomes, Rajesh Kumar
2012 — conf
A novel digital loop filter architecture for bang-bang ADPLL.
SoCC
Moataz Abdelfattah, Maged Ghoneima, Yehea I. Ismail, Amr Lotfy, Mohamed Abdelsalam, Mohamed Abdel-Moneum, Nasser A. Kurd, Greg Taylor
2012 — conf
Intel® Core™ i5/i7 QuickPath Interconnect receiver clocking circuits and training algorithm.
VLSI-DAT
Nasirul Chowdhury, Jeff Wight, Christopher Mozak, Nasser A. Kurd
2012 — conf
Modeling the response of Bang-Bang digital PLLs to phase error perturbations.
CICC
Moataz Abdelfattah, Maged Ghoneima, Yehea I. Ismail, Amr Lotfy, Mohamed Abdel-Moneum, Nasser A. Kurd, Greg Taylor
2011 J jnl
A Family of 32 nm IA Processors.
IEEE J. Solid State Circuits
Nasser A. Kurd, Subramani Bhamidipati, Christopher Mozak, Jeffrey L. Miller, Praveen Mosalikanti, Timothy M. Wilson, Ali M. El-Husseini, Mark Neidengard, Ramy E. Aly, Mahadev Nemani, Muntaquim Chowdhury, Rajesh Kumar
2010 — conf
Westmere: A family of 32nm IA processors.
ISSCC
Nasser A. Kurd, Subramani Bhamidipati, Christopher Mozak, Jeffrey L. Miller, Timothy M. Wilson, Mahadev Nemani, Muntaquim Chowdhury
2009 J jnl
Next Generation Intel¯ Core™ Micro-Architecture (Nehalem) Clocking.
IEEE J. Solid State Circuits
Nasser A. Kurd, Praveen Mosalikanti, Mark Neidengard, Jonathan Douglas, Rajesh Kumar
2008 J jnl
Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses.
IEEE Trans. Circuits Syst. I Regul. Pap.
Maged Ghoneima, Muhammad M. Khellah, James W. Tschanz, Yibin Ye, Nasser A. Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail, Vivek K. De
2007 — conf
Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-Voltage Variations and Aging.
ISSCC
James W. Tschanz, Nam-Sung Kim, Saurabh Dighe, Jason Howard, Gregory Ruhl, Sriram R. Vangal, Siva G. Narendra, Yatin Hoskote, Howard Wilson, Carol Lam, Matthew Shuman, Carlos Tokunaga, Dinesh Somasekhar, Stephen Tang, David Finan, Tanay Karnik, Nitin Borkar, Nasser A. Kurd, Vivek De
2005 C conf
A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors.
ICCD
Muhammad M. Khellah, Maged Ghoneima, James W. Tschanz, Yibin Ye, Nasser A. Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail
2001 J jnl
A multigigahertz clocking scheme for the Pentium(R) 4 microprocessor.
IEEE J. Solid State Circuits
Nasser A. Kurd, Javed S. Barkatullah, Rommel O. Dizon, Thomas D. Fletcher, Paul D. Madland