Narayanan Vijaykrishnan

251 papers A* 26A 52B 8C 13Misc 24Journal 60Unranked 65

Year	Rank	Type	Title / Venue / Authors
2018	A	`conf`	Dual Mode Ferroelectric Transistor based Non-Volatile Flip-Flops for Intermittently-Powered Systems. ISLPED Sandeep Krishna Thirumala, Arnab Raha, Hrishikesh Jayakumar, Kaisheng Ma, Narayanan Vijaykrishnan, Vijay Raghunathan, Sumeet Kumar Gupta
2013	J	`jnl`	A highly reliable NBTI Resilient 6T SRAM cell. Microelectron. Reliab. Jawar Singh, Narayanan Vijaykrishnan
2011	A*	`conf`	A case for heterogeneous on-chip interconnects for CMPs. ISCA Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das
2011	A*	`conf`	Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs. ISCA Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das
2011	—	`ch.`	Influence of Stacked 3D Memory/Cache Architectures on GPUs. 3D Integration for NoC-based SoC Architectures Ahmed Al-Maashri, Guangyu Sun, Xiangyu Dong, Yuan Xie, Narayanan Vijaykrishnan
2011	J	`jnl`	RAFT: A router architecture with frequency tuning for on-chip networks. J. Parallel Distributed Comput. Asit K. Mishra, Aditya Yanamandra, Reetuparna Das, Soumya Eachempati, Ravi R. Iyer, Narayanan Vijaykrishnan, Chita R. Das
2011	J	`jnl`	Variation-Aware Task and Communication Mapping for MPSoC Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Feng Wang, Yibo Chen, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan
2010	A	`conf`	A GPU based implementation of Center-Surround Distribution Distance for feature extraction and matching. DATE Aditi Rathi, Michael DeBole, Weina Ge, Robert T. Collins, Narayanan Vijaykrishnan
2010	—	`conf`	A Scalable Bandwidth Aware Architecture for Connected Component Labeling. ISVLSI Vikram Sampath Kumar, Kevin M. Irick, Ahmed Al-Maashri, Narayanan Vijaykrishnan
2010	—	`conf`	A novel si-tunnel FET based SRAM design for ultra low-power 0.3V V ASP-DAC Jawar Singh, Krishnan Ramakrishnan, Saurabh Mookerjea, Suman Datta, Narayanan Vijaykrishnan, Dhiraj K. Pradhan
2010	A	`conf`	Investigating the impact of NBTI on different power saving cache strategies. DATE Andrew J. Ricketts, Jawar Singh, Krishnan Ramakrishnan, Narayanan Vijaykrishnan, Dhiraj K. Pradhan
2010	B	`conf`	Thermal Gradient Aware Clock Skew Scheduling for FPGAs. FPL Sungmin Bae, Narayanan Vijaykrishnan
2010	J	`jnl`	Total Power Optimization for Combinational Logic Using Genetic Algorithms. J. Signal Process. Syst. Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2009	—	`conf`	A Novel Low Area Overhead Body Bias FPGA Architecture for Low Power Applications. ISVLSI Sungmin Bae, Krishnan Ramakrishnan, Narayanan Vijaykrishnan
2009	A*	`conf`	A case for dynamic frequency tuning in on-chip networks. MICRO Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar R. Iyer, Narayanan Vijaykrishnan, Chita R. Das
2009	—	`conf`	A framework for estimating NBTI degradation of microarchitectural components. ASP-DAC Michael DeBole, Krishnan Ramakrishnan, Varsha Balakrishnan, Wenping Wang, Hong Luo, Yu Wang, Yuan Xie, Yu Cao, Narayanan Vijaykrishnan
2009	J	`jnl`	Clone Detection in Sensor Networks with Int. J. Distributed Sens. Networks Richard R. Brooks, P. Y. Govindaraju, Matthew Pirretti, Narayanan Vijaykrishnan, Mahmut T. Kandemir
2009	J	`jnl`	Compiler-assisted soft error detection under performance and energy constraints in embedded systems. ACM Trans. Embed. Comput. Syst. Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2009	A*	`conf`	Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs. HPCA Reetuparna Das, Soumya Eachempati, Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. Das
2009	A	`conf`	Exploiting clock skew scheduling for FPGA. DATE Sungmin Bae, Prasanth Mangalagiri, Narayanan Vijaykrishnan
2009	J	`jnl`	Predicting the performance and reliability of future field programmable gate arrays routing architectures with carbon nanotube bundle interconnect. IET Circuits Devices Syst. Soumya Eachempati, Narayanan Vijaykrishnan, Arthur Nieuwoudt, Yehia Massoud
2008	A	`conf`	Analysis and solutions to issue queue process variation. DSN Niranjan Soundararajan, Aditya Yanamandra, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2008	J	`jnl`	Case Study of Reliability-Aware and Low-Power Design. IEEE Trans. Very Large Scale Integr. Syst. Shengqi Yang, Wenping Wang, Tiehan Lv, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie
2008	C	`conf`	Comparative analysis of NBTI effects on low power and high performance flip-flops. ICCD Krishnan Ramakrishnan, Xiaoxia Wu, Narayanan Vijaykrishnan, Yuan Xie
2008	J	`jnl`	Design Space Exploration for 3-D Cache. IEEE Trans. Very Large Scale Integr. Syst. Yuh-Fang Tsai, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2008	J	`jnl`	Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues. IEEE Trans. Very Large Scale Integr. Syst. Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Arifur Rahman
2008	J	`jnl`	Exploring architectural solutions for energy optimisations in bus-based system-on-chip. IET Comput. Digit. Tech. Suresh Srinivasan, Lin Li, Martino Ruggiero, Federico Angiolini, Narayanan Vijaykrishnan, Luca Benini
2008	—	`conf`	Hierarchical Soft Error Estimation Tool (HSEET). ISQED Krishnan Ramakrishnan, R. Rajaraman, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin, Kenan Unlu
2008	A	`conf`	Impact of dynamic voltage and frequency scaling on the architectural vulnerability of GALS architectures. ISLPED Niranjan Soundararajan, Narayanan Vijaykrishnan, Anand Sivasubramaniam
2008	A*	`conf`	MIRA: A Multi-layered On-Chip Interconnect Router Architecture. ISCA Dongkook Park, Soumya Eachempati, Reetuparna Das, Asit K. Mishra, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das
2008	—	`conf`	Reconfigurable BDD based quantum circuits. NANOARCH Soumya Eachempati, Vinay Saripalli, Narayanan Vijaykrishnan, Suman Datta
2007	A*	`conf`	A novel dimensionally-decomposed router for on-chip communication in 3D architectures. ISCA Jongman Kim, Chrysostomos Nicopoulos, Dongkook Park, Reetuparna Das, Yuan Xie, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das
2007	Misc	`conf`	Architecting Microprocessor Components in 3D Design Space. VLSI Design Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	A	`conf`	Assessing carbon nanotube bundle interconnect for future FPGA architectures. DATE Soumya Eachempati, Arthur Nieuwoudt, Aman Gayasen, Narayanan Vijaykrishnan, Yehia Massoud
2007	—	`conf`	Design of a Dynamic Priority-Based Fast Path Architecture for On-Chip Interconnects. Hot Interconnects Dongkook Park, Reetuparna Das, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Ravishankar R. Iyer, Chita R. Das
2007	J	`jnl`	Design of power-aware FPGA fabrics. Int. J. Embed. Syst. Aman Gayasen, Suresh Srinivasan, Narayanan Vijaykrishnan, Mahmut T. Kandemir
2007	C	`conf`	FPGA routing architecture analysis under variations. ICCD Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan
2007	J	`jnl`	Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip CoRR Greg M. Link, Narayanan Vijaykrishnan
2007	Misc	`conf`	Impact of NBTI on FPGAs. VLSI Design Krishnan Ramakrishnan, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	—	`conf`	Impact of Process Variations on Carbon Nanotube Bundle Interconnect for Future FPGA Architectures. ISVLSI Soumya Eachempati, Narayanan Vijaykrishnan, Arthur Nieuwoudt, Yehia Massoud
2007	—	`conf`	Investigating Simple Low Latency Reliable Multiported Register Files. ISVLSI Andrew J. Ricketts, Madhu Mutyam, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	—	`conf`	Mitigating Thermal Effects on Clock Skew with Dynamically Adaptive Drivers. ISQED Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg M. Link, Narayanan Vijaykrishnan, Yehia Massoud
2007	J	`jnl`	OS-Aware Branch Prediction: Improving Microprocessor Control Flow Prediction for Operating Systems. IEEE Trans. Computers Tao Li, Lizy Kurian John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Juan Rubio
2007	J	`jnl`	On the Detection of Clones in Sensor Networks Using Random Key Predistribution. IEEE Trans. Syst. Man Cybern. Part C Richard R. Brooks, P. Y. Govindaraju, Matthew Pirretti, Narayanan Vijaykrishnan, Mahmut T. Kandemir
2007	J	`jnl`	On-chip bus thermal analysis and optimisation. IET Comput. Digit. Tech. Feng Wang, Michael DeBole, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	J	`jnl`	Optimising power efficiency in trace cache fetch unit. IET Comput. Digit. Tech. Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
2007	J	`jnl`	Reducing non-deterministic loads in low-power caches via early cache set resolution. Microprocess. Microsystems Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	J	`jnl`	Reliability-aware Co-synthesis for Embedded Systems. J. VLSI Signal Process. Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2007	J	`jnl`	Thermal-Aware Task Allocation and Scheduling for Embedded Systems CoRR Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2007	A	`conf`	Thermally robust clocking schemes for 3D integrated circuits. DATE Mosin Mondal, Andrew J. Ricketts, Sami Kirolos, Tamer Ragheb, Greg M. Link, Narayanan Vijaykrishnan, Yehia Massoud
2007	—	`conf`	Variation Analysis of CAM Cells. ISQED Amol Mupid, Madhu Mutyam, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2007	—	`conf`	Variation Impact on SER of Combinational Circuits. ISQED Krishnan Ramakrishnan, R. Rajaraman, Sivaprakasam Suresh, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2007	A	`conf`	Variation-aware task allocation and scheduling for MPSoC. ICCAD Feng Wang, Chrysostomos Nicopoulos, Xiaoxia Wu, Yuan Xie, Narayanan Vijaykrishnan
2007	A	`conf`	Working with process variation aware caches. DATE Madhu Mutyam, Narayanan Vijaykrishnan
2006	—	`conf`	A Distributed Multi-Point Network Interface for Low-Latency, Deadlock-Free On-Chip Interconnects. Nano-Net Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das
2006	Misc	`conf`	A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks. VLSI Design Thomas D. Richardson, Chrysostomos Nicopoulos, Dongkook Park, Narayanan Vijaykrishnan, Yuan Xie, Chita R. Das, Vijay Degalahal
2006	—	`conf`	A Parallel Architecture for Hardware Face Detection. ISVLSI Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	J	`jnl`	An efficient architecture for motion estimation and compensation in the transform domain. IEEE Trans. Circuits Syst. Video Technol. Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2006	J	`jnl`	Block-based frequency scalable technique for efficient hierarchical coding. IEEE Trans. Signal Process. Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
2006	B	`conf`	Compiler-directed thermal management for VLIW functional units. LCTES Madhu Mutyam, Feihui Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2006	—	`conf`	Delay and Energy Efficient Data Transmission for On-Chip Buses. ISVLSI Madhu Mutyam, Melvin Eze, Narayanan Vijaykrishnan, Yuan Xie
2006	A*	`conf`	Design and Management of 3D Chip Multiprocessors Using Network-in-Memory. ISCA Feihui Li, Chrysostomos Nicopoulos, Thomas D. Richardson, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir
2006	A	`conf`	Exploring Fault-Tolerant Network-on-Chip Architectures. DSN Dongkook Park, Chrysostomos Nicopoulos, Jongman Kim, Narayanan Vijaykrishnan, Chita R. Das
2006	A*	`conf`	FLAW: FPGA lifetime awareness. DAC Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan, Karthik Sarpatwari
2006	—	`conf`	Geometric Tiling for Reducing Power Consumption in Structured Matrix Operations. SoCC G. Chen, Liping Xue, Jungsub Kim, Kanwaldeep Sobti, Lanping Deng, Xiaobai Sun, Nikos Pitsianis, Chaitali Chakrabarti, Mahmut T. Kandemir, Narayanan Vijaykrishnan
2006	—	`conf`	Interconnect and Thermal-aware Floorplanning for 3D Microprocessors. ISQED Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	J	`jnl`	Inverse discrete cosine transform architecture exploiting sparseness and symmetry properties. IEEE Trans. Circuits Syst. Video Technol. Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	—	`conf`	Leakage Optimized DECAP Design for FPGAs. APCCAS Balaji Vaidyanathan, Suresh Srinivasan, Yuan Xie, Narayanan Vijaykrishnan, Rong Luo
2006	—	`conf`	Object duplication for improving reliability. ASP-DAC Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	A	`conf`	On-chip bus thermal analysis and optimization. DATE Feng Wang, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	—	`conf`	Performance Improvements through Timing Driven Reconfiguration of Black-Boxes in Platform FPGAs. SoCC Priya Sundararajan, Sridhar Krishnamurthy, Narayanan Vijaykrishnan, Kamal Chaudhary, Rajeev Jayaraman
2006	A	`conf`	Priority scheduling in digital microfluidics-based biochips. DATE Andrew J. Ricketts, Kevin M. Irick, Narayanan Vijaykrishnan, Mary Jane Irwin
2006	—	`ed.`	Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006 ACM Great Lakes Symposium on VLSI Gang Qu, Yehea I. Ismail, Narayanan Vijaykrishnan, Hai Zhou
2006	—	`conf`	Process Variation Aware Parallelization Strategies for MPSoCs. SoCC Suresh Srinivasan, Raghavan Ramadoss, Narayanan Vijaykrishnan
2006	J	`jnl`	Reducing dynamic and leakage energy in VLIW architectures. ACM Trans. Embed. Comput. Syst. Wei Zhang, Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2006	J	`jnl`	Reliability Concerns in Embedded System Designs. Computer Narayanan Vijaykrishnan, Yuan Xie
2006	—	`conf`	Reliability-Aware SOC Voltage Islands Partition and Floorplan. ISVLSI Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie
2006	Misc	`conf`	SEAT-LA: A Soft Error Analysis Tool for Combinational Logic. VLSI Design R. Rajaraman, Jungsub Kim, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2006	Misc	`conf`	Switch Box Architectures for Three-Dimensional FPGAs. FCCM Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Arif Rahman
2006	J	`jnl`	The Sleep Deprivation Attack in Sensor Networks: Analysis and Methods of Defense. Int. J. Distributed Sens. Networks Matthew Pirretti, Sencun Zhu, Narayanan Vijaykrishnan, Patrick D. McDaniel, Mahmut T. Kandemir, Richard R. Brooks
2006	—	`conf`	Thermal Trends in Emerging Technologies. ISQED Greg M. Link, Narayanan Vijaykrishnan
2006	A	`conf`	Thermal characterization and optimization in platform FPGAs. ICCAD Priya Sundararajan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan
2006	—	`conf`	Transaction Level Error Susceptibility Model for Bus Based SoC Architectures. ISQED Ing-Chao Lin, Suresh Srinivasan, Narayanan Vijaykrishnan, Nagu R. Dhanwada
2006	—	`conf`	Variation Aware Placement for FPGAs. ISVLSI Suresh Srinivasan, Narayanan Vijaykrishnan
2006	A*	`conf`	ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers. MICRO Chrysostomos Nicopoulos, Dongkook Park, Jongman Kim, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das
2005	—	`conf`	A Data-Driven Approach for Embedded Security. ISVLSI Hendra Saputra, Ozcan Ozturk, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Richard R. Brooks
2005	J	`jnl`	A Holistic Approach to Designing Energy-Efficient Cluster Interconnects. IEEE Trans. Computers Eun Jung Kim, Greg M. Link, Ki Hwan Yum, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Chita R. Das
2005	Misc	`conf`	A Nanosensor Array-Based VLSI Gas Discriminator. VLSI Design Kevin M. Irick, Wei Xu, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	A*	`conf`	A low latency router supporting adaptivity for on-chip interconnects. DAC Jongman Kim, Dongkook Park, Theo Theocharides, Narayanan Vijaykrishnan, Chita R. Das
2005	Misc	`conf`	Accurate Stacking Effect Macro-Modeling of Leakage Power in Sub-100nm Circuits. VLSI Design Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Yuan Xie, Wenping Wang
2005	J	`jnl`	An integer linear programming-based tool for wireless sensor networks. J. Parallel Distributed Comput. Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	J	`jnl`	Analysis of Error Recovery Schemes for Networks on Chips. IEEE Des. Test Comput. Srinivasan Murali, Theo Theocharides, Narayanan Vijaykrishnan, Mary Jane Irwin, Luca Benini, Giovanni De Micheli
2005	J	`jnl`	Analyzing data reuse for cache reconfiguration. ACM Trans. Embed. Comput. Syst. Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	—	`conf`	Cluster-based detection of SEU-caused errors in LUTs of SRAM-based FPGAs. ASP-DAC E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan
2005	A	`conf`	Compiler-Directed Instruction Duplication for Soft Error Detection. DATE Jie S. Hu, Feihui Li, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	J	`jnl`	Compiler-directed high-level energy estimation and optimization. ACM Trans. Embed. Comput. Syst. Ismail Kadayif, Mahmut T. Kandemir, Guilin Chen, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
2005	—	`conf`	Design and analysis of an NoC architecture from performance, reliability and energy perspective. ANCS Jongman Kim, Dongkook Park, Chrysostomos Nicopoulos, Narayanan Vijaykrishnan, Chita R. Das
2005	—	`conf`	Designing reliable circuit in the presence of soft errors. ASP-DAC Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2005	Misc	`conf`	Detecting SEU-Caused Routing Errors in SRAM-Based FPGAs. VLSI Design E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan
2005	J	`jnl`	Editorial. ACM J. Emerg. Technol. Comput. Syst. Mary Jane Irwin, Narayanan Vijaykrishnan
2005	A	`conf`	Efficient methodology for detection and correction of SEU-based interconnect errors in FPGAs using partial reconfiguration (abstract only). FPGA E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan
2005	A*	`conf`	Exploring technology alternatives for nano-scale FPGA interconnects. DAC Aman Gayasen, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	—	`conf`	High Performance Array Processor for Video Decoding. ISVLSI Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	A	`conf`	Hotspot Prevention Through Runtime Reconfiguration in Network-On-Chip. DATE Greg M. Link, Narayanan Vijaykrishnan
2005	Misc	`conf`	Implementing LDPC Decoding on Network-on-Chip. VLSI Design Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	J	`jnl`	Improving Java performance using dynamic method migration on FPGAs. Int. J. Embed. Syst. Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo
2005	Misc	`conf`	Influence of Leakage Reduction Techniques on Delay/Leakage Uncertainty. VLSI Design Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2005	—	`conf`	Leakage control in FPGA routing fabric. ASP-DAC Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Tim Tuan
2005	A	`conf`	Leakage-Aware Interconnect for On-Chip Network. DATE Yuh-Fang Tsai, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2005	—	`conf`	Low-leakage robust SRAM cell design for sub-100nm technologies. ASP-DAC Shengqi Yang, Wayne H. Wolf, Wenping Wang, Narayanan Vijaykrishnan, Yuan Xie
2005	J	`jnl`	Networks on Chip (NoC): Interconnects of Next Generation Systems on Chip. Adv. Comput. Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin
2005	A	`conf`	Online Detection and Diagnosis of Multiple Configuration Upsets in LUTs of SRAM-Based FPGAs. IPDPS E. Syam Sundar Reddy, Vikram Chandrasekhar, Milagros Sashikánth, V. Kamakoti, Narayanan Vijaykrishnan
2005	A	`conf`	Power Attack Resistant Cryptosystem Design: A Dynamic Voltage and Frequency Switching Approach. DATE Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan, Dimitrios N. Serpanos, Yuan Xie
2005	J	`jnl`	Power and Performance Analysis of Motion Estimation Based on Hardware and Software Realizations. IEEE Trans. Computers Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan
2005	A	`conf`	Simultaneous Partitioning and Frequency Assignment for On-Chip Bus Architectures. DATE Suresh Srinivasan, Lin Li, Narayanan Vijaykrishnan
2005	—	`conf`	Simultaneous memory and bus partitioning for SoC architectures. SoCC Suresh Srinivasan, Federico Angiolini, Martino Ruggiero, Luca Benini, Narayanan Vijaykrishnan
2005	J	`jnl`	Soft errors issues in low-power caches. IEEE Trans. Very Large Scale Integr. Syst. Vijay Degalahal, Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2005	A	`conf`	Soft errors: is the concern for soft-errors overblown? ITC Narayanan Vijaykrishnan
2005	J	`jnl`	Symmetric encryption in reconfigurable and custom hardware. Int. J. Embed. Syst. Eric J. Swankoski, Narayanan Vijaykrishnan, Richard R. Brooks, Mahmut T. Kandemir, Mary Jane Irwin
2005	C	`conf`	Temperature-Aware Voltage Islands Architecting in System-on-Chip Design. ICCD Wei-Lun Hung, Greg M. Link, Yuan Xie, Narayanan Vijaykrishnan, Nagu R. Dhanwada, John Conner
2005	—	`conf`	Thermal-Aware Floorplanning Using Genetic Algorithms. ISQED Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Charles Addo-Quaye, Theo Theocharides, Mary Jane Irwin
2005	A	`conf`	Thermal-Aware Task Allocation and Scheduling for Embedded Systems. DATE Wei-Lun Hung, Yuan Xie, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2005	C	`conf`	Three-Dimensional Cache Design Exploration Using 3DCacti. ICCD Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	A	`conf`	A Crosstalk Aware Interconnect with Variable Cycle Transmission. DATE Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	B	`conf`	A Dual-V FPL Aman Gayasen, K. Lee, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan
2004	A	`conf`	A Parallel Architecture for Secure FPGA Symmetric Encryption. IPDPS Eric J. Swankoski, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	J	`jnl`	A compiler-based approach for dynamically managing scratch-pad memories in embedded systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
2004	—	`conf`	A generic reconfigurable neural network architecture as a network on chip. SoCC Theocharis Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Vamsi Srikantam
2004	Misc	`conf`	An Architecture for Motion Estimation in the Transform Domain. VLSI Design Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2004	Misc	`conf`	Analyzing heap error behavior in embedded JVM environments. CODES+ISSS Guilin Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2004	A	`conf`	Analyzing software influences on substrate noise: an ADC perspective. ICCAD Frank Ghenassia, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	J	`jnl`	Characterization and modeling of run-time techniques for leakage power reduction. IEEE Trans. Very Large Scale Integr. Syst. Yuh-Fang Tsai, D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	—	`conf`	ChipPower: an architecture-level leakage simulator. SoCC Yuh-Fang Tsai, Ananth Hegde Ankadi, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides
2004	B	`conf`	Code protection for resource-constrained embedded devices. LCTES Hendra Saputra, Guangyu Chen, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	J	`jnl`	Data Organization and Retrieval on Parallel Air Channels: Performance and Energy Issues. Wirel. Networks J. Juran, Ali R. Hurson, Narayanan Vijaykrishnan, Soontae Kim
2004	—	`conf`	Design of a nanosensor array architecture. ACM Great Lakes Symposium on VLSI Wei Xu, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2004	Misc	`conf`	Designing Leakage Aware Multipliers. VLSI Design M. DeRenzo, Mary Jane Irwin, Narayanan Vijaykrishnan
2004	—	`conf`	Efficient VLSI implementation of inverse discrete cosine transform [image coding applications]. ICASSP (5) Jooheung Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	Misc	`conf`	Embedded Hardware Face Detection. VLSI Design Theo Theocharides, Greg M. Link, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2004	—	`conf`	Evaluating Alternative Implementations for LDPC Decoder Check Node Function. ISVLSI Theo Theocharides, Greg M. Link, Eric J. Swankoski, Narayanan Vijaykrishnan, Mary Jane Irwin, Herman Schmit
2004	A*	`conf`	Exploring Wakeup-Free Instruction Scheduling. HPCA Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	—	`conf`	Fault Tolerant Algorithms for Network-On-Chip Interconnect. ISVLSI Matthew Pirretti, Greg M. Link, Richard R. Brooks, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	C	`conf`	Field level analysis for heap space optimization in embedded java environments. ISMM Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	J	`jnl`	Guest Editorial. IEEE Trans. Very Large Scale Integr. Syst. Christian Piguet, Narayanan Vijaykrishnan
2004	J	`jnl`	Guest Editorial. IEEE Trans. Very Large Scale Integr. Syst. Christian Piguet, Narayanan Vijaykrishnan
2004	A	`conf`	Improving Java Performance Using Dynamic Method Migration on FPGAs. IPDPS Emanuele Lattanzi, Aman Gayasen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Luca Benini, Alessandro Bogliolo
2004	A	`conf`	Improving soft-error tolerance of FPGA configuration bits. ICCAD Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Yuan Xie, Mary Jane Irwin
2004	J	`jnl`	Instruction Scheduling for Low Power. J. VLSI Signal Process. Amisha Parikh, Soontae Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	J	`jnl`	Optimizing Leakage Energy Consumption in Cache Bitlines. Des. Autom. Embed. Syst. Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	—	`conf`	Power-efficient implementation of turbo decoder in SDR system. SoCC Byung-Tae Kang, Narayanan Vijaykrishnan, Mary Jane Irwin, Theocharis Theocharides
2004	—	`ch.`	Reducing Energy Consumption in Chip Multiprocessors Using Workload Variations. Ultra Low-Power Electronics and Design Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Ibrahim Kolcu
2004	J	`jnl`	Reducing instruction cache energy consumption using a compiler-based strategy. ACM Trans. Archit. Code Optim. Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	A	`conf`	Reducing leakage energy in FPGAs using region-constrained placement. FPGA Aman Gayasen, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Tim Tuan
2004	—	`conf`	Reliability-Aware Co-Synthesis for Embedded Systems. ASAP Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2004	A	`conf`	Scheduling Reusable Instructions for Power Reduction. DATE Jie S. Hu, Narayanan Vijaykrishnan, Soontae Kim, Mahmut T. Kandemir, Mary Jane Irwin
2004	A	`conf`	Search speed and power driven integrated software and hardware optimizations for motion estimation algorithms. ICME Shengqi Yang, Wayne H. Wolf, Narayanan Vijaykrishnan
2004	A	`conf`	Soft error and energy consumption interactions: a data cache perspective. ISLPED Lin Li, Vijay Degalahal, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2004	J	`jnl`	Studying Energy Trade Offs in Offloading Computation/Compilation in Java-Enabled Mobile Devices. IEEE Trans. Parallel Distributed Syst. Guangyu Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
2004	—	`conf`	The Effect of Threshold Voltages on the Soft Error Rate. ISQED Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2004	C	`conf`	Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture. ICCD Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharides, Yuan Xie, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	A	`conf`	Adapative Error Protection for Energy Efficiency. ICCAD Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2003	B	`conf`	Adapting instruction level parallelism for optimizing leakage in VLIW architectures. LCTES Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2003	Misc	`conf`	Analyzing Soft Errors in Leakage Optimized SRAM Design. VLSI Design Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	C	`conf`	CCC: Crossbar Connected Caches for Reducing Energy Consumption of On-Chip Multiprocessors. DSD Lin Li, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Ismail Kadayif
2003	A	`conf`	Compiler Support for Reducing Leakage Energy Consumption. DATE Wei Zhang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Vivek De
2003	A	`conf`	Computation and transmission energy modeling through profiling for MPEG4 video transmission. ICME Amol Bhatkar, Rajarathnam Chandramouli, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	—	`conf`	Effect of Power Optimizations on Soft Error Rate. VLSI-SoC (Selected Papers) Vijay Degalahal, Rajaraman Ramanarayanan, Narayanan Vijaykrishnan, Yuan Xie, Mary Jane Irwin
2003	C	`conf`	Energy Efficient and Reliable System Design. VLSI-SOC Narayanan Vijaykrishnan
2003	A	`conf`	Energy and Performance Considerations in Work Partitioning for Mobile Spatial Queries. IPDPS Sudhanva Gurumurthi, Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2003	A	`conf`	Energy optimization techniques in cluster interconnects. ISLPED Eun Jung Kim, Ki Hwan Yum, Greg M. Link, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mazin S. Yousif, Chita R. Das
2003	A	`conf`	Energy-Aware Compilation and Execution in Java-Enabled Mobile Devices. IPDPS Guilin Chen, Byung-Tae Kang, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Rajarathnam Chandramouli
2003	A	`conf`	Estimating influence of data layout optimizations on SDRAM energy consumption. ISLPED Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Erik Brockmeyer, Francky Catthoor, Mary Jane Irwin
2003	J	`jnl`	Evaluating Integrated Hardware-Software Optimizations Using a Unified Energy Estimation Framework. IEEE Trans. Computers Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye, David Duarte
2003	A	`conf`	Exploiting program hotspots and code sequentiality for instruction cache leakage management. ISLPED Jie S. Hu, A. Nadgir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
2003	A	`conf`	Heap compression for memory-constrained Java environments. OOPSLA Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Bernd Mathiske, Mario Wolczko
2003	A*	`conf`	Implications of technology scaling on leakage reduction techniques. DAC Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	B	`conf`	Interplay of energy and performance for disk arrays running transaction processing workloads. ISPASS Sudhanva Gurumurthi, Jianyong Zhang, Anand Sivasubramaniam, Mahmut T. Kandemir, Hubertus Franke, Narayanan Vijaykrishnan, Mary Jane Irwin
2003	J	`jnl`	Leakage Current: Moore's Law Meets Static Power. Computer Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan
2003	J	`jnl`	Managing Leakage Energy in Cache Hierarchies. J. Instr. Level Parallelism Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
2003	A	`conf`	Masking the Energy Behavior of DES Encryption. DATE Hendra Saputra, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Richard R. Brooks, Soontae Kim, Wei Zhang
2003	A	`conf`	On load latency in low-power caches. ISLPED Soontae Kim, Narayanan Vijaykrishnan, Mary Jane Irwin, Lizy Kurian John
2003	J	`jnl`	Partitioned instruction cache architecture for energy efficiency. ACM Trans. Embed. Comput. Syst. Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin
2003	C	`conf`	Reducing dTLB Energy Through Dynamic Resizing. ICCD Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan
2003	—	`conf`	The Sandbox Design Experience Course. MSE Herman Schmit, Thomas Kroll, Max Khusid, Ivan S. Kourtev, Narayanan Vijaykrishnan, David L. Landis
2003	Misc	`conf`	Tracking object life cycle for leakage energy optimization. CODES+ISSS Guangyu Chen, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Mario Wolczko
2003	—	`conf`	Using Dynamic Branch Behavior for Power-Efficient Instruction Fetch. ISVLSI Jie S. Hu, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
2003	Misc	`conf`	VL-CDRAM: variable line sized cached DRAMs. CODES+ISSS Ananth Hegde, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2002	A	`conf`	A Complete Phase-Locked Loop Power Consumption Model. DATE David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	J	`jnl`	A clock power model to evaluate impact of architectural and technology optimizations. IEEE Trans. Very Large Scale Integr. Syst. D. E. Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	—	`conf`	Adaptive Garbage Collection for Battery-Operated Environments. Java Virtual Machine Research and Technology Symposium Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
2002	—	`conf`	Compiler-Directed Array Interleaving for Reducing Energy in Multi-Bank Memories. ASP-DAC/VLSI Design Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam, Ibrahim Kolcu
2002	—	`conf`	Compiler-directed cache polymorphism. LCTES-SCOPES Jie S. Hu, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hendra Saputra, Wei Zhang
2002	A*	`conf`	Compiler-directed instruction cache leakage optimization. MICRO Wei Zhang, Jie S. Hu, Vijay Degalahal, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	A	`conf`	Designing Energy-Efficient Software. IPDPS Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	A	`conf`	EAC: A Compiler Framework for High-Level Energy Estimation and Optimization. DATE Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
2002	—	`conf`	Energy savings through compression in embedded Java environments. CODES Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2002	—	`conf`	Energy-conscious compilation based on voltage scaling. LCTES-SCOPES Hendra Saputra, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jie S. Hu, Chung-Hsing Hsu, Ulrich Kremer
2002	J	`jnl`	Energy-performance trade-offs for spatial access methods on memory-resident data. VLDB J. Ning An, Sudhanva Gurumurthi, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2002	—	`conf`	Evaluating Run-Time Techniques for Leakage Power Reduction. ASP-DAC/VLSI Design David Duarte, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	—	`conf`	Hardware-Software Co-Adaptation for Data-Intensive Embedded Applications. ISVLSI Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	C	`conf`	Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes. ICCD David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim, Grant McFarland
2002	—	`conf`	Impact of Technology Scaling in the Clock System Power. ISVLSI David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	—	`conf`	Leakage Energy Management in Cache Hierarchies. IEEE PACT Lin Li, Ismail Kadayif, Yuh-Fang Tsai, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Anand Sivasubramaniam
2002	A	`conf`	Power-Efficient Trace Caches. DATE Jie S. Hu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2002	A*	`conf`	Scheduler-based DRAM energy management. DAC Victor Delaluz, Anand Sivasubramaniam, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2002	A*	`conf`	Tuning Garbage Collection in an Embedded Java Environment. HPCA Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
2002	J	`jnl`	Tuning garbage collection for reducing memory system energy in an embedded java environment. ACM Trans. Embed. Comput. Syst. Guangyu Chen, R. Shetty, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Mario Wolczko
2002	A*	`conf`	Understanding and improving operating system effects in control flow prediction. ASPLOS Tao Li, Lizy Kurian John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Juan Rubio
2002	A*	`conf`	Using Complete Machine Simulation for Software Power Estimation: The SoftWatt Approach. HPCA Sudhanva Gurumurthi, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Tao Li, Lizy Kurian John
2002	J	`jnl`	Using Memory Compression for Energy Reduction in an Embedded Java System. J. Circuits Syst. Comput. Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne H. Wolf
2001	C	`conf`	A Framework for Energy Estimation of VLIW Architecture. ICCD Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2001	A*	`conf`	Analyzing energy behavior of spatial access methods for memory-resident data. VLDB Ning An, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Sudhanva Gurumurthi
2001	A*	`conf`	DRAM Energy Management Using Software and Hardware Directed Power Mode Control. HPCA Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2001	J	`jnl`	Design considerations for databus charge recovery. IEEE Trans. Very Large Scale Integr. Syst. Benjamin Bishop, V. Lyuboslavsky, Narayanan Vijaykrishnan, Mary Jane Irwin
2001	A*	`conf`	Dynamic Management of Scratch-Pad Memory Space. DAC Mahmut T. Kandemir, J. Ramanujam, Mary Jane Irwin, Narayanan Vijaykrishnan, Ismail Kadayif, Amisha Parikh
2001	—	`conf`	Energy Behavior of Java Applications from the Memory Perspective. Java Virtual Machine Research and Technology Symposium Narayanan Vijaykrishnan, Mahmut T. Kandemir, Soontae Kim, Samarjeet Singh Tomar, Anand Sivasubramaniam, Mary Jane Irwin
2001	Misc	`conf`	Energy-efficient instruction cache using page-based placement. CASES Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2001	A*	`conf`	Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. MICRO Wei Zhang, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai
2001	Misc	`conf`	Formulation and Validation of an Energy Dissipation Model for the Clock Generation Circuitry and Distribution Networks. VLSI Design David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Mahmut T. Kandemir
2001	J	`jnl`	Hardware and Software Techniques for Controlling DRAM Power Modes. IEEE Trans. Computers Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Mary Jane Irwin
2001	A	`conf`	Influence of Array Allocation Mechanisms on Memory System Energy. IPDPS R. Athavale, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2001	J	`jnl`	Influence of compiler optimizations on system power. IEEE Trans. Very Large Scale Integr. Syst. Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye
2001	J	`jnl`	Investigating Memory System Energy Behavior Using Software and Hardware Optimizations. VLSI Design G. Esakkimuthu, Hyun Suk Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2001	J	`jnl`	Java Runtime Systems: Characterization and Architectural Implications. IEEE Trans. Computers Ramesh Radhakrishnan, Narayanan Vijaykrishnan, Lizy Kurian John, Anand Sivasubramaniam, Juan Rubio, Jyotsna Sabarinathan
2001	—	`conf`	Morphable Cache Architectures: Potential Benefits. LCTES/OM Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, J. Ramanujam
2001	—	`conf`	Morphable Cache Architectures: Potential Benefits. OM@PLDI Ismail Kadayif, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Jagannathan Ramanujam
2001	A	`conf`	Power-aware partitioned cache architectures. ISLPED Soontae Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, E. Geethanjali
2001	—	`conf`	SoC Design Skills: Collaboration Builds a Stronger SoC Design Team. MSE Pradeep K. Khosla, Herman Schmit, Mary Jane Irwin, Narayanan Vijaykrishnan, Tom Cain, Steven P. Levitan, Dave Landis
2001	C	`conf`	Use of Local Memory for Efficient Java Execution. ICCD Samarjeet Singh Tomar, Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2001	—	`conf`	vEC: virtual energy counters. PASTE Ismail Kadayif, T. Chinoda, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam
2000	—	`conf`	A Holistic Approach to System Level Energy Optimization. PATMOS Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Anand Sivasubramaniam
2000	—	`conf`	A comparative study of power efficient SRAM designs. ACM Great Lakes Symposium on VLSI Jeyran Hezavei, Narayanan Vijaykrishnan, Mary Jane Irwin
2000	A*	`conf`	Architectural Issues in Java Runtime Systems. HPCA Ramesh Radhakrishnan, Narayanan Vijaykrishnan, Lizy Kurian John, Anand Sivasubramaniam
2000	Misc	`conf`	Data Organization and Retrieval on Parallel Air Channels. HiPC J. Juran, Ali R. Hurson, Narayanan Vijaykrishnan, S. Boonsiriwattanakul
2000	Misc	`conf`	Energy-Aware Instruction Scheduling. HiPC Amisha Parikh, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2000	A*	`conf`	Energy-driven integrated hardware-software optimizations using SimplePower. ISCA Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, Hyun Suk Kim, Wu Ye
2000	Misc	`conf`	Energy-oriented compiler optimizations for partitioned memory architectures. CASES Victor Delaluz, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin
2000	—	`conf`	Experimental Evaluation of Energy Behavior of Iteration Space Tiling. LCPC Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim
2000	A*	`conf`	Influence of compiler optimizations on system power. DAC Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wu Ye
2000	A	`conf`	Memory system energy (poster session): influence of hardware-software optimizations. ISLPED G. Esakkimuthu, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2000	A*	`conf`	The design and use of simplepower: a cycle-accurate energy estimation tool. DAC Wu Ye, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin
2000	B	`conf`	Towards Energy-Aware Iteration Space Tiling. LCTES Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim
2000	A	`conf`	Using complete system simulation to characterize SPECjvm98 benchmarks. ICS Tao Li, Lizy Kurian John, Narayanan Vijaykrishnan, Anand Sivasubramaniam, Jyotsna Sabarinathan, Anupama Murthy
1999	Misc	`conf`	Energy Efficient Datapath Synthesis Using Dynamic Frequency Clocking and Multiple Voltages. VLSI Design Vamsi Krishna, N. Ranganathan, Narayanan Vijaykrishnan
1999	—	`conf`	Tuning Branch Predictors to Support Virtual Method Invocation in Java. COOTS Narayanan Vijaykrishnan, N. Ranganathan
1998	J	`jnl`	A linear array processor with dynamic frequency clocking for image processing applications. IEEE Trans. Circuits Syst. Video Technol. Nagarajan Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar
1998	A	`conf`	Object-Oriented Architectural Support for a Java Processor. ECOOP Narayanan Vijaykrishnan, N. Ranganathan, Ravi Gadekarla
1996	C	`conf`	A VLSI array architecture with dynamic frequency clocking. ICCD N. Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar
1996	B	`conf`	A dynamic frequency linear array processor for image processing. ICPR N. Ranganathan, N. Bhavanishankar, Narayanan Vijaykrishnan
1996	—	`conf`	DFLAP: a dynamic frequency linear array processor. ICIP (2) Narayanan Vijaykrishnan, Nagarajan Ranganathan, N. Bhavanishankar
1996	Misc	`conf`	SUBGEN: a genetic approach for subcircuit extraction. VLSI Design Narayanan Vijaykrishnan, N. Ranganathan