Naraig Manjikian

37 papers A* 2A 2B 5Misc 2Journal 7Unranked 19

Year	Rank	Type	Title / Venue / Authors
2018	J	`jnl`	Enhanced Bloom filter utilisation scheme for string matching using a splitting approach. IET Commun. Shervin Vakili, J. M. Pierre Langlois, Yvon Savaria, Naraig Manjikian
2017	—	`conf`	A study of maximum frequency in FPGA chips using mesh and toroid circuit topologies. CCECE Naraig Manjikian
2016	—	`conf`	Retargeting and enhancing a compact multitasking kernel for the Altera Nios II processor. CCECE Naraig Manjikian
2015	—	`conf`	Dynamic RAM-based programs and tasks in the freescale MQX operating system. CCECE Naraig Manjikian
2014	—	`conf`	Automatic generation of parallelized FFT logic for implementation in FPGA chips. NEWCAS Tayler Sokalski, Naraig Manjikian
2013	—	`conf`	A graphical software tool with integer linear programming for microcontroller input/output interface selection feasibility. CCECE Naraig Manjikian, Alexander Ferdynus, Laszlo Katona
2013	—	`conf`	A hardware test platform in field-programmable logic for parallelized digital signal processing. CCECE Tayler Sokalski, Naraig Manjikian
2013	—	`conf`	Implementation and performance assessment of Linux device drivers for the coldfire MCF54418 microcontroller. CCECE Naraig Manjikian, Laszlo Katona, Alexander Ferdynus, Simon V. Chamlian, Pavel Katkov
2012	—	`conf`	An FPGA implementation for a high-speed optical link with a PCIe interface. SoCC Edin Kadric, Naraig Manjikian, Zeljko Zilic
2012	—	`conf`	Performance optimization of a data transfer controller for parallel matrix multiplication in FPGAS. CCECE Ahmad Khayyat, Naraig Manjikian
2011	—	`conf`	Analysis and parallelization of JPEG-2000 reference software. CCECE Bo Fan, Naraig Manjikian
2011	—	`conf`	Controller design for matrix multiplication on FPGAs. CCECE Ahmad Khayyat, Naraig Manjikian
2010	A	`conf`	Reliability- and process variation-aware placement for FPGAs. DATE Assem A. M. Bsoul, Naraig Manjikian, Li Shang
2009	—	`conf`	Performance optimization and parallelization of turbo decoding for software-defined radio. CCECE Jonathan Roth, Naraig Manjikian, Subramania Sudharsanan
2006	A	`conf`	Enhanced Architectural Support for Variable-Length Decoding. ICME Mohanarajah Sinnathamby, Subramania Sudharsanan, Naraig Manjikian
2006	—	`conf`	Enhancements and Applications of a Versatile Software Tool for High-Level Specification of Single-Chip Systems. CCECE Naraig Manjikian, Cindy Mark, Mohanarajah Sinnathamby, James Reed, Huang Jin
2004	B	`conf`	Architecture and Implementation of Chip Multiprocessors: Custom Logic Components and Software for Rapid Prototyping. ICPP Naraig Manjikian, Huang Jin, James Reed, Nathan Cordeiro
2002	J	`jnl`	Simulation of an Integrated Architecture for IP-over-ATM Frame Processing. Simul. Peter M. Ewert, Naraig Manjikian
2001	J	`jnl`	Exploiting Wavefront Parallelism on Large-Scale Shared-Memory Multiprocessors. IEEE Trans. Parallel Distributed Syst. Naraig Manjikian, Tarek S. Abdelrahman
2001	J	`jnl`	Hardware/software tradeoffs for IP-over-ATM frame reassembly in an integrated architecture. Comput. Commun. Peter M. Ewert, Naraig Manjikian
2001	J	`jnl`	More enhancements of the simplescalar tool set. SIGARCH Comput. Archit. News Naraig Manjikian
2001	J	`jnl`	Multiprocessor enhancements of the SimpleScalar tool set. SIGARCH Comput. Archit. News Naraig Manjikian
2001	B	`conf`	Parallel simulation of multiprocessor execution: implementation and results for simplescalar. ISPASS Naraig Manjikian
2000	—	`conf`	A Vector Multiprocessor for Real-Time Multi-User Detection in Spread-Spectrum Communication. ASAP Naraig Manjikian
2000	Misc	`conf`	Enhancements and applications of the SimpleScalar simulator for undergraduate and graduate computer architecture education. WCAE Naraig Manjikian
2000	Misc	`conf`	In-lecture hardware demonstrations with a logic analyzer to illustrate pipelined execution and cache/memory behavior. WCAE Naraig Manjikian
2000	—	`conf`	Optimizing software performance for IP frame reassembly in an integrated architecture. Workshop on Software and Performance Peter M. Ewert, Naraig Manjikian
2000	B	`conf`	The NUMAchine Multiprocessor. ICPP R. Grindley, Tarek S. Abdelrahman, Stephen Brown, S. Caranci, D. DeVries, Benjamin Gamsa, A. Grbic, M. Gusat, R. Ho, Orran Krieger, Guy G. Lemieux, K. Loveless, Naraig Manjikian, P. McHardy, Sinisa Srbljic, Michael Stumm, Zvonko G. Vranesic, Zeljko Zilic
1998	A*	`conf`	Design and Implementation of the NUMAchine Multiprocessor. DAC A. Grbic, Stephen Brown, S. Caranci, R. Grindley, M. Gusat, Guy G. Lemieux, K. Loveless, Naraig Manjikian, Sinisa Srbljic, Michael Stumm, Zvonko G. Vranesic, Zeljko Zilic
1998	—	`conf`	Locality Enhancement for Large-Scale Shared-Memory Multiprocessors. LCR Tarek S. Abdelrahman, Naraig Manjikian, Gary Liu, Sudarsan Tandri
1997	B	`conf`	Combining Loop Fusion with Prefetching on Shared-memory Multiprocessors. ICPP Naraig Manjikian
1997	J	`jnl`	Fusion of Loops for Parallelism and Locality. IEEE Trans. Parallel Distributed Syst. Naraig Manjikian, Tarek S. Abdelrahman
1996	A*	`conf`	Experience in Designing a Large-scale Multiprocessor using Field-Programmable Devices and Advanced CAD Tools. DAC Stephen Brown, Naraig Manjikian, Zvonko G. Vranesic, S. Caranci, A. Grbic, R. Grindley, M. Gusat, K. Loveless, Zeljko Zilic, Sinisa Srbljic
1996	—	`conf`	Scheduling of Wavefront Parallelism on Scalable Shared-memory Multiprocessors. ICPP, Vol. 3 Naraig Manjikian, Tarek S. Abdelrahman
1995	—	`conf`	Fusion of Loops for Parallelism and Locality. ICPP (2) Naraig Manjikian, Tarek S. Abdelrahman
1993	B	`conf`	High performance parallel logic simulations on a network of workstations. PADS Naraig Manjikian, Wayne M. Loucks
1992	—	`conf`	Using split event sets to form and schedule event combinations in discrete event simulation. Annual Simulation Symposium Naraig Manjikian, Wayne M. Loucks