Nan Liu

11 papers A 1C 1Journal 3Unranked 6
YearRankTypeTitle / Venue / Authors
2016 C conf
High performance low overhead template-based Cell-Interleave Pipeline (TCIP) for asynchronous-logic QDI circuits.
ISCAS
Weng-Geng Ho, Nan Liu, Kyaw Zwa Lwin Ne, Kwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang
2016 A conf
Low normalized energy derivation asynchronous circuit synthesis flow through fork-join slack matching for cryptographic applications.
DATE
Nan Liu, Kwen-Siong Chong, Weng-Geng Ho, Bah-Hwee Gwee, Joseph Sylvester Chang
2016 — conf
Security analysis of asynchronous-logic QDI cell approach for differential power analysis attack.
ISIC
Weng-Geng Ho, Ali Akbar Pammu, Nan Liu, Kyaw Zwa Lwin Ne, Kwen-Siong Chong, Bah-Hwee Gwee
2016 — conf
Success rate model for fully AES-128 in correlation power analysis.
APCCAS
Ali Akbar Pammu, Kwen-Siong Chong, Ne Kyaw Zwa Lwin, Weng-Geng Ho, Nan Liu, Bah-Hwee Gwee
2014 J jnl
Mobility Overlap-Removal-Based Leakage Power and Register-Aware Scheduling in High-Level Synthesis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Nan Wang, Song Chen, Wei Zhong, Nan Liu, Takeshi Yoshimura
2013 J jnl
Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs.
IEICE Trans. Electron.
Nan Liu, Song Chen, Takeshi Yoshimura
2013 — conf
Timing and resource constrained leakage power aware scheduling in high-level synthesis.
ASICON
Nan Wang, Cong Hao, Nan Liu, Haoran Zhang, Takeshi Yoshimura
2012 J jnl
Floorplanning for High Utilization of Heterogeneous FPGAs.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
Nan Liu, Song Chen, Takeshi Yoshimura
2012 — conf
Wirelength driven I/O buffer placement for flip-chip with timing-constrained.
APCCAS
Nan Liu, Shiyu Liu, Takeshi Yoshimura
2011 — conf
Floorplanning for high utilization of heterogeneous FPGAs.
ISQED
Nan Liu, Song Chen, Takeshi Yoshimura
2008 — conf
Comparison of NRZ and RZ modulations in laser intersatellite communication systems.
ICAIT
Nan Liu, Wen-De Zhong, Ying He, K. H. Heng, Tee Hiang Cheng