| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2023 | A* | conf |
HPCA
|
| 2023 | J | jnl |
CoRR
|
| 2023 | J | jnl |
CoRR
|
| 2022 | J | jnl |
IEEE Trans. Computers
|
| 2022 | B | conf |
PACT
|
| 2021 | J | jnl |
Making a Better Use of Caches for GCN Accelerators with Feature Slicing and Automatic Tile Morphing.
IEEE Comput. Archit. Lett.
|
| 2020 | A* | conf |
HPCA
|
| 2019 | A* | conf |
DAC
|
| 2018 | J | jnl |
ACM Trans. Archit. Code Optim.
|
| 2016 | J | jnl |
J. Syst. Archit.
|
| 2015 | C | conf |
VLSI-SoC
|
| 2014 | J | jnl |
IEICE Trans. Electron.
|