Nam Sung Kim - RankMe

301 papers A* 86A 33B 16C 7Misc 4Journal 107Unranked 47

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	CXL-Tracer: Accurate, Full-System Memory Tracing on Commercial Hardware via CXL Memory. IEEE Comput. Archit. Lett. Srikar Vanavasam, Austin Antony Cruz, Nam Sung Kim
2026	J	`jnl`	Capacity-Latency Tradeoffs in CXL Memory Expander at Hyperscale. IEEE Comput. Archit. Lett. Haneul Park, Grant Ayers, Nam Sung Kim, Philip Levis, Brian Morris
2026	J	`jnl`	Characterizing System-Level Trade-Offs of Intel DSA for User-Space IPC Offloading. IEEE Comput. Archit. Lett. Misun Park, Richi Dubey, Yifan Yuan, Nam Sung Kim, Ada Gavrilovska
2026	J	`jnl`	Characterizing the Intrinsic Bank-Level Accuracy Versus Energy Trade-Off of SRAM-Based Analog In-Memory Computing Architectures in 28 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Shuo Li, Chihun Song, Hyungyo Kim, Nam Sung Kim, Naresh R. Shanbhag
2026	A*	`conf`	LiLo: Harnessing the on-Chip Accelerators in Intel CPUs for Compressed LLM Inference Acceleration. HPCA Hyungyo Kim, Qirong Xia, Jinghan Huang, Nachuan Wang, Younjoo Lee, Jung Ho Ahn, Wajdi K. Feghali, Ren Wang, Nam Sung Kim
2026	A*	`conf`	MemSOS: OS-Guided Selective Memory Mirroring. HPCA Junghoon Kim, Jongheon Jeong, Seokwon Moon, Seong Hoon Seo, Yeonhong Park, Jinkyu Jeong, Nam Sung Kim, Jae W. Lee
2026	A*	`conf`	ReScue: Reliable and Secure CXL Memory. HPCA Chihun Song, Austin Antony Cruz, Michael Jaemin Kim, Minbok Wi, Gaohan Ye, Kyungsan Kim, Sangyeol Lee, Jung Ho Ahn, Nam Sung Kim
2026	J	`jnl`	Rethinking Inter-Process Communication with Memory Operation Offloading. CoRR Misun Park, Richi Dubey, Yifan Yuan, Nam Sung Kim, Ada Gavrilovska
2026	—	`conf`	TiNA: Tiered Network Buffer Architecture for Fast Networking in Chiplet-based CPUs. ASPLOS (1) Siddharth Agarwal, Tianchen Wang, Jinghan Huang, Saksham Agarwal, Nam Sung Kim
2025	A*	`conf`	A Full-system, Programmable, and Extensible In-Memory Computing Simulation Framework for Deep Learning. DAC Kaining Zhou, Jian Huang, Nam Sung Kim, Naresh Shanbhag
2025	A*	`conf`	A4: Microarchitecture-Aware LLC Management for Datacenter Servers with Emerging I/O Devices. ISCA Haneul Park, Jiaqi Lou, Sangjin Lee, Yifan Yuan, KyoungSoo Park, Yongseok Son, Ipoom Jeong, Nam Sung Kim
2025	J	`jnl`	A4: Microarchitecture-Aware LLC Management for Datacenter Servers with Emerging I/O Devices. CoRR Haneul Park, Jiaqi Lou, Sangjin Lee, Yifan Yuan, KyoungSoo Park, Yongseok Son, Ipoom Jeong, Nam Sung Kim
2025	J	`jnl`	CABANA : Cluster-Aware Query Batching for Accelerating Billion-Scale ANNS With Intel AMX. IEEE Comput. Archit. Lett. Minho Kim, Houxiang Ji, Jaeyoung Kang, Hwanjun Lee, Daehoon Kim, Nam Sung Kim
2025	J	`jnl`	Cooperative Memory Deduplication With Intel Data Streaming Accelerator. IEEE Comput. Archit. Lett. Houxiang Ji, Minho Kim, Seonmu Oh, Daehoon Kim, Nam Sung Kim
2025	A*	`conf`	DRAM Fault Classification through Large-Scale Field Monitoring for Robust Memory RAS Management. MICRO Hoiju Chung, Euisang Oh, Seungmin Baek, Hyeongshin Yoon, Jaesung Yoo, Sanghwan Lee, Yongjun Lee, Arhatha Bramhanand, Brett Dodds, Yang Zhou, Nam Sung Kim
2025	A*	`conf`	Dynamic Load Balancer in Intel Xeon Scalable Processor: Performance Analyses, Enhancements, and Guidelines. ISCA Jiaqi Lou, Srikar Vanavasam, Yifan Yuan, Ren Wang, Nam Sung Kim
2025	J	`jnl`	Exploiting Chiplet Integration Technology for Fast High-Capacity DRAM Modules. IEEE Trans. Very Large Scale Integr. Syst. Zihan Xia, Chihun Song, Ram Krishna, Ashita Victor, Srujan Penta, Muhannad S. Bakir, Elyse Rosenbaum, Nam Sung Kim, Mingu Kang
2025	J	`jnl`	HINT: A Hardware Platform for Intra-Host NIC Traffic and SmartNIC Emulation. IEEE Comput. Archit. Lett. Jiaqi Lou, Yu Li, Srikar Vanavasam, Nam Sung Kim
2025	J	`jnl`	Hardware-Accelerated Kernel-Space Memory Compression Using Intel QAT. IEEE Comput. Archit. Lett. Qirong Xia, Houxiang Ji, Yang Zhou, Nam Sung Kim
2025	A*	`conf`	Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution. ISCA Chang Eun Song, Priyansh Bhatnagar, Zihan Xia, Nam Sung Kim, Tajana Rosing, Mingu Kang
2025	J	`jnl`	Hybrid SLC-MLC RRAM Mixed-Signal Processing-in-Memory Architecture for Transformer Acceleration via Gradient Redistribution. CoRR Chang Eun Song, Priyansh Bhatnagar, Zihan Xia, Nam Sung Kim, Tajana Rosing, Mingu Kang
2025	B	`conf`	Intel ® in-Memory Analytics Accelerator: Performance Characterization and Guidelines. ISPASS Jaeyoung Kang, Qirong Xia, Ipoom Jeong, Yongjoo Park, Nam Sung Kim
2025	A*	`conf`	LIA: A Single-GPU LLM Inference Acceleration with Cooperative AMX-Enabled CPU-GPU Computation and CXL Offloading. ISCA Hyungyo Kim, Nachuan Wang, Qirong Xia, Jinghan Huang, Amir Yazdanbakhsh, Nam Sung Kim
2025	—	`conf`	M5: Mastering Page Migration and Memory Management for CXL-based Tiered Memory Systems. ASPLOS (2) Yan Sun, Jongyul Kim, Zeduo Yu, Jiyuan Zhang, Siyuan Chai, Michael Jaemin Kim, Hwayong Nam, Jaehyun Park, Eojin Na, Yifan Yuan, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim
2025	—	`conf`	Marionette: A RowHammer Attack via Row Coupling. ASPLOS (1) Seungmin Baek, Minbok Wi, Seonyong Park, Hwayong Nam, Michael Jaemin Kim, Nam Sung Kim, Jung Ho Ahn
2025	A*	`conf`	NetZIP: Algorithm/Hardware Co-design of In-network Lossless Compression for Distributed Large Model Training. MICRO Jinghan Huang, Hyungyo Kim, Nachuan Wang, Jaeyoung Kang, Hrishi Shah, Eun Kyung Lee, Minjia Zhang, Fan Lai, Nam Sung Kim
2025	—	`conf`	Para-ksm: Parallelized Memory Deduplication with Data Streaming Accelerator. USENIX ATC Houxiang Ji, Minho Kim, Seonmu Oh, Daehoon Kim, Nam Sung Kim
2025	A*	`conf`	Re-architecting End-host Networking with CXL: Coherence, Memory, and Offloading. MICRO Houxiang Ji, Yifan Yuan, Yang Zhou, Ipoom Jeong, Ren Wang, Saksham Agarwal, Nam Sung Kim
2025	J	`jnl`	SoK: Systematizing a Decade of Architectural RowHammer Defenses Through the Lens of Streaming Algorithms. CoRR Michael Jaemin Kim, Seungmin Baek, Jumin Kim, Hwayong Nam, Nam Sung Kim, Jung Ho Ahn
2025	J	`jnl`	Special Issue on Interconnects for Chiplet Integration Technologies. IEEE Micro Debendra Das Sharma, Nam Sung Kim
2025	A*	`conf`	Stratum: System-Hardware Co-Design with Tiered Monolithic 3D-Stackable DRAM for Efficient MoE Serving. MICRO Yue Pan, Zihan Xia, Po-Kai Hsu, Lanxiang Hu, Hyungyo Kim, Janak Sharda, Minxuan Zhou, Nam Sung Kim, Shimeng Yu, Tajana Rosing, Mingu Kang
2025	J	`jnl`	Stratum: System-Hardware Co-Design with Tiered Monolithic 3D-Stackable DRAM for Efficient MoE Serving. CoRR Yue Pan, Zihan Xia, Po-Kai Hsu, Lanxiang Hu, Hyungyo Kim, Janak Sharda, Minxuan Zhou, Nam Sung Kim, Shimeng Yu, Tajana Rosing, Mingu Kang
2025	J	`jnl`	The New LLM Bottleneck: A Systems Perspective on Latent Attention and Mixture-of-Experts. CoRR Sungmin Yun, Seonyong Park, Hwayong Nam, Younjoo Lee, Gunjun Lee, Kwanhee Kyung, Sangpyo Kim, Nam Sung Kim, Jongmin Kim, Hyungyo Kim, Juhwan Cho, Seungmin Baek, Jung Ho Ahn
2025	J	`jnl`	Time Series Machine Learning Models for Precise SSD Access Latency Prediction. IEEE Comput. Archit. Lett. Bikrant Das Sharma, Houxiang Ji, Ipoom Jeong, Nam Sung Kim
2025	A*	`conf`	UPP: Universal Predicate Pushdown to Smart Storage. ISCA Ipoom Jeong, Jinghan Huang, Chuxuan Hu, Dohyun Park, Jaeyoung Kang, Nam Sung Kim, Yongjoo Park
2025	A*	`conf`	Warped-Compaction: Maximizing GPU Register File Bandwidth Utilization via Operand Compaction. HPCA Eunbi Jeong, Ipoom Jeong, Myung Kuk Yoon, Nam Sung Kim
2025	J	`jnl`	X-PPR: Post Package Repair for CXL Memory. IEEE Comput. Archit. Lett. Chihun Song, Michael Jaemin Kim, Yan Sun, Houxiang Ji, Kyungsan Kim, TaeKyeong Ko, Jung Ho Ahn, Nam Sung Kim
2025	J	`jnl`	srNAND: A Novel NAND Flash Organization for Enhanced Small Read Throughput in SSDs. IEEE Comput. Archit. Lett. Jeongho Lee, Sangjun Kim, Jae Yong Lee, Jaeyoung Kang, Sungjin Lee, Nam Sung Kim, Jihong Kim
2024	—	`conf`	A Quantitative Analysis and Guidelines of Data Streaming Accelerator in Modern Intel Xeon Scalable Processors. ASPLOS (2) Reese Kuper, Ipoom Jeong, Yifan Yuan, Ren Wang, Narayan Ranganathan, Nikhil Rao, Jiayu Hu, Sanjay Kumar, Philip Lantz, Nam Sung Kim
2024	A*	`conf`	An LPDDR-based CXL-PNM Platform for TCO-efficient Inference of Transformer-based Large Language Models. HPCA Sangsoo Park, Kyungsoo Kim, Jinin So, Jin Jung, Jonggeon Lee, Kyoungwan Woo, Nayeon Kim, Younghyun Lee, Hyungyo Kim, Yongsuk Kwon, JinHyun Kim, Jieun Lee, Yeongon Cho, Yongmin Tai, Jeonghyeon Cho, Hoyoung Song, Jung Ho Ahn, Nam Sung Kim
2024	—	`conf`	AttAcc! Unleashing the Power of PIM for Batched Transformer-based Generative Model Inference. ASPLOS (2) Jaehyun Park, Jaewan Choi, Kwanhee Kyung, Michael Jaemin Kim, Yongsuk Kwon, Nam Sung Kim, Jung Ho Ahn
2024	A*	`conf`	DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands. ISCA Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn
2024	J	`jnl`	DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands. CoRR Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn
2024	A*	`conf`	Demystifying a CXL Type-2 Device: A Heterogeneous Cooperative Computing Perspective. MICRO Houxiang Ji, Srikar Vanavasam, Yang Zhou, Qirong Xia, Jinghan Huang, Yifan Yuan, Ren Wang, Pekon Gupta, Bhushan Chitlur, Ipoom Jeong, Nam Sung Kim
2024	J	`jnl`	Exploiting Intel Advanced Matrix Extensions (AMX) for Large Language Model Inference. IEEE Comput. Archit. Lett. Hyungyo Kim, Gaohan Ye, Nachuan Wang, Amir Yazdanbakhsh, Nam Sung Kim
2024	B	`conf`	FriendlyFoe: Adversarial Machine Learning as a Practical Architectural Defense against Side Channel Attacks. PACT Hyoungwook Nam, Raghavendra Pradyumna Pothukuchi, Bo Li, Nam Sung Kim, Josep Torrellas
2024	A*	`conf`	HAL: Hardware-assisted Load Balancing for Energy-efficient SNIC-Host Cooperative Computing. ISCA Jinghan Huang, Jiaqi Lou, Srikar Vanavasam, Xinhao Kong, Houxiang Ji, Ipoom Jeong, Danyang Zhuo, Eun Kyung Lee, Nam Sung Kim
2024	Misc	`conf`	Harmonic: Hardware-assisted RDMA Performance Isolation for Public Clouds. NSDI Jiaqi Lou, Xinhao Kong, Jinghan Huang, Wei Bai, Nam Sung Kim, Danyang Zhuo
2024	A*	`conf`	Intel Accelerators Ecosystem: An SoC-Oriented Perspective : Industry Product. ISCA Yifan Yuan, Ren Wang, Narayan Ranganathan, Nikhil Rao, Sanjay Kumar, Philip Lantz, Vivekananthan Sanjeepan, Jorge Cabrera, Atul Kwatra, Rajesh Sankaran, Ipoom Jeong, Nam Sung Kim
2024	—	`conf`	Lupin: Tolerating Partial Failures in a CXL Pod. DIMES@SOSP Zhiting Zhu, Newton Ni, Yibo Huang, Yan Sun, Zhipeng Jia, Nam Sung Kim, Emmett Witchel
2024	A*	`conf`	SPADE: Sparse Pillar-based 3D Object Detection Accelerator for Autonomous Driving. HPCA Minjae Lee, Seongmin Park, Hyungmin Kim, Minyong Yoon, Janghwan Lee, Jun Won Choi, Nam Sung Kim, Mingu Kang, Jungwook Choi
2024	A	`conf`	ScaleCache: A Scalable Page Cache for Multiple Solid-State Drives. EuroSys Kiet Tuan Pham, Seokjoo Cho, Sangjin Lee, Lan Anh Nguyen, Hyeongi Yeo, Ipoom Jeong, Sungjin Lee, Nam Sung Kim, Yongseok Son
2024	—	`conf`	TAROT: A CXL SmartNIC-Based Defense Against Multi-bit Errors by Row-Hammer Attacks. ASPLOS (3) Chihun Song, Michael Jaemin Kim, Tianchen Wang, Houxiang Ji, Jinghan Huang, Ipoom Jeong, Jaehyun Park, Hwayong Nam, Minbok Wi, Jung Ho Ahn, Nam Sung Kim
2024	—	`conf`	Tandem Processor: Grappling with Emerging Operators in Neural Networks. ASPLOS (2) Soroush Ghodrati, Sean Kinzer, Hanyang Xu, Rohan Mahapatra, Yoonsung Kim, Byung Hoon Ahn, Dong Kai Wang, Lavanya Karthikeyan, Amir Yazdanbakhsh, Jongse Park, Nam Sung Kim, Hadi Esmaeilzadeh
2024	J	`jnl`	Transforming the Hybrid Cloud for Emerging AI Workloads. CoRR Deming Chen, Alaa Youssef, Ruchi Pendse, André Schleife, Bryan K. Clark, Hendrik F. Hamann, Jingrui He, Teodoro Laino, Lav R. Varshney, Yuxiong Wang, Avirup Sil, Reyhaneh Jabbarvand, Tianyin Xu, Volodymyr V. Kindratenko, Carlos H. A. Costa, Sarita V. Adve, Charith Mendis, Minjia Zhang, Santiago Núñez-Corrales, Raghu K. Ganti, Mudhakar Srivatsa, Nam Sung Kim, Josep Torrellas, Jian Huang, Seetharami R. Seelam, Klara Nahrstedt, Tarek F. Abdelzaher, Tamar Eilam, Huimin Zhao, Matteo Manica, Ravishankar K. Iyer, Martin Hirzel, Vikram S. Adve, Darko Marinov, Hubertus Franke, Hanghang Tong, Elizabeth A. Ainsworth, Han Zhao, Deepak Vasisht, Minh Do, Fábio Oliveira, Giovanni Pacifici, Ruchir Puri, Priya Nagpurkar
2024	J	`jnl`	Triple-A: Early Operand Collector Allocation for Maximizing GPU Register Bank Utilization. IEEE Embed. Syst. Lett. Ipoom Jeong, Eunbi Jeong, Nam Sung Kim, Myung Kuk Yoon
2024	A*	`conf`	Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. HPCA Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn
2023	J	`jnl`	A Quantitative Analysis and Guideline of Data Streaming Accelerator in Intel 4th Gen Xeon Scalable Processors. CoRR Reese Kuper, Ipoom Jeong, Yifan Yuan, Jiayu Hu, Ren Wang, Narayan Ranganathan, Nam Sung Kim
2023	B	`conf`	Analyzing Energy Efficiency of a Server with a SmartNIC under SLO Constraints. ISPASS Jinghan Huang, Jiaqi Lou, Yan Sun, Tianchen Wang, Eun Kyung Lee, Nam Sung Kim
2023	J	`jnl`	Asynchronous Persistence with ASAP. CoRR Ahmed H. M. O. Abulila, Izzat El Hajj, Myoungsoo Jung, Nam Sung Kim
2023	J	`jnl`	Defensive ML: Defending Architectural Side-channels with Adversarial Obfuscation. CoRR Hyoungwook Nam, Raghavendra Pradyumna Pothukuchi, Bo Li, Nam Sung Kim, Josep Torrellas
2023	A*	`conf`	Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices. MICRO Yan Sun, Yifan Yuan, Zeduo Yu, Reese Kuper, Chihun Song, Jinghan Huang, Houxiang Ji, Siddharth Agarwal, Jiaqi Lou, Ipoom Jeong, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim
2023	J	`jnl`	Demystifying CXL Memory with Genuine CXL-Ready Systems and Devices. CoRR Yan Sun, Yifan Yuan, Zeduo Yu, Reese Kuper, Ipoom Jeong, Ren Wang, Nam Sung Kim
2023	A*	`conf`	How to Kill the Second Bird with One ECC: The Pursuit of Row Hammer Resilient DRAM. MICRO Michael Jaemin Kim, Minbok Wi, Jaehyun Park, Seoyoung Ko, Jaeyoung Choi, Hwayong Nam, Nam Sung Kim, Jung Ho Ahn, Eojin Lee
2023	J	`jnl`	LADIO: Leakage-Aware Direct I/O for I/O-Intensive Workloads. IEEE Comput. Archit. Lett. Ipoom Jeong, Jiaqi Lou, Yongseok Son, Yongjoo Park, Yifan Yuan, Nam Sung Kim
2023	A*	`conf`	MESA: Microarchitecture Extensions for Spatial Architecture Generation. ISCA Dong Kai Wang, Jiaqi Lou, Naiyin Jin, Edwin Mascarenhas, Rohan Mahapatra, Sean Kinzer, Soroush Ghodrati, Amir Yazdanbakhsh, Hadi Esmaeilzadeh, Nam Sung Kim
2023	—	`conf`	Making Sense of Using a SmartNIC to Reduce Datacenter Tax from SLO and TCO Perspectives. IISWC Jinghan Huang, Jiaqi Lou, Yan Sun, Tianchen Wang, Eun Kyung Lee, Nam Sung Kim
2023	J	`jnl`	NoHammer: Preventing Row Hammer With Last-Level Cache Management. IEEE Comput. Archit. Lett. Seunghak Lee, Ki-Dong Kang, Gyeongseo Park, Nam Sung Kim, Daehoon Kim
2023	A*	`conf`	Rambda: RDMA-driven Acceleration Framework for Memory-intensive µs-scale Datacenter Applications. HPCA Yifan Yuan, Jinghan Huang, Yan Sun, Tianchen Wang, Jacob Nelson, Dan R. K. Ports, Yipeng Wang, Ren Wang, Charlie Tai, Nam Sung Kim
2023	J	`jnl`	Rethinking DRAM's Page Mode With STT-MRAM. IEEE Trans. Computers Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski, Trevor N. Mudge
2023	A*	`conf`	SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling. HPCA Minbok Wi, Jaehyun Park, Seoyoung Ko, Michael Jaemin Kim, Nam Sung Kim, Eojin Lee, Jung Ho Ahn
2023	—	`conf`	STYX: Exploiting SmartNIC Capability to Reduce Datacenter Memory Tax. USENIX ATC Houxiang Ji, Mark Mansi, Yan Sun, Yifan Yuan, Jinghan Huang, Reese Kuper, Michael M. Swift, Nam Sung Kim
2023	J	`jnl`	Special Issue on Emerging System Interconnects. IEEE Micro John Kim, Nam Sung Kim
2023	A	`conf`	Towards a Manageable Intra-Host Network. HotOS Xinhao Kong, Jiaqi Lou, Wei Bai, Nam Sung Kim, Danyang Zhuo
2023	J	`jnl`	Unleashing the Potential of PIM: Accelerating Large Batched Inference of Transformer-Based Generative Models. IEEE Comput. Archit. Lett. Jaewan Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, Jung Ho Ahn
2023	J	`jnl`	X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. IEEE Comput. Archit. Lett. Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn
2023	J	`jnl`	X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands. CoRR Hwayong Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song, Nam Sung Kim, Jung Ho Ahn
2022	A*	`conf`	ASAP: architecture support for asynchronous persistence. ISCA Ahmed H. M. O. Abulila, Izzat El Hajj, Myoungsoo Jung, Nam Sung Kim
2022	A	`conf`	An FPGA-based RNN-T Inference Accelerator with PIM-HBM. FPGA Shinhaeng Kang, Sukhan Lee, Byeongho Kim, Hweesoo Kim, Kyomin Sohn, Nam Sung Kim, Eojin Lee
2022	J	`jnl`	Aquabolt-XL HBM2-PIM, LPDDR5-PIM With In-Memory Processing, and AXDIMM With Acceleration Buffer. IEEE Micro Jin Hyun Kim, Shinhaeng Kang, Sukhan Lee, Hyeonsu Kim, Yuhwan Ro, Seungwon Lee, David Wang, Jihyun Choi, Jinin So, Yeongon Cho, Joon-Ho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim
2022	—	`conf`	BNS-GCN: Efficient Full-Graph Training of Graph Convolutional Networks with Partition-Parallelism and Random Boundary Node Sampling. MLSys Cheng Wan, Youjie Li, Ang Li, Nam Sung Kim, Yingyan Lin
2022	J	`jnl`	BNS-GCN: Efficient Full-Graph Training of Graph Convolutional Networks with Partition-Parallelism and Random Boundary Node Sampling. CoRR Cheng Wan, Youjie Li, Ang Li, Nam Sung Kim, Yingyan Lin
2022	J	`jnl`	Coordinated Science Laboratory 70th Anniversary Symposium: The Future of Computing. CoRR Klara Nahrstedt, Naresh R. Shanbhag, Vikram S. Adve, Nancy M. Amato, Romit Roy Choudhury, Carl A. Gunter, Nam Sung Kim, Olgica Milenkovic, Sayan Mitra, Lav R. Varshney, Yurii Vlasov, Sarita V. Adve, Rashid Bashir, Andreas Cangellaris, James DiCarlo, Katie Driggs-Campbell, Nick Feamster, Mattia Gazzola, Karrie Karahalios, Sanmi Koyejo, Paul G. Kwiat, Bo Li, Negar Mehr, Ravish Mehra, Andrew Miller, Daniela Rus, Alexander G. Schwing, Anshumali Shrivastava
2022	J	`jnl`	DML: Dynamic Partial Reconfiguration With Scalable Task Scheduling for Multi-Applications on FPGAs. IEEE Trans. Computers Ashutosh Dhar, Edward Richter, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, Deming Chen
2022	J	`jnl`	Harmony: Overcoming the hurdles of GPU memory capacity to train massive DNN models on commodity servers. CoRR Youjie Li, Amar Phanishayee, Derek Murray, Jakub Tarnawski, Nam Sung Kim
2022	J	`jnl`	Harmony: Overcoming the hurdles of GPU memory capacity to train massive DNN models on commodity servers. Proc. VLDB Endow. Youjie Li, Amar Phanishayee, Derek Murray, Jakub Tarnawski, Nam Sung Kim
2022	A*	`conf`	IDIO: Network-Driven, Inbound Network Data Orchestration on Server Processors. MICRO Mohammad Alian, Siddharth Agarwal, Jongmin Shin, Neel Patel, Yifan Yuan, Daehoon Kim, Ren Wang, Nam Sung Kim
2022	J	`jnl`	Near-Memory Processing in Action: Accelerating Personalized Recommendation With AxDIMM. IEEE Micro Liu Ke, Xuan Zhang, Jinin So, Jong-Geon Lee, Shinhaeng Kang, Sukhan Lee, Songyi Han, Yeongon Cho, Jin Hyun Kim, Yongsuk Kwon, Kyungsoo Kim, Jin Jung, IlKwon Yun, Sung Joo Park, Hyunsun Park, Joon-Ho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim, Hsien-Hsin S. Lee
2022	J	`jnl`	ORCA: A Network and Architecture Co-design for Offloading us-scale Datacenter Applications. CoRR Yifan Yuan, Jinghan Huang, Yan Sun, Tianchen Wang, Jacob Nelson, Dan R. K. Ports, Yipeng Wang, Ren Wang, Charlie Tai, Nam Sung Kim
2022	J	`jnl`	OSC: An Online Self-Configuring Big Data Framework for Optimization of QoS. IEEE Trans. Computers Zhendong Bei, Nam Sung Kim, Kai Hwang, Zhibin Yu
2022	A*	`conf`	PipeGCN: Efficient Full-Graph Training of Graph Convolutional Networks with Pipelined Feature Communication. ICLR Cheng Wan, Youjie Li, Cameron R. Wolfe, Anastasios Kyrillidis, Nam Sung Kim, Yingyan Lin
2022	J	`jnl`	PipeGCN: Efficient Full-Graph Training of Graph Convolutional Networks with Pipelined Feature Communication. CoRR Cheng Wan, Youjie Li, Cameron R. Wolfe, Anastasios Kyrillidis, Nam Sung Kim, Yingyan Lin
2022	Misc	`conf`	Unlocking the Power of Inline Floating-Point Operations on Programmable Switches. NSDI Yifan Yuan, Omar Alama, Jiawei Fei, Jacob Nelson, Dan R. K. Ports, Amedeo Sapio, Marco Canini, Nam Sung Kim
2021	—	`conf`	25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3 ISSCC Yong-Hun Kim, Hyung-Jin Kim, Jaemin Choi, Min-Su Ahn, Dongkeon Lee, Seung-Hyun Cho, Dong-Yeon Park, Young-Jae Park, Min-Soo Jang, Yong-Jun Kim, Jinyong Choi, Sung-Woo Yoon, Jae-Woo Jung, Jae-Koo Park, Jae-Woo Lee, Dae-Hyun Kwon, Hyung-Seok Cha, Si-Hyeong Cho, Seong-Hoon Kim, Jihwa You, Kyoung-Ho Kim, Dae-Hyun Kim, Byung-Cheol Kim, Young-Kwan Kim, Jun-Ho Kim, Seouk-Kyu Choi, Chanyoung Kim, Byongwook Na, Hye-In Choi, Reum Oh, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, Jung-Bae Lee
2021	—	`conf`	25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications. ISSCC Young-Cheon Kwon, Sukhan Lee, Jaehoon Lee, Sang-Hyuk Kwon, Je-Min Ryu, Jong-Pil Son, Seongil O, Hak-Soo Yu, Haesuk Lee, Soo Young Kim, Youngmin Cho, Jin Guk Kim, Jongyoon Choi, Hyunsung Shin, Jin Kim, BengSeng Phuah, Hyoungmin Kim, Myeong Jun Song, Ahn Choi, Daeho Kim, Sooyoung Kim, Eun-Bong Kim, David Wang, Shinhaeng Kang, Yuhwan Ro, Seungwoo Seo, Joon-Ho Song, Jaeyoun Youn, Kyomin Sohn, Nam Sung Kim
2021	J	`jnl`	A 16-GB 640-GB/s HBM2E DRAM With a Data-Bus Window Extension Technique and a Synergetic On-Die ECC Scheme. IEEE J. Solid State Circuits Ki Chul Chun, Yong-Ki Kim, Yesin Ryu, Jaewon Park, Chi Sung Oh, Young-Yong Byun, So-Young Kim, Dong-Hak Shin, Jun Gyu Lee, Byung-Kyu Ho, Min-Sang Park, Seong-Jin Cho, Seunghan Woo, Byoung-Mo Moon, Beomyong Kil, Sungoh Ahn, Jae Hoon Lee, Sooyoung Kim, Seouk-Kyu Choi, Jae-Seung Jeong, Sung-Gi Ahn, Jihye Kim, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Jung-Bae Lee
2021	J	`jnl`	An 8.5-Gb/s/Pin 12-Gb LPDDR5 SDRAM With a Hybrid-Bank Architecture, Low Power, and Speed-Boosting Techniques. IEEE J. Solid State Circuits Chang-Kyo Lee, Hyung-Joon Chi, Jin-Seok Heo, Junghwan Park, Jin-Hun Jang, Dongkeon Lee, Jaehoon Jung, Dong-Hun Lee, Dae-Hyun Kim, Kihan Kim, Sang-Yun Kim, Dukha Park, Youngil Lim, Geuntae Park, Seungjun Lee, Seungki Hong, Dae-Hyun Kwon, Isak Hwang, Byongwook Na, Kyungryun Kim, Seouk-Kyu Choi, Hye-In Choi, Hangi-Jung, Wonil Bae, Jeong-Don Ihm, Seung-Jun Bae, Nam Sung Kim, Jung-Bae Lee
2021	—	`conf`	Aquabolt-XL: Samsung HBM2-PIM with in-memory processing for ML accelerators and beyond. HCS Jin Hyun Kim, Shinhaeng Kang, Sukhan Lee, Hyeonsu Kim, Woongjae Song, Yuhwan Ro, Seungwon Lee, David Wang, Hyunsung Shin, BengSeng Phuah, Jihyun Choi, Jinin So, Yeongon Cho, Joon-Ho Song, Jangseok Choi, Jeonghyeon Cho, Kyomin Sohn, Young-Soo Sohn, Kwang-Il Park, Nam Sung Kim
2021	J	`jnl`	BabelFish: Fusing Address Translations for Containers. IEEE Micro Dimitrios Skarlatos, Umur Darbaz, Bhargava Gopireddy, Nam Sung Kim, Josep Torrellas
2021	A*	`conf`	DiAG: a dataflow-inspired architecture for general-purpose processors. ASPLOS Dong Kai Wang, Nam Sung Kim
2021	A	`conf`	Doing more with less: training large DNN models on commodity servers for the masses. HotOS Youjie Li, Amar Phanishayee, Derek Murray, Nam Sung Kim
2021	A*	`conf`	Don't Forget the I/O When Allocating Your LLC. ISCA Yifan Yuan, Mohammad Alian, Yipeng Wang, Ren Wang, Ilia Kurakin, Charlie Tai, Nam Sung Kim
2021	A*	`conf`	GreenDIMM: OS-assisted DRAM Power Management for DRAM with a Sub-array Granularity Power-Down State. MICRO Seunghak Lee, Ki-Dong Kang, Hwanjun Lee, Hyungwon Park, Young Hoon Son, Nam Sung Kim, Daehoon Kim
2021	A*	`conf`	Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product. ISCA Sukhan Lee, Shinhaeng Kang, Jaehoon Lee, Hyeonsu Kim, Eojin Lee, Seungwoo Seo, Hosang Yoon, Seungwon Lee, Kyounghwan Lim, Hyunsung Shin, JinHyun Kim, Seongil O, Anand Iyer, David Wang, Kyomin Sohn, Nam Sung Kim
2021	J	`jnl`	IDIO: Orchestrating Inbound Network Data on Server Processors. IEEE Comput. Archit. Lett. Mohammad Alian, Jongmin Shin, Ki-Dong Kang, Ren Wang, Alexandros Daglis, Daehoon Kim, Nam Sung Kim
2021	A*	`conf`	NMAP: Power Management Based on Network Packet Processing Mode Transition for Latency-Critical Workloads. MICRO Ki-Dong Kang, Gyeongseo Park, Hyosang Kim, Mohammad Alian, Nam Sung Kim, Daehoon Kim
2021	A*	`conf`	QEI: Query Acceleration Can be Generic and Efficient in the Cloud. HPCA Yifan Yuan, Yipeng Wang, Ren Wang, Rangeen Basu Roy Chowdhury, Charlie Tai, Nam Sung Kim
2021	A*	`conf`	Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage Solution. ISCA Jie Zhang, Miryeong Kwon, Donghyun Gouk, Sungjoon Koh, Nam Sung Kim, Mahmut Taylan Kandemir, Myoungsoo Jung
2021	J	`jnl`	Revamping Storage Class Memory With Hardware Automated Memory-Over-Storage Solution. CoRR Jie Zhang, Miryeong Kwon, Donghyun Gouk, Sungjoon Koh, Nam Sung Kim, Mahmut Taylan Kandemir, Myoungsoo Jung
2021	J	`jnl`	Unlocking the Power of Inline Floating-Point Operations on Programmable Switches. CoRR Yifan Yuan, Omar Alama, Amedeo Sapio, Jiawei Fei, Jacob Nelson, Dan R. K. Ports, Marco Canini, Nam Sung Kim
2021	J	`jnl`	Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures. Microprocess. Microsystems Bingchao Li, Jizeng Wei, Nam Sung Kim
2020	—	`conf`	22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme. ISSCC Chi-Sung Oh, Ki Chul Chun, Young-Yong Byun, Yong-Ki Kim, So-Young Kim, Yesin Ryu, Jaewon Park, Sinho Kim, Sang-uhn Cha, Dong-Hak Shin, Jungyu Lee, Jong-Pil Son, Byung-Kyu Ho, Seong-Jin Cho, Beomyong Kil, Sungoh Ahn, Baekmin Lim, Yong-Sik Park, Kijun Lee, Myung-Kyu Lee, Seungduk Baek, Junyong Noh, Jae-Wook Lee, SeungSeob Lee, Sooyoung Kim, Bo-Tak Lim, Seouk-Kyu Choi, Jin-Guk Kim, Hye-In Choi, Hyuk-Jun Kwon, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Kwang-Il Park, Jung-Bae Lee
2020	A*	`conf`	BabelFish: Fusing Address Translations for Containers. ISCA Dimitrios Skarlatos, Umur Darbaz, Bhargava Gopireddy, Nam Sung Kim, Josep Torrellas
2020	A*	`conf`	Bit-Parallel Vector Composability for Neural Acceleration. DAC Soroush Ghodrati, Hardik Sharma, Cliff Young, Nam Sung Kim, Hadi Esmaeilzadeh
2020	J	`jnl`	Bit-Parallel Vector Composability for Neural Acceleration. CoRR Soroush Ghodrati, Hardik Sharma, Cliff Young, Nam Sung Kim, Hadi Esmaeilzadeh
2020	B	`conf`	Data Direct I/O Characterization for Future I/O System Exploration. ISPASS Mohammad Alian, Yifan Yuan, Jie Zhang, Ren Wang, Myoungsoo Jung, Nam Sung Kim
2020	J	`jnl`	Design and Implementation of SSD-Assisted Backup and Recovery for Database Systems. IEEE Trans. Knowl. Data Eng. Yongseok Son, Moonsub Kim, Sunggon Kim, Heon Young Yeom, Nam Sung Kim, Hyuck Han
2020	J	`jnl`	Errata to "Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array Clusters". IEEE Trans. Parallel Distributed Syst. Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung
2020	A*	`conf`	FReaC Cache: Folded-logic Reconfigurable Computing in the Last Level Cache. MICRO Ashutosh Dhar, Xiaohao Wang, Hubertus Franke, Jinjun Xiong, Jian Huang, Wen-mei W. Hwu, Nam Sung Kim, Deming Chen
2020	J	`jnl`	FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack. IEEE Comput. Archit. Lett. Jie Zhang, Miryeong Kwon, Sanghyun Han, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung
2020	J	`jnl`	FastDrain: Removing Page Victimization Overheads in NVMe Storage Stack. CoRR Jie Zhang, Miryeong Kwon, Sanghyun Han, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung
2020	J	`jnl`	IOCA: High-Speed I/O-Aware LLC Management for Network-Centric Multi-Tenant Platform. CoRR Yifan Yuan, Mohammad Alian, Yipeng Wang, Ilia Kurakin, Ren Wang, Tsung-Yuan Charlie Tai, Nam Sung Kim
2020	Misc	`conf`	Leveraging Dynamic Partial Reconfiguration with Scalable ILP Based Task Scheduling. VLSID Ashutosh Dhar, Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, Deming Chen
2020	B	`conf`	Mixed-Signal Charge-Domain Acceleration of Deep Neural Networks through Interleaved Bit-Partitioned Arithmetic. PACT Soroush Ghodrati, Hardik Sharma, Sean Kinzer, Amir Yazdanbakhsh, Jongse Park, Nam Sung Kim, Doug Burger, Hadi Esmaeilzadeh
2020	J	`jnl`	Network Packet Processing Mode-Aware Power Management for Data Center Servers. IEEE Comput. Archit. Lett. Ki-Dong Kang, Gyeongseo Park, Nam Sung Kim, Daehoon Kim
2020	A*	`conf`	Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration of Deep Neural Networks. MICRO Soroush Ghodrati, Byung Hoon Ahn, Joon Kyung Kim, Sean Kinzer, Brahmendra Reddy Yatham, Navateja Alla, Hardik Sharma, Mohammad Alian, Eiman Ebrahimi, Nam Sung Kim, Cliff Young, Hadi Esmaeilzadeh
2019	A	`conf`	A ISLPED Dong Kai Wang, Nam Sung Kim
2019	J	`jnl`	An Efficient GPU Cache Architecture for Applications with Irregular Memory Access Patterns. ACM Trans. Archit. Code Optim. Bingchao Li, Jizeng Wei, Jizhou Sun, Murali Annavaram, Nam Sung Kim
2019	J	`jnl`	An Energy-Efficient Programmable Mixed-Signal Accelerator for Machine Learning Algorithms. IEEE Micro Mingu Kang, Prakalp Srivastava, Vikram S. Adve, Nam Sung Kim, Naresh R. Shanbhag
2019	—	`ch.`	Approximate Ultra-Low Voltage Many-Core Processor Design. Approximate Circuits Nam Sung Kim, Ulya R. Karpuzcu
2019	A*	`conf`	AxMemo: hardware-compiler co-design for approximate code memoization. ISCA Zhenhong Liu, Amir Yazdanbakhsh, Dong Kai Wang, Hadi Esmaeilzadeh, Nam Sung Kim
2019	J	`jnl`	Exploiting OS-Level Memory Offlining for DRAM Power Management. IEEE Comput. Archit. Lett. Seunghak Lee, Nam Sung Kim, Daehoon Kim
2019	J	`jnl`	Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array Clusters. CoRR Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung
2019	J	`jnl`	Exploring Fault-Tolerant Erasure Codes for Scalable All-Flash Array Clusters. IEEE Trans. Parallel Distributed Syst. Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung
2019	A*	`conf`	FlatFlash: Exploiting the Byte-Accessibility of SSDs within a Unified Memory-Storage Hierarchy. ASPLOS Ahmed H. M. O. Abulila, Vikram Sharma Mailthody, Zaid Qureshi, Jian Huang, Nam Sung Kim, Jinjun Xiong, Wen-mei W. Hwu
2019	—	`conf`	Ghost routers: energy-efficient asymmetric multicore processors with symmetric NoCs. NOCS Hyojun Son, Hanjoon Kim, Hao Wang, Nam Sung Kim, John Kim
2019	A*	`conf`	LL-PCM: Low-Latency Phase Change Memory Architecture. DAC Nam Sung Kim, Choungki Song, Woo Young Cho, Jian Huang, Myoungsoo Jung
2019	J	`jnl`	Mixed-Signal Charge-Domain Acceleration of Deep Neural networks through Interleaved Bit-Partitioned Arithmetic. CoRR Soroush Ghodrati, Hardik Sharma, Sean Kinzer, Amir Yazdanbakhsh, Kambiz Samadi, Nam Sung Kim, Doug Burger, Hadi Esmaeilzadeh
2019	—	`conf`	Near-Memory and In-Storage FPGA Acceleration for Emerging Cognitive Computing Workloads. ISVLSI Ashutosh Dhar, Sitao Huang, Jinjun Xiong, Damir A. Jamsek, Bruno Mesnet, Jian Huang, Nam Sung Kim, Wen-mei W. Hwu, Deming Chen
2019	A*	`conf`	NetDIMM: Low-Latency Near-Memory Network Interface Architecture. MICRO Mohammad Alian, Nam Sung Kim
2019	A*	`conf`	Practical Near-Data Processing to Evolve Memory and Storage Devices into Mainstream Heterogeneous Computing Systems. DAC Nam Sung Kim, Pankaj Mehra
2019	—	`conf`	SMART: STT-MRAM architecture for smart activation and sensing. MEMSYS Byoungchan Oh, Nilmini Abeyratne, Nam Sung Kim, Ronald G. Dreslinski, Trevor N. Mudge
2018	B	`conf`	3D-Xpath: high-density managed DRAM architecture with cost-effective alternative paths for memory transactions. PACT Sukhan Lee, Kiwon Lee, Min Chul Sung, Mohammad Alian, Chankyung Kim, Wooyeong Cho, Reum Oh, Seongil O, Jung Ho Ahn, Nam Sung Kim
2018	A*	`conf`	A Network-Centric Hardware/Algorithm Co-Design to Accelerate Distributed Training of Deep Neural Networks. MICRO Youjie Li, Jongse Park, Mohammad Alian, Yifan Yuan, Zheng Qu, Peitian Pan, Ren Wang, Alexander G. Schwing, Hadi Esmaeilzadeh, Nam Sung Kim
2018	—	`conf`	A load balancing technique for memory channels. MEMSYS Byoungchan Oh, Nam Sung Kim, Jeongseob Ahn, Bingchao Li, Ronald G. Dreslinski, Trevor N. Mudge
2018	A*	`conf`	Amber*: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources. MICRO Donghyun Gouk, Miryeong Kwon, Jie Zhang, Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung
2018	J	`jnl`	Amber: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources. CoRR Donghyun Gouk, Miryeong Kwon, Jie Zhang, Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung
2018	A*	`conf`	Application-Transparent Near-Memory Processing Architecture with Memory Channel Network. MICRO Mohammad Alian, Seungwon Min, Hadi Asgharimoghaddam, Ashutosh Dhar, Dong Kai Wang, Thomas Roewer, Adam J. McPadden, Oliver O'Halloran, Deming Chen, Jinjun Xiong, Daehoon Kim, Wen-mei W. Hwu, Nam Sung Kim
2018	A	`conf`	CIAO: Cache Interference-Aware Throughput-Oriented Architecture and Scheduling for GPUs. IPDPS Jie Zhang, Shuwen Gao, Nam Sung Kim, Myoungsoo Jung
2018	J	`jnl`	CIAO: Cache Interference-Aware Throughput-Oriented Architecture and Scheduling for GPUs. CoRR Jie Zhang, Shuwen Gao, Nam Sung Kim, Myoungsoo Jung
2018	J	`jnl`	CNFET-Based High Throughput SIMD Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Li Jiang, Tianjian Li, Naifeng Jing, Nam Sung Kim, Minyi Guo, Xiaoyao Liang
2018	A	`conf`	CTA-Aware Prefetching and Scheduling for GPU. IPDPS Gunjae Koo, Hyeran Jeon, Zhenhong Liu, Nam Sung Kim, Murali Annavaram
2018	A*	`conf`	FlashShare: Punching Through Server Storage Stack from Kernel to Firmware for Ultra-Low Latency SSDs. OSDI Jie Zhang, Miryeong Kwon, Donghyun Gouk, Sungjoon Koh, Changlim Lee, Mohammad Alian, Myoungjun Chun, Mahmut Taylan Kandemir, Nam Sung Kim, Jihong Kim, Myoungsoo Jung
2018	Misc	`conf`	FlexiGAN: An End-to-End Solution for FPGA Acceleration of Generative Adversarial Networks. FCCM Amir Yazdanbakhsh, Michael Brzozowski, Behnam Khaleghi, Soroush Ghodrati, Kambiz Samadi, Nam Sung Kim, Hadi Esmaeilzadeh
2018	A*	`conf`	GANAX: A Unified MIMD-SIMD Acceleration for Generative Adversarial Networks. ISCA Amir Yazdanbakhsh, Kambiz Samadi, Nam Sung Kim, Hadi Esmaeilzadeh
2018	J	`jnl`	GANAX: A Unified MIMD-SIMD Acceleration for Generative Adversarial Networks. CoRR Amir Yazdanbakhsh, Hajar Falahati, Philip J. Wolfe, Kambiz Samadi, Nam Sung Kim, Hadi Esmaeilzadeh
2018	A*	`conf`	GradiVeQ: Vector Quantization for Bandwidth-Efficient Gradient Aggregation in Distributed CNN Training. NeurIPS Mingchao Yu, Zhifeng Lin, Krishna Narra, Songze Li, Youjie Li, Nam Sung Kim, Alexander G. Schwing, Murali Annavaram, Salman Avestimehr
2018	J	`jnl`	GradiVeQ: Vector Quantization for Bandwidth-Efficient Gradient Aggregation in Distributed CNN Training. CoRR Mingchao Yu, Zhifeng Lin, Krishna Narra, Songze Li, Youjie Li, Nam Sung Kim, Alexander G. Schwing, Murali Annavaram, Salman Avestimehr
2018	B	`conf`	In-DRAM near-data approximate acceleration for GPUs. PACT Amir Yazdanbakhsh, Choungki Song, Jacob Sacks, Pejman Lotfi-Kamran, Hadi Esmaeilzadeh, Nam Sung Kim
2018	J	`jnl`	Leveraging Power-Performance Relationship of Energy-Efficient Modern DRAM Devices. IEEE Access Sukhan Lee, Hyunyoon Cho, Young Hoon Son, Yuhwan Ro, Nam Sung Kim, Jung Ho Ahn
2018	A	`conf`	Load-Triggered Warp Approximation on GPU. ISLPED Zhenhong Liu, Daniel Wong, Nam Sung Kim
2018	A*	`conf`	PROMISE: An End-to-End Design of a Programmable Mixed-Signal Accelerator for Machine-Learning Algorithms. ISCA Prakalp Srivastava, Mingu Kang, Sujan K. Gonugondla, Sungmin Lim, Jungwook Choi, Vikram S. Adve, Nam Sung Kim, Naresh R. Shanbhag
2018	A*	`conf`	Pipe-SGD: A Decentralized Pipelined SGD Framework for Distributed Deep Net Training. NeurIPS Youjie Li, Mingchao Yu, Songze Li, Salman Avestimehr, Nam Sung Kim, Alexander G. Schwing
2018	J	`jnl`	Pipe-SGD: A Decentralized Pipelined SGD Framework for Distributed Deep Net Training. CoRR Youjie Li, Mingchao Yu, Songze Li, Salman Avestimehr, Nam Sung Kim, Alexander G. Schwing
2018	—	`conf`	Practical Challenges in Supporting Function in Memory. A-SSCC Nam Sung Kim
2018	J	`jnl`	Semi-Coherent DMA: An Alternative I/O Coherency Management for Embedded Systems. IEEE Comput. Archit. Lett. Seungwon Min, Mohammad Alian, Wen-Mei Hwu, Nam Sung Kim
2018	J	`jnl`	SiMul: An Algorithm-Driven Approximate Multiplier Design for Machine Learning. IEEE Micro Zhenhong Liu, Amir Yazdanbakhsh, Taejoon Park, Hadi Esmaeilzadeh, Nam Sung Kim
2018	J	`jnl`	SimpleSSD: Modeling Solid State Drives for Holistic System Simulation. IEEE Comput. Archit. Lett. Myoungsoo Jung, Jie Zhang, Ahmed H. M. O. Abulila, Miryeong Kwon, Narges Shahidi, John Shalf, Nam Sung Kim, Mahmut T. Kandemir
2018	—	`conf`	Simulating PCI-Express Interconnect for Future System Exploration. IISWC Mohammad Alian, Krishna Parasuram Srinivasan, Nam Sung Kim
2018	—	`conf`	VIP: Virtual Performance-State for Efficient Power Management of Virtual Machines. SoCC Ki-Dong Kang, Mohammad Alian, Daehoon Kim, Jaehyuk Huh, Nam Sung Kim
2017	—	`conf`	Collaborative (CPU + GPU) algorithms for triangle counting and truss decomposition on the Minsky architecture: Static graph challenge: Subgraph isomorphism. HPEC Ketan Date, Keven Feng, Rakesh Nagi, Jinjun Xiong, Nam Sung Kim, Wen-mei W. Hwu
2017	A*	`conf`	Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices. HPCA Sang-uhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Gyo-Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn, Nam Sung Kim
2017	A	`conf`	Elastic-Cache: GPU Cache Architecture for Efficient Fine- and Coarse-Grained Cache-Line Management. IPDPS Bingchao Li, Jizhou Sun, Murali Annavaram, Nam Sung Kim
2017	A*	`conf`	G-Scalar: Cost-Effective Generalized Scalar Execution Architecture for Power-Efficient GPUs. HPCA Zhenhong Liu, Syed Zohaib Gilani, Murali Annavaram, Nam Sung Kim
2017	J	`jnl`	Heterogeneous Computing Meets Near-Memory Acceleration and High-Level Synthesis in the Post-Moore Era. IEEE Micro Nam Sung Kim, Deming Chen, Jinjun Xiong, Wen-mei W. Hwu
2017	—	`conf`	Janus: supporting heterogeneous power management in virtualized environments. SoCC Daehoon Kim, Mohammad Alian, Jaehyuk Huh, Nam Sung Kim
2017	A*	`conf`	NCAP: Network-Driven, Packet Context-Aware Power Management for Client-Server Architecture. HPCA Mohammad Alian, Ahmed H. M. O. Abulila, Lokesh Jindal, Daehoon Kim, Nam Sung Kim
2017	A*	`conf`	Pageforge: a near-memory content-aware page-merging architecture. MICRO Dimitrios Skarlatos, Nam Sung Kim, Josep Torrellas
2017	—	`conf`	Rebooting the Data Access Hierarchy of Computing Systems. ICRC Wen-mei W. Hwu, Izzat El Hajj, Simon Garcia De Gonzalo, Carl Pearson, Nam Sung Kim, Deming Chen, Jinjun Xiong, Zehra Sura
2017	J	`jnl`	SimpleSSD: Modeling Solid State Drives for Holistic System Simulation. CoRR Myoungsoo Jung, Jie Zhang, Ahmed H. M. O. Abulila, Miryeong Kwon, Narges Shahidi, John Shalf, Nam Sung Kim, Mahmut T. Kandemir
2017	J	`jnl`	Smart Gait-Aid Glasses for Parkinson's Disease Patients. IEEE Trans. Biomed. Eng. DaeHan Ahn, Hyerim Chung, Ho-Won Lee, Kyunghun Kang, Pan-Woo Ko, Nam Sung Kim, Taejoon Park
2017	A	`conf`	Temporal codes in on-chip interconnects. ISLPED Michael Mishkin, Nam Sung Kim, Mikko H. Lipasti
2017	J	`jnl`	Understanding System Characteristics of Online Erasure Coding on Scalable, Distributed and Large-Scale SSD Array Systems. CoRR Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung
2017	—	`conf`	Understanding power-performance relationship of energy-efficient modern DRAM devices. IISWC Sukhan Lee, Yuhwan Ro, Young Hoon Son, Hyunyoon Cho, Nam Sung Kim, Jung Ho Ahn
2017	—	`conf`	Understanding system characteristics of online erasure coding on scalable, distributed and large-scale SSD array systems. IISWC Sungjoon Koh, Jie Zhang, Miryeong Kwon, Jungyeon Yoon, David Donofrio, Nam Sung Kim, Myoungsoo Jung
2017	B	`conf`	dist-gem5: Distributed simulation of computer clusters. ISPASS Mohammad Alian, Umur Darbaz, Gábor Dózsa, Stephan Diestelhorst, Daehoon Kim, Nam Sung Kim
2016	J	`jnl`	Approximate Computing: A Survey. IEEE Des. Test Qiang Xu, Todd Mytkowicz, Nam Sung Kim
2016	A*	`conf`	Approximating warps with intra-warp operand value similarity. HPCA Daniel Wong, Nam Sung Kim, Murali Annavaram
2016	A	`conf`	Bit Serializing a Microprocessor for Ultra-low-power. ISLPED Matthew Tomei, Henry Duwe, Nam Sung Kim, Rakesh Kumar
2016	C	`conf`	CNFET-based high throughput register file architecture. ICCD Tianjian Li, Li Jiang, Naifeng Jing, Nam Sung Kim, Xiaoyao Liang
2016	A*	`conf`	Chameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems. MICRO Hadi Asghari Moghaddam, Young Hoon Son, Jung Ho Ahn, Nam Sung Kim
2016	A*	`conf`	DUANG: Fast and lightweight page migration in asymmetric memory systems. HPCA Hao Wang, Jie Zhang, Sharmila Shridhar, Gieseo Park, Myoungsoo Jung, Nam Sung Kim
2016	J	`jnl`	Exploring new features of high-bandwidth memory for GPUs. IEICE Electron. Express Bingchao Li, Choungki Song, Jizeng Wei, Jung Ho Ahn, Nam Sung Kim
2016	—	`conf`	Fine-Grained Task Migration for Graph Algorithms Using Processing in Memory. IPDPS Workshops Paula Aguilera, Dong Ping Zhang, Nam Sung Kim, Nuwan Jayasena
2016	J	`jnl`	Guest Editors' Introduction: Approximate Computing. IEEE Des. Test Qiang Xu, Todd Mytkowicz, Nam Sung Kim
2016	J	`jnl`	Near-DRAM Acceleration with Single-ISA Heterogeneous Processing in Standard Memory Modules. IEEE Micro Hadi Asghari Moghaddam, Amin Farmahini Farahani, Katherine Morrow, Jung Ho Ahn, Nam Sung Kim
2016	A	`conf`	On Effective and Efficient Quality Management for Approximate Computing. ISLPED Ting Wang, Qian Zhang, Nam Sung Kim, Qiang Xu
2016	A*	`conf`	ScalCore: Designing a core for voltage scalability. HPCA Bhargava Gopireddy, Choungki Song, Josep Torrellas, Nam Sung Kim, Aditya Agrawal, Asit K. Mishra
2016	A*	`conf`	Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks. MICRO Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert C. N. Pilawa-Podgurski, Ulya R. Karpuzcu, Radu Teodorescu, Nam Sung Kim, Josep Torrellas
2016	J	`jnl`	SpinWise: A Practical Energy-Efficient Synchronization Technique for CMPs. SIGARCH Comput. Archit. News Hadi Asgharimoghaddam, Nam Sung Kim
2016	C	`conf`	VARIUS-TC: A modular architecture-level model of parametric variation for thin-channel switches. ICCD S. Karen Khatamifard, Michael Resch, Nam Sung Kim, Ulya R. Karpuzcu
2016	A*	`conf`	VR-scale: runtime dynamic phase scaling of processor voltage regulators for improving power efficiency. DAC Hadi Asghari Moghaddam, Hamid Reza Ghasemi, Abhishek Arvind Sinkar, Indrani Paul, Nam Sung Kim
2016	J	`jnl`	Workload-Aware Optimal Power Allocation on Single-Chip Heterogeneous Processors. IEEE Trans. Parallel Distributed Syst. Jae Young Jang, Hao Wang, Euijin Kwon, Jae W. Lee, Nam Sung Kim
2016	J	`jnl`	pd-gem5: Simulation Infrastructure for Parallel/Distributed Computer Systems. IEEE Comput. Archit. Lett. Mohammad Alian, Daehoon Kim, Nam Sung Kim
2015	A*	`conf`	Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems. HPCA Hao Wang, Chang-Jae Park, Gyungsu Byun, Jung Ho Ahn, Nam Sung Kim
2015	—	`conf`	Bolt: Faster Reconfiguration in Operating Systems. USENIX ATC Sankaralingam Panneerselvam, Michael M. Swift, Nam Sung Kim
2015	A*	`conf`	COP: to compress and protect main memory. ISCA David J. Palframan, Nam Sung Kim, Mikko H. Lipasti
2015	A*	`conf`	CiDRA: A cache-inspired DRAM resilience architecture. HPCA Young Hoon Son, Sukhan Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, Jung Ho Ahn
2015	C	`conf`	Comparison of single-ISA heterogeneous versus wide dynamic range processors for mobile applications. ICCD Hamid Reza Ghasemi, Ulya R. Karpuzcu, Nam Sung Kim
2015	J	`jnl`	DRAMA: An Architecture for Accelerated Processing Near Memory. IEEE Comput. Archit. Lett. Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim
2015	J	`jnl`	Decoupled Control and Data Processing for Approximate Near-Threshold Voltage Computing. IEEE Micro Ismail Akturk, Nam Sung Kim, Ulya R. Karpuzcu
2015	J	`jnl`	Energy-Efficient Approximate Multiplication for Digital Signal Processing and Classification Applications. IEEE Trans. Very Large Scale Integr. Syst. Srinivasan Narayanamoorthy, Hadi Asghari Moghaddam, Zhenhong Liu, Taejoon Park, Nam Sung Kim
2015	A*	`conf`	GPU register file virtualization. MICRO Hyeran Jeon, Gokul Subramanian Ravi, Nam Sung Kim, Murali Annavaram
2015	A*	`conf`	NDA: Near-DRAM acceleration architecture leveraging commodity DRAM devices and standard memory modules. HPCA Amin Farmahini Farahani, Jung Ho Ahn, Katherine Morrow, Nam Sung Kim
2015	—	`conf`	Online and Operand-Aware Detection of Failures Utilizing False Alarm Vectors. ACM Great Lakes Symposium on VLSI Amir Yazdanbakhsh, David J. Palframan, Azadeh Davoodi, Nam Sung Kim, Mikko H. Lipasti
2015	A*	`conf`	iPatch: Intelligent fault patching to improve energy efficiency. HPCA David J. Palframan, Nam Sung Kim, Mikko H. Lipasti
2015	A*	`conf`	vCache: architectural support for transparent and isolated virtual LLCs in virtualized environments. MICRO Daehoon Kim, Hwanju Kim, Nam Sung Kim, Jaehyuk Huh
2014	A*	`conf`	Accordion: Toward soft Near-Threshold Voltage Computing. HPCA Ulya R. Karpuzcu, Ismail Akturk, Nam Sung Kim
2014	J	`jnl`	Energy-Efficient Pixel-Arithmetic. IEEE Trans. Computers Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2014	B	`conf`	Energy-efficient reconfigurable cache architectures for accelerator-enabled embedded systems. ISPASS Amin Farmahini Farahani, Nam Sung Kim, Katherine Morrow
2014	C	`conf`	Fair share: Allocation of GPU resources for both performance and fairness. ICCD Paula Aguilera, Katherine Morrow, Nam Sung Kim
2014	J	`jnl`	Low-Cost Per-Core Voltage Domain Support for Power-Constrained High-Performance Processors. IEEE Trans. Very Large Scale Integr. Syst. Abhishek A. Sinkar, Hamid Reza Ghasemi, Michael J. Schulte, Ulya R. Karpuzcu, Nam Sung Kim
2014	J	`jnl`	Low-cost scratchpad memory organizations using heterogeneous cell sizes for low-voltage operations. Microprocess. Microsystems Syed Zohaib Gilani, Taejoon Park, Nam Sung Kim
2014	—	`conf`	Maximizing throughput of power/thermal-constrained processors by balancing power consumption of cores. ISQED Abhishek A. Sinkar, Hao Wang, Nam Sung Kim
2014	B	`conf`	Memory scheduling towards high-throughput cooperative heterogeneous computing. PACT Hao Wang, Ripudaman Singh, Michael J. Schulte, Nam Sung Kim
2014	J	`jnl`	Optimization of a Cell Counting Algorithm for Mobile Point-of-Care Testing Platforms. Sensors DaeHan Ahn, Nam Sung Kim, Sang Jun Moon, Taejoon Park, Sang Hyuk Son
2014	A*	`conf`	Precision-aware soft error protection for GPUs. HPCA David J. Palframan, Nam Sung Kim, Mikko H. Lipasti
2014	A	`conf`	Process variation-aware workload partitioning algorithms for GPUs supporting spatial-multitasking. DATE Paula Aguilera, Jungseob Lee, Amin Farmahini Farahani, Katherine Morrow, Michael J. Schulte, Nam Sung Kim
2014	—	`conf`	QoS-aware dynamic resource allocation for spatial-multitasking GPUs. ASP-DAC Paula Aguilera, Katherine Morrow, Nam Sung Kim
2014	C	`conf`	Quantitative comparison of the power reduction techniques for samsung reconfigurable processor. ISCAS Hoyoung Kim, Soojung Ryu, Abhishek A. Sinkar, Nam Sung Kim
2014	B	`conf`	RCS: runtime resource and core scaling for power-constrained multi-core processors. PACT Hamid Reza Ghasemi, Nam Sung Kim
2014	A*	`conf`	Row-buffer decoupling: A case for low-latency DRAM microarchitecture. ISCA Seongil O, Young Hoon Son, Nam Sung Kim, Jung Ho Ahn
2014	J	`jnl`	SleepScale: Runtime Joint Speed Scaling and Sleep States Management for Power Efficient Data Centers. CoRR Yanpei Liu, Stark C. Draper, Nam Sung Kim
2014	A*	`conf`	SleepScale: Runtime joint speed scaling and sleep states management for power efficient data centers. ISCA Yanpei Liu, Stark C. Draper, Nam Sung Kim
2013	J	`jnl`	Clamping Virtual Supply Voltage of Power-Gated Circuits for Active Leakage Reduction and Gate-Oxide Reliability. IEEE Trans. Very Large Scale Integr. Syst. Abhishek A. Sinkar, Taejoon Park, Nam Sung Kim
2013	J	`jnl`	Coping with Parametric Variation at Near-Threshold Voltages. IEEE Micro Ulya R. Karpuzcu, Nam Sung Kim, Josep Torrellas
2013	A	`conf`	Dynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os. ICCAD Daniel W. Chang, Young Hoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael J. Schulte, Nam Sung Kim
2013	A*	`conf`	EnergySmart: Toward energy-efficient manycores for Near-Threshold Computing. HPCA Ulya R. Karpuzcu, Abhishek A. Sinkar, Nam Sung Kim, Josep Torrellas
2013	A*	`conf`	Exploiting GPU peak-power and performance tradeoffs through reduced effective pipeline latency. MICRO Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2013	A*	`conf`	GPUWattch: enabling energy optimizations in GPGPUs. ISCA Jingwen Leng, Tayler H. Hetherington, Ahmed ElTantawy, Syed Zohaib Gilani, Nam Sung Kim, Tor M. Aamodt, Vijay Janapa Reddi
2013	J	`jnl`	Improving Throughput of Power-Constrained Many-Core Processors Based on Unreliable Devices. IEEE Micro Hao Wang, Nam Sung Kim
2013	A	`conf`	Improving platform energy: chip area trade-off in near-threshold computing environment. ICCAD Hao Wang, Abhishek A. Sinkar, Nam Sung Kim
2013	A*	`conf`	Power-efficient computing for compute-intensive GPGPU applications. HPCA Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2013	J	`jnl`	Queuing Theoretic Analysis of Power-performance Tradeoff in Power-efficient Computing CoRR Yanpei Liu, Stark C. Draper, Nam Sung Kim
2013	A	`conf`	REEL: Reducing effective execution latency of floating point operations. ISLPED Vignyan Reddy, Syed Zohaib Gilani, Erika Gunadi, Nam Sung Kim, Michael J. Schulte, Mikko H. Lipasti
2013	—	`conf`	Reevaluating the latency claims of 3D stacked memories. ASP-DAC Daniel W. Chang, Gyungsu Byun, Hoyoung Kim, Minwook Ahn, Soojung Ryu, Nam Sung Kim, Michael J. Schulte
2013	J	`jnl`	Resilient High-Performance Processors with Spare RIBs. IEEE Micro David J. Palframan, Nam Sung Kim, Mikko H. Lipasti
2012	—	`conf`	A Linear Algebra Core Design for Efficient Level-3 BLAS. ASAP Ardavan Pedram, Syed Zohaib Gilani, Nam Sung Kim, Robert A. van de Geijn, Michael J. Schulte, Andreas Gerstlauer
2012	J	`jnl`	Analyzing Potential Throughput Improvement of Power- and Thermal-Constrained Multicore Processors by Exploiting DVFS and PCPG. IEEE Trans. Very Large Scale Integr. Syst. Jungseob Lee, Nam Sung Kim
2012	J	`jnl`	Analyzing the Impact of Joint Optimization of Cell Size, Redundancy, and ECC on Low-Voltage SRAM Array Total Area. IEEE Trans. Very Large Scale Integr. Syst. Nam Sung Kim, Stark C. Draper, Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, Taejoon Park
2012	A*	`conf`	Cost-effective power delivery to support per-core voltage domains for power-constrained processors. DAC Hamid Reza Ghasemi, Abhishek A. Sinkar, Michael J. Schulte, Nam Sung Kim
2012	B	`conf`	Lossless and lossy memory I/O link compression for improving performance of GPGPU workloads. PACT Vijay Sathish, Michael J. Schulte, Nam Sung Kim
2012	J	`jnl`	Maximizing Frequency and Yield of Power-Constrained Designs Using Programmable Power-Gating. IEEE Trans. Very Large Scale Integr. Syst. Nam Sung Kim, Abhishek A. Sinkar, Jun Seomun, Youngsoo Shin
2012	A	`conf`	Mitigating random variation with spare RIBs: Redundant intermediate bitslices. DSN David J. Palframan, Nam Sung Kim, Mikko H. Lipasti
2012	B	`conf`	Power-efficient computing for compute-intensive GPGPU applications. PACT Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2012	A*	`conf`	The case for GPGPU spatial multitasking. HPCA Jacob Adriaens, Katherine Compton, Nam Sung Kim, Michael J. Schulte
2012	A	`conf`	VARIUS-NTV: A microarchitectural model to capture the increased sensitivity of manycores to process variations at near-threshold voltages. DSN Ulya R. Karpuzcu, Krishna B. Kolluru, Nam Sung Kim, Josep Torrellas
2012	—	`conf`	Virtual Floating-Point Units for Low-Power Embedded Processors. ASAP Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2012	B	`conf`	Workload and power budget partitioning for single-chip heterogeneous processors. PACT Hao Wang, Vijay Sathish, Ripudaman Singh, Michael J. Schulte, Nam Sung Kim
2012	A	`conf`	Workload-aware voltage regulator optimization for power efficient multi-core processors. DATE Abhishek A. Sinkar, Hao Wang, Nam Sung Kim
2011	—	`conf`	A low cost approach to calibrate on-chip thermal sensors. ISQED Krishna Bharath, Chunhua Yao, Nam Sung Kim, Parameswaran Ramanathan, Kewal K. Saluja
2011	—	`conf`	AVS-aware power-gate sizing for maximum performance and power efficiency of power-constrained processors. ASP-DAC Abhishek A. Sinkar, Nam Sung Kim
2011	—	`conf`	Analyzing the performance and energy impact of 3D memory integration on embedded DSPs. ICSAMOS Daniel W. Chang, Nam Sung Kim, Michael J. Schulte
2011	B	`conf`	Analyzing throughput of GPGPUs exploiting within-die core-to-core frequency variation. ISPASS Jungseob Lee, Paritosh Pratap Ajgaonkar, Nam Sung Kim
2011	—	`conf`	Energy-efficient floating-point arithmetic for digital signal processors. ACSCC Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2011	—	`conf`	Energy-efficient floating-point arithmetic for software-defined radio architectures. ASAP Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2011	B	`conf`	Improving Throughput of Power-Constrained GPUs Using Dynamic Voltage/Frequency and Core Scaling. PACT Jungseob Lee, Vijay Sathish, Michael J. Schulte, Katherine Compton, Nam Sung Kim
2011	A*	`conf`	Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors. HPCA Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim
2011	A	`conf`	Scratchpad memory optimizations for digital signal processing applications. DATE Syed Zohaib Gilani, Nam Sung Kim, Michael J. Schulte
2011	A	`conf`	Time redundant parity for low-cost transient error detection. DATE David J. Palframan, Nam Sung Kim, Mikko H. Lipasti
2010	—	`conf`	Analyzing and minimizing effects of temperature variation and NBTI on active leakage power of power-gated circuits. ISQED Abhishek A. Sinkar, Nam Sung Kim
2010	—	`conf`	Analyzing impact of multiple ABB and AVS domains on throughput of power and thermal-constrained multi-core processors. ASP-DAC Jungseob Lee, Shi-Ting Zhou, Nam Sung Kim
2010	A*	`conf`	Combating Aging with the Colt Duty Cycle Equalizer. MICRO Erika Gunadi, Abhishek A. Sinkar, Nam Sung Kim, Mikko H. Lipasti
2010	C	`conf`	Minimizing total area of low-voltage SRAM arrays through joint optimization of cell size, redundancy, and ECC. ICCD Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, Stark C. Draper, Nam Sung Kim
2010	A	`conf`	Optimal algorithm for profile-based power gating: A compiler technique for reducing leakage on execution units in microprocessors. ICCAD Danbee Park, Jungseob Lee, Nam Sung Kim, Taewhan Kim
2010	—	`conf`	Runtime temperature-based power estimation for optimizing throughput of thermal-constrained multi-core processors. ASP-DAC Dongkeun Oh, Nam Sung Kim, Charlie Chung-Ping Chen, Azadeh Davoodi, Yu Hen Hu
2010	—	`conf`	The compatibility analysis of thread migration and DVFS in multi-core processor. ISQED Dongkeun Oh, Charlie Chung-Ping Chen, Nam Sung Kim, Yu Hen Hu
2010	A	`conf`	Workload-adaptive process tuning strategy for power-efficient multi-core processors. ISLPED Jungseob Lee, Chi-Chao Wang, Hamid Reza Ghasemi, Lloyd Bircher, Yu Cao, Nam Sung Kim
2009	A	`conf`	Analyzing potential power reduction with adaptive voltage positioning optimized for multicore processors. ISLPED Abhishek A. Sinkar, Nam Sung Kim
2009	A	`conf`	Frequency and yield optimization using power gates in power-constrained designs. ISLPED Nam Sung Kim, Jun Seomun, Abhishek A. Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, Youngsoo Shin
2009	A*	`conf`	Optimizing throughput of power- and thermal-constrained multicore processors using DVFS and per-core power-gating. DAC Jungseob Lee, Nam Sung Kim
2009	A	`conf`	Optimizing total power of many-core processors considering voltage scaling limit and process variations. ISLPED Jungseob Lee, Nam Sung Kim
2009	A	`conf`	Statistical static timing analysis considering leakage variability in power gated designs. ISLPED Michael J. Anderson, Azadeh Davoodi, Jungseob Lee, Abhishek A. Sinkar, Nam Sung Kim
2008	J	`jnl`	On-chip cache device scaling limits and effective fault repair techniques in future nanoscale technology. Microprocess. Microsystems David Roberts, Nam Sung Kim, Trevor N. Mudge
2007	C	`conf`	On-Chip Cache Device Scaling Limits and Effective Fault Repair Techniques in Future Nanoscale Technology. DSD David Roberts, Nam Sung Kim, Trevor N. Mudge
2007	J	`jnl`	Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage CoRR Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge
2007	A	`conf`	Yield-driven near-threshold SRAM design. ICCAD Gregory K. Chen, David T. Blaauw, Trevor N. Mudge, Dennis Sylvester, Nam Sung Kim
2005	A	`conf`	Power-Performance Trade-Offs in Nanometer-Scale Multi-Level Caches Considering Total Leakage. DATE Robert Bai, Nam Sung Kim, Taeho Kgil, Dennis Sylvester, Trevor N. Mudge
2005	J	`jnl`	Quantitative analysis and optimization techniques for on-chip cache leakage power. IEEE Trans. Very Large Scale Integr. Syst. Nam Sung Kim, David T. Blaauw, Trevor N. Mudge
2005	—	`conf`	Total leakage optimization strategies for multi-level caches. ACM Great Lakes Symposium on VLSI Robert Bai, Nam Sung Kim, Dennis Sylvester, Trevor N. Mudge
2004	J	`jnl`	Circuit and microarchitectural techniques for reducing cache leakage power. IEEE Trans. Very Large Scale Integr. Syst. Nam Sung Kim, Krisztián Flautner, David T. Blaauw, Trevor N. Mudge
2004	A	`conf`	Microarchitectural power modeling techniques for deep sub-micron microprocessors. ISLPED Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M. Austin, Trevor N. Mudge
2004	J	`jnl`	Razor: Circuit-Level Correction of Timing Errors for Low-Power Operation. IEEE Micro Dan Ernst, Shidhartha Das, SeokWoo Lee, David T. Blaauw, Todd M. Austin, Trevor N. Mudge, Nam Sung Kim, Krisztián Flautner
2003	—	`conf`	A 2.3Gb/s fully integrated and synthesizable AES Rijndael core. CICC Nam Sung Kim, Trevor N. Mudge, Richard B. Brown
2003	J	`jnl`	Leakage Current: Moore's Law Meets Static Power. Computer Nam Sung Kim, Todd M. Austin, David T. Blaauw, Trevor N. Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut T. Kandemir, Narayanan Vijaykrishnan
2003	A	`conf`	Leakage Power Optimization Techniques for Ultra Deep Sub-Micron Multi-Level Caches. ICCAD Nam Sung Kim, David T. Blaauw, Trevor N. Mudge
2003	A*	`conf`	Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation. MICRO Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge
2003	A	`conf`	Reducing register ports using delayed write-back queues and operand pre-fetch. ICS Nam Sung Kim, Trevor N. Mudge
2003	A	`conf`	The microarchitecture of a low power register file. ISLPED Nam Sung Kim, Trevor N. Mudge
2002	A*	`conf`	Drowsy Caches: Simple Techniques for Reducing Leakage Power. ISCA Krisztián Flautner, Nam Sung Kim, Steven M. Martin, David T. Blaauw, Trevor N. Mudge
2002	A*	`conf`	Drowsy instruction caches: leakage power reduction using dynamic voltage scaling and cache sub-bank prediction. MICRO Nam Sung Kim, Krisztián Flautner, David T. Blaauw, Trevor N. Mudge