Nagib Hakim - RankMe

27 papers A* 5A 5B 1Misc 1Journal 9Unranked 6

Year	Rank	Type	Title / Venue / Authors
2023	—	`conf`	Fusing Temporal Graphs into Transformers for Time-Sensitive Question Answering. EMNLP (Findings) Xin Su, Phillip Howard, Nagib Hakim, Steven Bethard
2023	J	`jnl`	Fusing Temporal Graphs into Transformers for Time-Sensitive Question Answering. CoRR Xin Su, Phillip Howard, Nagib Hakim, Steven Bethard
2023	J	`jnl`	Thrill-K Architecture: Towards a Solution to the Problem of Knowledge Based Understanding. CoRR Gadi Singer, Joscha Bach, Tetiana Grinberg, Nagib Hakim, Phillip Howard, Vasudev Lal, Zev Rivlin
2022	A*	`conf`	TempoQR: Temporal Question Reasoning over Knowledge Graphs. AAAI Costas Mavromatis, Prasanna Lakkur Subramanyam, Vassilis N. Ioannidis, Adesoji Adeshina, Phillip Ryan Howard, Tetiana Grinberg, Nagib Hakim, George Karypis
2022	—	`conf`	Thrill-K Architecture: Towards a Solution to the Problem of Knowledge Based Understanding. AGI Gadi Singer, Joscha Bach, Tetiana Grinberg, Nagib Hakim, Phillip Ryan Howard, Vasudev Lal, Zev Rivlin
2021	J	`jnl`	Semi-supervised Interactive Intent Labeling. CoRR Saurav Sahay, Eda Okur, Nagib Hakim, Lama Nachman
2021	J	`jnl`	TempoQR: Temporal Question Reasoning over Knowledge Graphs. CoRR Costas Mavromatis, Prasanna Lakkur Subramanyam, Vassilis N. Ioannidis, Soji Adeshina, Phillip Ryan Howard, Tetiana Grinberg, Nagib Hakim, George Karypis
2020	J	`jnl`	A Holistic Formulation for System Margining and Jitter Tolerance Optimization in Industrial Post-Silicon Validation. IEEE Trans. Emerg. Top. Comput. Francisco E. Rangel-Patino, Andres Viveros-Wacher, José Ernesto Rayas-Sánchez, Ismael Duron-Rosales, Edgar-Andrei Vega-Ochoa, Nagib Hakim, Enrique Lopez-Miralrio
2019	J	`jnl`	Post-Silicon Receiver Equalization Metamodeling by Artificial Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Andres Viveros-Wacher, José Luis Chavez-Hurtado, Edgar-Andrei Vega-Ochoa, Nagib Hakim
2018	—	`conf`	Direct optimization of a PCI express link equalization in industrial post-silicon validation. LATS Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Edgar-Andrei Vega-Ochoa, Nagib Hakim
2018	A	`conf`	Transmitter and Receiver Equalizers Optimization Methodologies for High-Speed Links in Industrial Computer Platforms Post-Silicon Validation. ITC Francisco E. Rangel-Patino, José Ernesto Rayas-Sánchez, Nagib Hakim
2016	J	`jnl`	A 65 nm Programmable ANalog Device Array (PANDA) for Analog Circuit Emulation. IEEE Trans. Circuits Syst. I Regul. Pap. Naveen Suda, Jounghyuk Suh, Nagib Hakim, Yu Cao, Bertan Bakkaloglu
2014	J	`jnl`	Effective Post-Silicon Validation of System-on-Chips Using Quick Error Detection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. David Lin, Ted Hong, Yanjing Li, Eswaran S, Sharad Kumar, Farzan Fallah, Nagib Hakim, Donald S. Gardner, Subhasish Mitra
2013	Misc	`conf`	Innovative practices session 1C: Post-silicon validation. VTS Nagib Hakim, Charles Meissner
2013	A	`conf`	Overcoming post-silicon validation challenges through quick error detection (QED). DATE David Lin, Ted Hong, Yanjing Li, Farzan Fallah, Donald S. Gardner, Nagib Hakim, Subhasish Mitra
2013	J	`jnl`	Programmable ANalog Device Array (PANDA): A Methodology for Transistor-Level Analog Emulation. IEEE Trans. Circuits Syst. I Regul. Pap. Jounghyuk Suh, Naveen Suda, Cheng Xu, Nagib Hakim, Yu Cao, Bertan Bakkaloglu
2012	—	`conf`	A hybrid electrical-behavioral modeling approach for pre- and post-silicon electrical validation. CICC Nagib Hakim, A. Bhaduri, K. Donepudi, S. Bodapati
2012	—	`conf`	Bug localization techniques for effective post-silicon validation. ASP-DAC Subhasish Mitra, David Lin, Nagib Hakim, Donald S. Gardner
2012	A*	`conf`	Quick detection of difficult bugs for effective post-silicon validation. DAC David Lin, Ted Hong, Farzan Fallah, Nagib Hakim, Subhasish Mitra
2011	A*	`conf`	Programmable analog device array (PANDA): a platform for transistor-level analog reconfigurability. DAC Rui Zheng, Jounghyuk Suh, Cheng Xu, Nagib Hakim, Bertan Bakkaloglu, Yu Cao
2010	A*	`conf`	Post-silicon validation challenges: how EDA and academia can help. DAC Jagannath Keshava, Nagib Hakim, Chinna Prudvi
2010	A	`conf`	QED: Quick Error Detection tests for effective post-silicon validation. ITC Ted Hong, Yanjing Li, Sung-Boem Park, Diana Mui, David Lin, Ziyad Abdel Kaleq, Nagib Hakim, Helia Naeimi, Donald S. Gardner, Subhasish Mitra
2008	B	`conf`	FPGA family composition and effects of specialized blocks. FPL Pongstorn Maidee, Nagib Hakim, Kia Bazargan
2005	A	`conf`	Measurements and modeling of intrinsic fluctuations in MOSFET threshold voltage. ISLPED Ali Keshavarzi, Gerhard Schrom, Stephen Tang, Sean Ma, Keith A. Bowman, Sunit Tyagi, Kevin Zhang, Tom Linton, Nagib Hakim, Steven G. Duvall, John Brews, Vivek De
2005	A*	`conf`	Statistical static timing analysis: how simple can we get? DAC Chirayu S. Amin, Noel Menezes, Kip Killpack, Florentin Dartu, Umakanta Choudhury, Nagib Hakim, Yehea I. Ismail
2004	—	`conf`	Coping with Uncertainty. ISQED Nagib Hakim
2004	A	`conf`	The care and feeding of your statistical static timer. ICCAD Sani R. Nassif, Duane S. Boning, Nagib Hakim