Nagarajan Venkateswaran

13 papers A 1Journal 4Unranked 8
YearRankTypeTitle / Venue / Authors
2013 — conf
Performance and energy efficient cache system design: Simultaneous execution of multiple applications on heterogeneous cores.
ISVLSI
Nagarajan Venkateswaran, Kartik Lakshminarasimhan, Akash Sridhar, Prashanth Thinakaran, Rajagopal Hariharan, Vinesh Srinivasan, Ram Srivatsa Kannan, Aswin Sridharan
2012 — conf
Compilation Accelerator on Silicon.
ISVLSI
Nagarajan Venkateswaran, Vinesh Srinivasan, Ram Srivatsa Kannan, Prashanth Thinakaran, Rajagopal Hariharan, Bharanidharan Vasudevan, Nachiappan Chidambaram Nachiappan, Karthikeyan P. Saravanan, Aswin Sridharan, Vigneshwaran Sankaran, Vignesh Adhinarayanan, V. S. Vignesh, Ravindhiran Mukundrajan
2012 — conf
SCOC IP Cores for Custom Built Supercomputing Nodes.
ISVLSI
Nagarajan Venkateswaran, Rajagopal Hariharan, Vinesh Srinivasan, Ram Srivatsa Kannan, Prashanth Thinakaran, Vigneshwaran Sankaran, Bharanidharan Vasudevan, Ravindhiran Mukundrajan, Nachiappan Chidambaram Nachiappan, Aswin Sridharan, Karthikeyan P. Saravanan, Vignesh Adhinarayanan, Vignesh Veppur Sankaranarayanan
2010 — conf
Custom Built Heterogeneous Multi-core Architectures (CUBEMACH): Breaking the conventions.
IPDPS Workshops
Nagarajan Venkateswaran, Karthikeyan P. Saravanan, Nachiappan Chidambaram Nachiappan, Aravind Vasudevan, Balaji Subramaniam, Ravindhiran Mukundrajan
2009 — conf
A Non-Uniform Grid Based Ground Plane Model for High Performance Nodes: The Impact of Heterogeneous Cores on Ground Voltage Gradient.
ISVLSI
Nagarajan Venkateswaran, Ravindhiran Mukundrajan, Mrigank Sharma, Badrinarayanan Ravi
2009 J jnl
Towards modeling and integrated design automation of supercomputing clusters (MIDAS).
Comput. Sci. Res. Dev.
Nagarajan Venkateswaran, Aravind Vasudevan, Balaji Subramaniam, Ravindhiran Mukundrajan, T. P. Ramnath Sai Sagar, Madhavan Manivannan, Sriram Murali, Vinoth Krishnan Elangovan
2008 — conf
Design for Testability of Functional Cores in High Performance Node Architectures.
DELTA
Nagarajan Venkateswaran, Karthik Chandrasekar, Shrikanth Ganapathy
2007 — conf
DNA Based Evolutionary Approach for Microprocessor Design Automation.
ICANNGA (1)
Nagarajan Venkateswaran, Arjun Kumeresh, Harish Chandran
2007 J jnl
Future generation supercomputers I: a paradigm for node architecture.
SIGARCH Comput. Archit. News
Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Karthik Chandrasekar, Prem Kumar Ramesh, Viswanath Venkatesan, Arvindakshan Babu, Sudharshan
2007 J jnl
Future generation supercomputers II: a paradigm for cluster architecture.
SIGARCH Comput. Archit. News
Nagarajan Venkateswaran, Deepak Srinivasan, Madhavan Manivannan, T. P. Ramnath Sai Sagar, Shyamsundar Gopalakrishnan, Vinoth Krishnan Elangovan, Arvind M, Prem Kumar Ramesh, Karthik Ganesan, Viswanath Krishnamurthy, Sivaramakrishnan
2006 — conf
PASCOM: Power Model for Supercomputers.
ARCS
Arrvindh Shriraman, Nagarajan Venkateswaran, Niranjan Soundararajan
2005 A conf
Memory In Processor-Supercomputer On a Chip: Processor Design and Execution Semantics for Massive Single-Chip Performance.
IPDPS
Nagarajan Venkateswaran, Arrvindh Shriraman, Niranjan Soundararajan
2004 J jnl
Memory in processor: a novel design paradigm for supercomputing architectures.
SIGARCH Comput. Archit. News
Nagarajan Venkateswaran, Aditya Krishnan, S. Niranjan Kumar, Arrvindh Shriraman, Srinivas Sridharan