Nader Bagherzadeh

286 papers A* 6A 13B 5C 26Misc 8Journal 150Unranked 76

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	ARMAN: A Reconfigurable Monolithic 3D Accelerator Architecture for Convolutional Neural Networks. CoRR Ali Sedaghatgoo, Amir M. Hajisadeghi, Mahmoud Momtazpour, Nader Bagherzadeh
2024	J	`jnl`	Guest Editorial: Special Section on "Approximate Data Processing: Computing, Storage and Applications". IEEE Trans. Emerg. Top. Comput. Ke Chen, Shanshan Liu, Weiqiang Liu, Fabrizio Lombardi, Nader Bagherzadeh
2023	J	`jnl`	BNN An Ideal Architecture for Acceleration With Resistive in Memory Computation. IEEE Trans. Emerg. Top. Comput. Andrew Ding, Ye Qiao, Nader Bagherzadeh
2023	J	`jnl`	Efficient realization of quantum balanced ternary reversible multiplier building blocks: A great step towards sustainable computing. Sustain. Comput. Informatics Syst. Ehsan Faghih, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh
2023	J	`jnl`	Stock Trend Prediction: A Semantic Segmentation Approach. CoRR Shima Nabiee, Nader Bagherzadeh
2023	J	`jnl`	Support for Stock Trend Prediction Using Transformers and Sentiment Analysis. CoRR Harsimrat Kaeley, Ye Qiao, Nader Bagherzadeh
2022	—	`conf`	A Two-Stage Efficient 3-D CNN Framework for EEG Based Emotion Recognition. ICIT Ye Qiao, Mohammed Alnemari, Nader Bagherzadeh
2022	J	`jnl`	A Two-Stage Efficient 3-D CNN Framework for EEG Based Emotion Recognition. CoRR Ye Qiao, Mohammed Alnemari, Nader Bagherzadeh
2022	J	`jnl`	A storage-efficient ensemble classification using filter sharing on binarized convolutional neural networks. PeerJ Comput. Sci. Hyunjin Kim, Mohammed Alnemari, Nader Bagherzadeh
2022	J	`jnl`	Guest Editorial: Thematic Section on Applications of Emerging Computing Technologies in Smart Manufacturing and Industry 4.0. IEEE Trans. Emerg. Top. Comput. Daniele Jahier Pagliari, Frank Schirrmeister, Nader Bagherzadeh, Enrico Macii
2022	J	`jnl`	Near Volatile and Non-Volatile Memory Processing in 3D Systems. IEEE Trans. Emerg. Top. Comput. Maryam S. Hosseini, Masoumeh Ebrahimi, Pooria M. Yaghini, Nader Bagherzadeh
2022	J	`jnl`	PLAM: A Posit Logarithm-Approximate Multiplier. IEEE Trans. Emerg. Top. Comput. Raul Murillo, Alberto A. Del Barrio, Guillermo Botella, Min Soo Kim, Hyun Jin Kim, Nader Bagherzadeh
2022	J	`jnl`	Reversible quantum communication & systems. IET Quantum Commun. Diganta Sengupta, Ahmed A. Abd El-Latif, Debashis De, Keivan Navi, Nader Bagherzadeh
2022	J	`jnl`	The Effects of Approximate Multiplication on Convolutional Neural Networks. IEEE Trans. Emerg. Top. Comput. Min Soo Kim, Alberto A. Del Barrio, Hyun Jin Kim, Nader Bagherzadeh
2021	J	`jnl`	A High Performance, Multi-Bit Output Logic-in-Memory Adder. IEEE Trans. Emerg. Top. Comput. Javad Talafy, Farzaneh Zokaee, Hamid R. Zarandi, Nader Bagherzadeh
2021	C	`conf`	Application Characterization for Near Memory Processing. PDP Maryam S. Hosseini, Masoumeh Ebrahimi, Pooria M. Yaghini, Nader Bagherzadeh
2021	J	`jnl`	Data scheduling and placement in deep learning accelerator. Clust. Comput. Seyedeh Yasaman Hosseini Mirmahaleh, Midia Reshadi, Nader Bagherzadeh, Ahmad Khademzadeh
2021	J	`jnl`	Enhancing Reliability of Emerging Memory Technology for Machine Learning Accelerators. IEEE Trans. Emerg. Top. Comput. Masoomeh Jasemi, Shaahin Hessabi, Nader Bagherzadeh
2021	J	`jnl`	PLAM: a Posit Logarithm-Approximate Multiplier for Power Efficient Posit-based DNNs. CoRR Raul Murillo, Alberto A. Del Barrio, Guillermo Botella, Min Soo Kim, Hyunjin Kim, Nader Bagherzadeh
2021	J	`jnl`	Predicting hypotension in the ICU using noninvasive physiological signals. Comput. Biol. Medicine Mina Chookhachizadeh Moghadam, Ehsan Masoumi Khalil Abad, Samir Kendale, Nader Bagherzadeh
2020	J	`jnl`	A Fine-Grained Source-Throttling Method for Mesh Architectures. IEEE Access Hongzhi Zhao, Nader Bagherzadeh, Qiang Wang, Yongchang Wang
2020	J	`jnl`	A machine-learning approach to predicting hypotensive events in ICU settings. Comput. Biol. Medicine Mina Chookhachizadeh Moghadam, Ehsan Masoumi Khalil Abad, Nader Bagherzadeh, Davinder Ramsingh, Guann-Pyng Li, Zeev N. Kain
2020	J	`jnl`	A novel digital fuzzy system for image edge detection based on wrap-gate carbon nanotube transistors. Comput. Electr. Eng. Ali Bozorgmehr, Mohammad Khaleqi Qaleh Jooq, Mohammad Hossein Moaiyeri, Keivan Navi, Nader Bagherzadeh
2020	J	`jnl`	Adaptive HTF-MPR: An Adaptive Heterogeneous TensorFlow Mapper Utilizing Bayesian Optimization and Genetic Algorithms. ACM Trans. Intell. Syst. Technol. Ahmad Albaqsami, Maryam S. Hosseini, Masoomeh Jasemi, Nader Bagherzadeh
2020	J	`jnl`	Divisible load scheduling of image processing applications on the heterogeneous star and tree networks using a new genetic algorithm. Concurr. Comput. Pract. Exp. Sahar Nikbakht Aali, Nader Bagherzadeh
2020	J	`jnl`	Effects of Approximate Multiplication on Convolutional Neural Networks. CoRR Min Soo Kim, Alberto A. Del Barrio, Hyunjin Kim, Nader Bagherzadeh
2020	J	`jnl`	Flow mapping on mesh-based deep learning accelerator. J. Parallel Distributed Comput. Seyedeh Yasaman Hosseini Mirmahaleh, Midia Reshadi, Nader Bagherzadeh
2020	J	`jnl`	IRHT: An SDC detection and recovery architecture based on value locality of instruction binary codes. Microprocess. Microsystems Alireza Tajary, Hamid R. Zarandi, Nader Bagherzadeh
2020	C	`conf`	NoC Design Methodologies for Heterogeneous Architecture. PDP Lulwah Alhubail, Masoomeh Jasemi, Nader Bagherzadeh
2020	C	`conf`	Partition Pruning: Parallelization-Aware Pruning for Dense Neural Networks. PDP Sina Shahhosseini, Ahmad Albaqsami, Masoomeh Jasemi, Nader Bagherzadeh
2020	J	`jnl`	Reliable and Energy Efficient MLC STT-RAM Buffer for CNN Accelerators. Comput. Electr. Eng. Masoomeh Jasemi, Shaahin Hessabi, Nader Bagherzadeh
2020	J	`jnl`	Reliable and Energy Efficient MLC STT-RAM Buffer for CNN Accelerators. CoRR Masoomeh Jasemi, Shaahin Hessabi, Nader Bagherzadeh
2020	—	`conf`	Supervised Machine-Learning Algorithms in Real-time Prediction of Hypotensive Events. EMBC Mina Chookhachizadeh Moghadam, Ehsan Masoumi Khalil Abad, Nader Bagherzadeh, Davinder Ramsingh, Zeev N. Kain
2019	C	`conf`	A Cost-Efficient Iterative Truncated Logarithmic Multiplication for Convolutional Neural Networks. ARITH Hyun Jin Kim, Min Soo Kim, Alberto A. Del Barrio, Nader Bagherzadeh
2019	C	`conf`	A Radiation Hard Sense Circuit for Spin Transfer Torque Random Access Memory. ISCAS Saba Mohammadi, Masoomeh Jasemi, Seyed Mohammadjavad Seyed Talebi, Nader Bagherzadeh, Michael M. Green
2019	J	`jnl`	A new approach to the Population-Based Incremental Learning algorithm using virtual regions for task mapping on NoCs. J. Syst. Archit. Luis German Garcia Morales, Jose Edinson Aedo Cobo, Nader Bagherzadeh
2019	—	`conf`	Accelerating HPC Applications Using Computational Storage Devices. HPCC/SmartCity/DSS Mahdi Torabzadehkashi, Ali Heydarigorji, Siavash Rezaei, Hossein Bobarshad, Vladimir Castro Alves, Nader Bagherzadeh
2019	J	`jnl`	CLBM: Controlled load-balancing mechanism for congestion management in silicon interposer NoC architecture. J. Syst. Archit. Mona Soleymani, Midia Reshadi, Nader Bagherzadeh, Ahmad Khademzadeh
2019	C	`conf`	Catalina: In-Storage Processing Acceleration for Scalable Big Data Analytics. PDP Mahdi Torabzadehkashi, Siavash Rezaei, Ali Heydarigorji, Hossein Bobarshad, Vladimir Castro Alves, Nader Bagherzadeh
2019	J	`jnl`	Computational storage: an efficient and scalable platform for big data and HPC applications. J. Big Data Mahdi Torabzadehkashi, Siavash Rezaei, Ali Heydarigorji, Hossein Bobarshad, Vladimir Castro Alves, Nader Bagherzadeh
2019	J	`jnl`	DICA: destination intensity and congestion-aware output selection strategy for network-on-chip systems. IET Comput. Digit. Tech. Amin Mehranzadeh, Ahmad Khademzadeh, Nader Bagherzadeh, Midia Reshadi
2019	B	`conf`	Design of Power-Efficient FPGA Convolutional Cores with Approximate Log Multiplier. ESANN Leonardo Tavares Oliveira, Min Soo Kim, Alberto A. Del Barrio García, Nader Bagherzadeh, Ricardo Menotti
2019	—	`conf`	Efficient Deep Neural Networks for Edge Computing. EDGE Mohammed Alnemari, Nader Bagherzadeh
2019	J	`jnl`	Efficient Mitchell's Approximate Log Multipliers for Convolutional Neural Networks. IEEE Trans. Computers Min Soo Kim, Alberto A. Del Barrio, Leonardo Tavares Oliveira, Román Hermida, Nader Bagherzadeh
2019	—	`conf`	Flow mapping and data distribution on mesh-based deep learning accelerator. NOCS Seyedeh Yasaman Hosseini Mirmahaleh, Midia Reshadi, Hesam Shabani, Xiaochen Guo, Nader Bagherzadeh
2019	J	`jnl`	Novel CNFET ternary circuit techniques for high-performance and energy-efficient design. IET Circuits Devices Syst. Sepehr Tabrizchi, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh
2019	J	`jnl`	Partition Pruning: Parallelization-Aware Pruning for Deep Neural Networks. CoRR Sina Shahhosseini, Ahmad Albaqsami, Masoomeh Jasemi, Shaahin Hessabi, Nader Bagherzadeh
2019	A	`conf`	Power and Performance Optimal NoC Design for CPU-GPU Architecture Using Formal Models. DATE Lulwah Alhubail, Nader Bagherzadeh
2019	J	`jnl`	Toward efficient implementation of basic balanced ternary arithmetic operations in CNFET technology. Microelectron. J. Maryam Toulabinejad, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh
2018	J	`jnl`	A Compositional Approach for Verifying Protocols Running on On-Chip Networks. IEEE Trans. Computers Freek Verbeek, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh
2018	J	`jnl`	AROMa: Aging-Aware Deadlock-Free Adaptive Routing Algorithm and Online Monitoring in 3D NoCs. IEEE Trans. Parallel Distributed Syst. Zana Ghaderi, Ayed Alqahtani, Nader Bagherzadeh
2018	J	`jnl`	An energy and area efficient 4: 2 compressor based on FinFETs. Integr. Armineh Arasteh, Mohammad Hossein Moaiyeri, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh
2018	J	`jnl`	Application partitioning and mapping for bypass channel based NoC. Comput. Electr. Eng. Fatemeh Khodaparast, Midia Reshadi, Nader Bagherzadeh
2018	—	`conf`	CompStor: An In-storage Computation Platform for Scalable Distributed Processing. IPDPS Workshops Mahdi Torabzadehkashi, Siavash Rezaei, Vladimir Castro Alves, Nader Bagherzadeh
2018	J	`jnl`	Design and Evaluation of a Spintronic In-Memory Processing Platform for Nonvolatile Data Encryption. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Shaahin Angizi, Zhezhi He, Nader Bagherzadeh, Deliang Fan
2018	J	`jnl`	Design and Power Analysis of New Coplanar One-Bit Full-Adder Cell in Quantum-Dot Cellular Automata. J. Low Power Electron. Fahimeh Danehdaran, Milad Bagherian Khosroshahy, Keivan Navi, Nader Bagherzadeh
2018	C	`conf`	Divisible Load Scheduling of Image Processing Applications on the Heterogeneous Star Network Using a new Genetic Algorithm. PDP Sahar Nikbakht Aali, Hadi Shahriar Shahhoseini, Nader Bagherzadeh
2018	J	`jnl`	Energy and performance-aware application mapping for inhomogeneous 3D networks-on-chip. J. Syst. Archit. Michael Opoku Agyeman, Ali Ahmadinia, Nader Bagherzadeh
2018	J	`jnl`	First-Last: A Cost-Effective Adaptive Routing Solution for TSV-Based Three-Dimensional Networks-on-Chip. IEEE Trans. Computers Amir Charif, Alexandre Coelho, Masoumeh Ebrahimi, Nader Bagherzadeh, Nacer-Eddine Zergainoh
2018	A	`conf`	HTF-MPR: A heterogeneous TensorFlow mapper targeting performance using genetic algorithms and gradient boosting regressors. DATE Ahmad Albaqsami, Maryam S. Hosseini, Nader Bagherzadeh
2018	J	`jnl`	Hospital enterprise Architecture Framework (Study of Iranian University Hospital Organization). Int. J. Medical Informatics Atefehsadat Haghighathoseini, Hossein Bobarshad, Fatehmeh Saghafi, Mohammad Sadegh Rezaei, Nader Bagherzadeh
2018	J	`jnl`	LEAD: An Adaptive 3D-NoC Routing Algorithm with Queuing-Theory Based Analytical Verification. IEEE Trans. Computers Ronak Salamat, Misagh Khayambashi, Masoumeh Ebrahimi, Nader Bagherzadeh
2018	—	`conf`	Low-power implementation of Mitchell's approximate logarithmic multiplication for convolutional neural networks. ASP-DAC Min Soo Kim, Alberto A. Del Barrio, Román Hermida, Nader Bagherzadeh
2018	J	`jnl`	Reducing bypass-based network-on-chip latency using priority mechanism. IET Comput. Digit. Tech. Amir Fadakar Noghondar, Midia Reshadi, Nader Bagherzadeh
2018	J	`jnl`	STABLE: Stress-Aware Boolean Matching to Mitigate BTI-Induced SNM Reduction in SRAM-Based FPGAs. IEEE Trans. Computers Zana Ghaderi, Nader Bagherzadeh, Ahmad Albaqsami
2018	C	`conf`	Simulation-Based Evaluation Strategy for Task Mapping Approaches in WNoC Platforms. PDP Luis German Garcia Morales, Jose Edinson Aedo Cobo, Nader Bagherzadeh
2018	J	`jnl`	System-Level Analysis of 3D ICs with Thermal TSVs. ACM J. Emerg. Technol. Comput. Syst. Ayed Alqahtani, Zongqing Ren, Jaeho Lee, Nader Bagherzadeh
2018	J	`jnl`	Ultra-Efficient Fuzzy Min/Max Circuits Based on Carbon Nanotube FETs. IEEE Trans. Fuzzy Syst. Ali Bozorgmehr, Mohammad Hossein Moaiyeri, Keivan Navi, Nader Bagherzadeh
2017	J	`jnl`	A General Fault-Tolerant Minimal Routing for Mesh Architectures. IEEE Trans. Computers Hongzhi Zhao, Nader Bagherzadeh, Jie Wu
2017	J	`jnl`	A Single Parity-Check Digit for One Trit Error Detection in Ternary Communication Systems: Gate-Level and Transistor-Level Designs. J. Multiple Valued Log. Soft Comput. Reza Faghih Mirzaee, Mahya Sam Daliri, Keivan Navi, Nader Bagherzadeh
2017	J	`jnl`	A new approach for designing compressors with a new hardware-friendly mathematical method for multi-input XOR gates. IET Circuits Devices Syst. Mahya Sam Daliri, Keivan Navi, Reza Faghih Mirzaee, Nader Bagherzadeh
2017	J	`jnl`	Deadlock Verification of Cache Coherence Protocols and Communication Fabrics. IEEE Trans. Computers Freek Verbeek, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh
2017	J	`jnl`	High-performance ternary operators for scrambling. Integr. Mahya Sam Daliri, Reza Faghih Mirzaee, Keivan Navi, Nader Bagherzadeh
2017	J	`jnl`	Method for designing ternary adder cells based on CNFETs. IET Circuits Devices Syst. Sepehr Tabrizchi, Atiyeh Panahi, Fazel Sharifi, Keivan Navi, Nader Bagherzadeh
2017	A	`conf`	Online monitoring and adaptive routing for aging mitigation in NoCs. DATE Zana Ghaderi, Ayed Alqahtani, Nader Bagherzadeh
2017	J	`jnl`	Quantum-dot cellular automata circuits with reduced external fixed inputs. Microprocess. Microsystems Milad Bagherian Khosroshahy, Mohammad Hossein Moaiyeri, Shaahin Angizi, Nader Bagherzadeh, Keivan Navi
2017	J	`jnl`	SENSIBle: A Highly Scalable SENsor DeSIgn for Path-Based Age Monitoring in FPGAs. IEEE Trans. Computers Zana Ghaderi, Mohammad Ebrahimi, Zainalabedin Navabi, Eli Bozorgzadeh, Nader Bagherzadeh
2017	J	`jnl`	Towards Approximate Computing with Quantum-Dot Cellular Automata. J. Low Power Electron. Zahra Rouhani, Shaahin Angizi, MohammadReza Taheri, Keivan Navi, Nader Bagherzadeh
2016	J	`jnl`	A Resilient Routing Algorithm with Formal Reliability Analysis for Partially Connected 3D-NoCs. IEEE Trans. Computers Ronak Salamat, Misagh Khayambashi, Masoumeh Ebrahimi, Nader Bagherzadeh
2016	A	`conf`	ADVOCAT: Automated deadlock verification for on-chip cache coherence and interconnects. DATE Freek Verbeek, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh
2016	J	`jnl`	An Efficient Analog-to-Digital Converter Based on Carbon Nanotube FETs. J. Low Power Electron. Mohammad Hossein Moaiyeri, Nooshin Khastoo, Molood Nasiri, Keivan Navi, Nader Bagherzadeh
2016	J	`jnl`	Capacitive and Inductive TSV-to-TSV Resilient Approaches for 3D ICs. IEEE Trans. Computers Pooria M. Yaghini, Ashkan Eghbal, Siavash S. Yazdi, Nader Bagherzadeh, Michael M. Green
2016	—	`conf`	CoBRA: Low cost compensation of TSV failures in 3D-NoC. DFT Ronak Salamat, Masoumeh Ebrahimi, Nader Bagherzadeh, Freek Verbeek
2016	J	`jnl`	Design of quaternary 4-2 and 5-2 compressors for nanotechnology. Comput. Electr. Eng. Fazel Sharifi, Atiyeh Panahi, Hojjat Sharifi, Keivan Navi, Nader Bagherzadeh, Himanshu Thapliyal
2016	J	`jnl`	Introduction to the Special Section on On-chip parallel and network-based systems. Comput. Electr. Eng. Hamid Sarbazi-Azad, Nader Bagherzadeh, Masoumeh Ebrahimi, Masoud Daneshtalab
2016	J	`jnl`	Loss-Aware Switch Design and Non-Blocking Detection Algorithm for Intra-Chip Scale Photonic Interconnection Networks. IEEE Trans. Computers Hesam Shabani, Arman Roohi, Akram Reza, Midia Reshadi, Nader Bagherzadeh, Ronald F. DeMara
2016	J	`jnl`	Performance and Energy Aware Inhomogeneous 3D Networks-on-Chip Architecture Generation. IEEE Trans. Parallel Distributed Syst. Michael Opoku Agyeman, Ali Ahmadinia, Nader Bagherzadeh
2016	J	`jnl`	Ternary cyclic redundancy check by a new hardware-friendly ternary operator. Microelectron. J. Mahya Sam Daliri, Reza Faghih Mirzaee, Keivan Navi, Nader Bagherzadeh
2015	—	`conf`	Accurate System-level TSV-to-TSV Capacitive Coupling Fault Model for 3D-NoC. NOCS Pooria M. Yaghini, Ashkan Eghbal, Siavash S. Yazdi, Nader Bagherzadeh
2015	J	`jnl`	Advances in multicore systems architectures. J. Supercomput. Hamid Sarbazi-Azad, Nader Bagherzadeh, G. Jaberipour
2015	C	`conf`	An Adaptive, Low Restrictive and Fault Resilient Routing Algorithm for 3D Network-on-Chip. PDP Ronak Salamat, Masoumeh Ebrahimi, Nader Bagherzadeh
2015	J	`jnl`	An Ultra-High Speed and Low Complexity Quantum-Dot Cellular Automata Full Adder. J. Low Power Electron. Shaahin Angizi, Fahimeh Danehdaran, Soheil Sarmadi, Shadi Sheikhfaal, Nader Bagherzadeh, Keivan Navi
2015	J	`jnl`	Analytical Fault Tolerance Assessment and Metrics for TSV-Based 3D Network-on-Chip. IEEE Trans. Computers Ashkan Eghbal, Pooria M. Yaghini, Nader Bagherzadeh, Misagh Khayambashi
2015	J	`jnl`	Analytical Reliability Analysis of 3D NoC under TSV Failure. ACM J. Emerg. Technol. Comput. Syst. Misagh Khayambashi, Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh
2015	Misc	`conf`	Capacitive Coupling Mitigation for TSV-based 3D ICs. VTS Ashkan Eghbal, Pooria M. Yaghini, Nader Bagherzadeh
2015	J	`jnl`	Coupling Mitigation in 3-D Multiple-Stacked Devices. IEEE Trans. Very Large Scale Integr. Syst. Pooria M. Yaghini, Ashkan Eghbal, Misagh Khayambashi, Nader Bagherzadeh
2015	J	`jnl`	Design and Verification of New n-Bit Quantum-Dot Synchronous Counters Using Majority Function-Based JK Flip-Flops. J. Circuits Syst. Comput. Shaahin Angizi, Samira Sayedsalehi, Arman Roohi, Nader Bagherzadeh, Keivan Navi
2015	J	`jnl`	Design and analysis of a mesh-based wireless network-on-chip. J. Supercomput. Wen-Hsiang Hu, Chifeng Wang, Nader Bagherzadeh
2015	J	`jnl`	Designing quantum-dot cellular automata counters with energy consumption analysis. Microprocess. Microsystems Shaahin Angizi, Mohammad Hossein Moaiyeri, Shohreh Farrokhi, Keivan Navi, Nader Bagherzadeh
2015	J	`jnl`	On the design of hybrid routing mechanism for mesh-based network-on-chip. Integr. Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh
2015	J	`jnl`	On-chip parallel and network-based systems. Integr. Masoud Daneshtalab, Nader Bagherzadeh, Hamid Sarbazi-Azad
2015	J	`jnl`	Robust and energy-efficient carbon nanotube FET-based MVL gates: A novel design approach. Microelectron. J. Fazel Sharifi, Mohammad Hossein Moaiyeri, Keivan Navi, Nader Bagherzadeh
2015	J	`jnl`	Special issue on on-chip parallel and network-based systems. Computing Masoud Daneshtalab, Nader Bagherzadeh, Hamid Sarbazi-Azad
2015	J	`jnl`	Using constraint programming for the design of network-on-chip architectures. Computing Ayhan Demiriz, Nader Bagherzadeh, Abdulaziz AlHussein
2015	J	`jnl`	Voltage mirror circuit by carbon nanotube field effect transistors for mirroring dynamic random access memories in multiple-valued logic and fuzzy logic. IET Circuits Devices Syst. Masoomeh Jasemi, Reza Faghih Mirzaee, Keivan Navi, Nader Bagherzadeh
2014	—	`conf`	A GALS Router for Asynchronous Network-on-Chip. MES Pooria M. Yaghini, Ashkan Eghbal, Nader Bagherzadeh
2014	J	`jnl`	Design and evaluation of a high throughput QoS-aware and congestion-aware router architecture for Network-on-Chip. Microprocess. Microsystems Chifeng Wang, Nader Bagherzadeh
2014	J	`jnl`	High-Efficient Circuits for Ternary Addition. VLSI Design Reza Faghih Mirzaee, Keivan Navi, Nader Bagherzadeh
2014	J	`jnl`	Novel Robust Single Layer Wire Crossing Approach for Exclusive OR Sum of Products Logic Design with Quantum-Dot Cellular Automata. J. Low Power Electron. Shaahin Angizi, Esam Alkaldy, Nader Bagherzadeh, Keivan Navi
2014	—	`conf`	TSV-to-TSV inductive coupling-aware coding scheme for 3D Network-on-Chip. DFT Ashkan Eghbal, Pooria M. Yaghini, Siavash S. Yazdi, Nader Bagherzadeh
2014	J	`jnl`	Ultra-low-power adder stage design for exascale floating point units. ACM Trans. Embed. Comput. Syst. Alberto A. Del Barrio, Nader Bagherzadeh, Román Hermida
2014	J	`jnl`	Voltage island based heterogeneous NoC design through constraint programming. Comput. Electr. Eng. Ayhan Demiriz, Nader Bagherzadeh, Özcan Özturk
2013	C	`conf`	CPNoC: On Using Constraint Programming in Design of Network-on-Chip Architecture. PDP Ayhan Demiriz, Nader Bagherzadeh, Abdulaziz Alhussien
2013	J	`jnl`	Contention-aware selection strategy for application-specific network-on-chip. IET Comput. Digit. Tech. Sanaz Azampanah, Ahmad Khademzadeh, Nader Bagherzadeh, Majid Janidarmian, Reza Shojaee
2013	J	`jnl`	Efficient multicast schemes for 3-D Networks-on-Chip. J. Syst. Archit. Xiaohang Wang, Mei Yang, Yingtao Jiang, Maurizio Palesi, Peng Liu, Terrence S. T. Mak, Nader Bagherzadeh
2013	J	`jnl`	From UML specifications to mapping and scheduling of tasks into a NoC, with reliability considerations. J. Syst. Archit. Freddy Bolanos, Fredy Rivera, Jose Edison Aedo, Nader Bagherzadeh
2013	J	`jnl`	Multicore computing systems: Architecture, programming tools, and applications. J. Comput. Syst. Sci. Hamid Sarbazi-Azad, Nader Bagherzadeh
2013	—	`conf`	On heterogeneous network-on-chip design based on constraint programming. NoCArc@MICRO Ayhan Demiriz, Nader Bagherzadeh
2013	C	`conf`	Quality of Service Optimization for Network-on-Chip Using Bandwidth-Constraint Mapping Algorithm. PDP Azadeh Eskandari, Ahmad Khademzadeh, Nader Bagherzadeh, Majid Janidarmian
2013	J	`jnl`	Scalable load balancing congestion-aware Network-on-Chip router architecture. J. Comput. Syst. Sci. Chifeng Wang, Wen-Hsiang Hu, Nader Bagherzadeh
2012	—	`conf`	A formally verified deadlock-free routing function in a fault-tolerant NoC architecture. SBCCI Abdulaziz Alhussien, Nader Bagherzadeh, Freek Verbeek, Bernard van Gastel, Julien Schmaltz
2012	J	`jnl`	A load-balanced congestion-aware wireless network-on-chip design for multi-core platforms. Microprocess. Microsystems Chifeng Wang, Wen-Hsiang Hu, Nader Bagherzadeh
2012	J	`jnl`	A software pipelining algorithm of streaming applications with low buffer requirements. Sci. Iran. Akira Hatanaka, Nader Bagherzadeh
2012	C	`conf`	Design and Analysis of a Mesh-based Wireless Network-on-Chip. PDP Wen-Hsiang Hu, Chifeng Wang, Nader Bagherzadeh
2012	C	`conf`	Design and Evaluation of a High Throughput QoS-Aware and Congestion-Aware Router Architecture for Network-on-Chip. PDP Chifeng Wang, Nader Bagherzadeh
2012	J	`jnl`	Design and evaluation of a high throughput robust router for network-on-chip. IET Comput. Digit. Tech. Abdulaziz Alhussien, Chifeng Wang, Nader Bagherzadeh
2012	J	`jnl`	Editorial notes: Special issue on on-chip parallel and network-based systems. Microprocess. Microsystems Hamid Sarbazi-Azad, Nader Bagherzadeh
2012	J	`jnl`	High-throughput differentiated service provision router architecture for wireless network-on-chip. Int. J. High Perform. Syst. Archit. Chifeng Wang, Nader Bagherzadeh
2012	C	`conf`	LATEX: New Selection Policy for Adaptive Routing in Application-Specific NoC. PDP Sanaz Azampanah, Ahmad Khademzadeh, Nader Bagherzadeh, Majid Janidarmian, Reza Shojaee
2012	J	`jnl`	Mapping and Scheduling in Heterogeneous NoC through Population-Based Incremental Learning. J. Univers. Comput. Sci. Freddy Bolanos, Jose Edison Aedo, Fredy Rivera, Nader Bagherzadeh
2012	J	`jnl`	Parallel low-density parity check decoding on a network-on-chip-based multiprocessor platform. IET Comput. Digit. Tech. W.-H. Hu, C.-Y. Chen, Jun Ho Bahn, Nader Bagherzadeh
2011	C	`conf`	A Wireless Network-on-Chip Design for Multicore Platforms. PDP Chifeng Wang, Wen-Hsiang Hu, Nader Bagherzadeh
2011	J	`jnl`	A scheduling approach for distributed resource architectures with scarce communication resources. Int. J. High Perform. Syst. Archit. Akira Hatanaka, Nader Bagherzadeh
2011	J	`jnl`	Area and power-efficient innovative congestion-aware Network-on-Chip architecture. J. Syst. Archit. Chifeng Wang, Wen-Hsiang Hu, Seung Eun Lee, Nader Bagherzadeh
2011	C	`conf`	Load Balancing for Data-Parallel Applications on Network-on-Chip Enabled Multi-processor Platform. PDP Jungsook Yang, Chuny Chun, Nader Bagherzadeh, Seung Eun Lee
2011	J	`jnl`	Special issue on: On-chip parallel and network-based systems. J. Syst. Archit. Nader Bagherzadeh, Hamid Sarbazi-Azad
2010	—	`conf`	A scalable delay insensitive asynchronous NoC with adaptive routing. ICT Abdulaziz Alhussien, Chifeng Wang, Nader Bagherzadeh
2010	C	`conf`	Area and Power-efficient Innovative Network-on-Chip Architecurte. PDP Chifeng Wang, Wen-Hsiang Hu, Seung Eun Lee, Nader Bagherzadeh
2010	—	`conf`	Message Driven Programming with S-Net: Methodology and Performance. ICPP Workshops Frank Penczek, Stephan Herhut, Sven-Bodo Scholz, Alexander V. Shafarenko, Jungsook Yang, Chun-Yi Chen, Nader Bagherzadeh, Clemens Grelck
2010	J	`jnl`	Parallel processing for block ciphers on a fault tolerant networked processor array. Int. J. High Perform. Syst. Archit. Yoon Seok Yang, Jun Ho Bahn, Seung Eun Lee, Jungsook Yang, Nader Bagherzadeh
2009	J	`jnl`	A framework for low energy data management in reconfigurable multi-context architectures. J. Syst. Archit. Marcos Sánchez-Élez, Nader Bagherzadeh, Román Hermida
2009	J	`jnl`	A high level power model for Network-on-Chip (NoC) router. Comput. Electr. Eng. Seung Eun Lee, Nader Bagherzadeh
2009	J	`jnl`	A variable frequency link for a power-aware network-on-chip (NoC). Integr. Seung Eun Lee, Nader Bagherzadeh
2009	—	`conf`	Low power adaptive pipeline based on instruction isolation. ISQED Seung Eun Lee, Chris Wilkerson, Ming Zhang, Rajendra S. Yavatkar, Shih-Lien Lu, Nader Bagherzadeh
2009	—	`conf`	Mobile Agents for Wireless Sensor Networks. ICWN Faruk Bagci, Julian Wolf, Theo Ungerer, Nader Bagherzadeh
2009	J	`jnl`	Optimisations for LocSens - an indoor location tracking system using wireless sensors. Int. J. Sens. Networks Faruk Bagci, Florian Kluge, Theo Ungerer, Nader Bagherzadeh
2009	J	`jnl`	Parallel FFT Algorithms on Network-on-Chips. J. Circuits Syst. Comput. Jun Ho Bahn, Jungsook Yang, Wen-Hsiang Hu, Nader Bagherzadeh
2009	C	`conf`	Parallel LDPC Decoding on a Network-on-Chip Based Multiprocessor Platform. SBAC-PAD Wen-Hsiang Hu, Jun Ho Bahn, Nader Bagherzadeh
2009	—	`conf`	Parallel and Pipeline Processing for Block Cipher Algorithms on a Network-on-Chip. ITNG Yoon Seok Yang, Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
2009	J	`jnl`	Performance Impact of Task-to-Task Communication Protocol in Network-on-Chip. J. Circuits Syst. Comput. Nader Bagherzadeh, Masaru Matsuura
2009	J	`jnl`	Resource management and task partitioning and scheduling on a run-time reconfigurable embedded system. Comput. Electr. Eng. Radha Guha, Nader Bagherzadeh, Pai H. Chou
2009	—	`conf`	Scheduling Techniques for Multi-Core Architectures. ITNG Akira Hatanaka, Nader Bagherzadeh
2008	—	`conf`	A Generic Network Interface Architecture for a Networked Processor Array (NePA). ARCS Seung Eun Lee, Jun Ho Bahn, Yoon Seok Yang, Nader Bagherzadeh
2008	J	`jnl`	An ASIC design and formal analysis of a novel pipelined and parallel sorting accelerator. Integr. Nozar Tabrizi, Nader Bagherzadeh
2008	J	`jnl`	Design of simulation and analytical models for a 2D-meshed asymmetric adaptive router. IET Comput. Digit. Tech. Jun Ho Bahn, Nader Bagherzadeh
2008	—	`conf`	ESTR - Energy Saving Token Ring Protocol for Wireless Sensor Networks. ICWN Faruk Bagci, Theo Ungerer, Nader Bagherzadeh
2008	Misc	`conf`	Efficient Parallel Buffer Structure and Its Management Scheme for a Robust Network-on-Chip (NoC) Architecture. CSICC Jun Ho Bahn, Nader Bagherzadeh
2008	B	`conf`	LocSens - An Indoor Location Tracking System using Wireless Sensors. ICCCN Faruk Bagci, Florian Kluge, Nader Bagherzadeh, Theo Ungerer
2008	J	`jnl`	On Design and Application Mapping of a Network-on-Chip(NoC) Architecture. Parallel Process. Lett. Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungsook Yang, Nader Bagherzadeh
2008	—	`conf`	Parallel FFT Algorithms on Network-on-Chips. ITNG Jun Ho Bahn, Jungsook Yang, Nader Bagherzadeh
2008	—	`conf`	Performance Impact of Task-to-Task Communication Protocol in Network-on-Chip. ITNG Nader Bagherzadeh, Masaru Matsuura
2008	B	`conf`	RECFEC: A Reconfigurable FEC Processor for Viterbi, Turbo, Reed-Solomon and LDPC Coding. WCNC Afshin Niktash, Hooman Parizi, Amir Hosein Kamalizad, Nader Bagherzadeh
2008	J	`jnl`	Scheduling methodology for conditional execution of kernels onto multicontext reconfigurable architectures. IET Comput. Digit. Tech. Fredy Rivera, Marcos Sánchez-Élez, Román Hermida, Nader Bagherzadeh
2008	—	`conf`	Self-optimized Routing in a Network on-a-Chip. BICC Wolfgang Trumler, Sebastian Schlingmann, Theo Ungerer, Jun Ho Bahn, Nader Bagherzadeh
2008	—	`conf`	Specific Absorption Rate Calculation using Parallel 3D Finite Difference Time Domain Technique. Communications in Computing Hala Elsadek, Hesham Eldeeb, Haytham Abdallah, Maha Eldesouky, Nader Bagherzadeh
2007	A	`conf`	A Modulo Scheduling Algorithm for a Coarse-Grain Reconfigurable Array Template. IPDPS Akira Hatanaka, Nader Bagherzadeh
2007	—	`conf`	A Reconfigurable Processor for Forward Error Correction. ARCS Afshin Niktash, Hooman Parizi, Nader Bagherzadeh
2007	C	`conf`	Application of a Heterogeneous Reconfigurable Architecture to OFDM Wireless Systems. ISCAS Afshin Niktash, Hooman Parizi, Nader Bagherzadeh
2007	—	`conf`	Configuration and Data Scheduling for Executing Dynamic Applications onto Multi-Context Reconfigurable Architectures. ERSA Fredy Rivera, Marcos Sánchez-Élez, Nader Bagherzadeh
2007	C	`conf`	Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP). SBAC-PAD Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh
2007	J	`jnl`	Design of a router for network-on-chip. Int. J. High Perform. Syst. Archit. Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
2007	—	`conf`	Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost. ASP-DAC Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
2007	—	`conf`	On Design and Analysis of a Feasible Network-on-Chip (NoC) Architecture. ITNG Jun Ho Bahn, Seung Eun Lee, Nader Bagherzadeh
2007	J	`jnl`	Ultra-fast and efficient algorithm for energy optimization by gradient-based stochastic voltage and task scheduling. ACM Trans. Design Autom. Electr. Syst. Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
2006	—	`conf`	A Multi-Standard Viterbi Decoder for Mobile Applications Using a Reconfigurable Architecture. VTC Fall Afshin Niktash, Hooman Parizi, Nader Bagherzadeh
2006	—	`conf`	A Reconfigurable Architecture for Wireless Communication Systems. ITNG Hooman Parizi, Afshin Niktash, Amir Hosein Kamalizad, Nader Bagherzadeh
2006	B	`conf`	Configuration Scheduling for Conditional Branch Execution Onto Multi-Context Reconfigurable Architectures. FPL Fredy Rivera, Marcos Sánchez-Élez, Milagros Fernández, Román Hermida, Nader Bagherzadeh
2006	—	`conf`	Design and implementation of a rendering algorithm in a SIMD reconfigurable architecture (MorphoSys). DATE Designers' Forum Javier Davila, Alfonso de Torres, Jose Manuel Sanchez, Marcos Sánchez-Élez, Nader Bagherzadeh, Fredy Rivera
2006	Misc	`conf`	Increasing the throughput of an adaptive router in network-on-chip (NoC). CODES+ISSS Seung Eun Lee, Nader Bagherzadeh
2005	—	`conf`	A Programmable DSP Architecture for Wireless Communication Systems. ASAP Amir Hosein Kamalizad, Nozar Tabrizi, Nader Bagherzadeh, Akira Hatanaka
2005	C	`conf`	An Approach to Execute Conditional Branches onto SIMD Multi-Context Reconfigurable Architectures. DSD Fredy Rivera, Milagros Fernández, Nader Bagherzadeh
2005	A	`conf`	Low Power Data Prefetch for 3D Image Applications on Coarse-Grain Reconfigurable Architectures. IPDPS Fredy Rivera, Marcos Sánchez-Élez, Milagros Fernández, Román Hermida, Nader Bagherzadeh
2005	—	`ed.`	Proceedings of the Second Conference on Computing Frontiers, 2005, Ischia, Italy, May 4-6, 2005 Conf. Computing Frontiers Nader Bagherzadeh, Mateo Valero, Alex Ramírez
2004	A	`conf`	An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes. ISLPED Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou
2004	Misc	`conf`	Efficient mapping of hierarchical trees on coarse-grain reconfigurable architectures. CODES+ISSS Fredy Rivera, Marcos Sánchez-Élez, Milagros Fernández, Román Hermida, Nader Bagherzadeh
2004	—	`conf`	Fast and efficient voltage scheduling by evolutionary slack distribution. ASP-DAC Bita Gorjiara, Pai H. Chou, Nader Bagherzadeh, Mehrdad Reshadi, David W. Jensen
2004	—	`conf`	Fast parallel soft Viterbi decoder mapping on a reconfigurable DSP platform. SoCC Amir Hosein Kamalizad, Richard Plettner, Chengzhi Pan, Nader Bagherzadeh
2004	—	`conf`	MaRS: a macro-pipelined reconfigurable system. Conf. Computing Frontiers Nozar Tabrizi, Nader Bagherzadeh, Amir Hosein Kamalizad, Haitao Du
2003	—	`conf`	A Component Oriented Simulator for HW/SW Co-Designs. ESTIMedia Alexander Paar, Haitao Du, Nader Bagherzadeh
2003	Misc	`conf`	A fast parallel reed-solomon decoder on a reconfigurable architecture. CODES+ISSS Arezou Koohi, Nader Bagherzadeh, Chengzi Pan
2003	—	`conf`	Adaptive computing: what can it do, where can it go? ASP-DAC Robert Reuss, Jose L. Muñoz, Toshiaki Miyazaki, Nader Bagherzadeh, Prith Banerjee, Brad L. Hutchings, Brian Schott
2003	J	`jnl`	Algorithm optimizations and mapping scheme for interactive ray tracing on a reconfigurable architecture. Comput. Graph. Marcos Sánchez-Élez, Haitao Du, Nozar Tabrizi, Yun Long, Nader Bagherzadeh, Milagros Fernández
2003	J	`jnl`	Automatic compilation to a coarse-grained reconfigurable system-opn-chip. ACM Trans. Embed. Comput. Syst. Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm, Jeffrey Hammes
2003	—	`conf`	Camera calibration of long image sequences with the presence of occlusions. ICIP (1) Miguel Sainz, Antonio Susín, Nader Bagherzadeh
2003	A	`conf`	Design and Analysis of a Programmable Single-Chip Architecture for DVB-T Base-Band Receiver. DATE Chengzhi Pan, Nader Bagherzadeh, Amir Hosein Kamalizad, Arezou Koohi
2003	C	`conf`	Fast Parallel FFT on a Reconfigurable Computation Platform. SBAC-PAD Amir Hosein Kamalizad, Chengzhi Pan, Nader Bagherzadeh
2003	A	`conf`	Interactive Ray Tracing on Reconfigurable SIMD MorphoSys. DATE Haitao Du, Marcos Sánchez-Élez, Nozar Tabrizi, Nader Bagherzadeh, Manuel L. Anido, Milagros Fernández
2003	—	`ch.`	Interactive Ray Tracing on Reconfigurable SIMD Morphosys. Embedded Software for SoC Haitao Du, Marcos Sánchez-Élez, Nozar Tabrizi, Nader Bagherzadeh, Manuel L. Anido, Milagros Fernández
2003	—	`conf`	Interactive ray tracing on reconfigurable SIMD MorphoSys. ASP-DAC Haitao Du, Marcos Sánchez-Élez, Nozar Tabrizi, Nader Bagherzadeh, Manuel Lois Anido, Milagros Fernández
2003	A	`conf`	Low Energy Data Management for Different On-Chip Memory Levels in Multi-Context Reconfigurable Architectures. DATE Marcos Sánchez-Élez, Milagros Fernández, Manuel L. Anido, Haitao Du, Nader Bagherzadeh, Román Hermida
2003	—	`conf`	Persepolis: Recovering history with a handheld camera. Eurographics (Posters) Miguel Sainz, Antonio Susín, A. Cervantes, Nader Bagherzadeh
2003	—	`conf`	Topology selection for energy minimization in embedded networks. ASP-DAC Dexin Li, Pai H. Chou, Nader Bagherzadeh
2002	A	`conf`	A Complete Data Scheduler for Multi-Context Reconfigurable Architectures. DATE Marcos Sánchez-Élez, Milagros Fernández, Rafael Maestre, Román Hermida, Nader Bagherzadeh, Fadi J. Kurdahi
2002	—	`conf`	A Novel Method for Improving the Operation Autonomy of SIMD Processing Elements. SBCCI Manuel Lois Anido, Alexander Paar, Nader Bagherzadeh
2002	—	`conf`	A Novel Predication Scheme for a SIMD System-on-Chip. Euro-Par Alexander Paar, Manuel L. Anido, Nader Bagherzadeh
2002	—	`conf`	Combined Functional Partitioning and Communication Speed Selection for Networked Voltage-Scalable Processors. ISSS Nader Bagherzadeh, Pai H. Chou, Jinfeng Liu
2002	—	`conf`	Communication speed selection for embedded systems with networked voltage-scalable processors. CODES Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh
2002	J	`jnl`	IMPACCT: Methodology and Tools for Power-Aware Embedded Systems. Des. Autom. Embed. Syst. Pai H. Chou, Jinfeng Liu, Dexin Li, Nader Bagherzadeh
2002	C	`conf`	Improving the Operation Autonomy of SIMD Processing Elements by Using Guarded Instructions and Pseudo Branches. DSD Manuel Lois Anido, Alexander Paar, Nader Bagherzadeh
2002	C	`conf`	Interactive Ray Tracing Using a SIMD Reconfigurable Architecture. SBAC-PAD Manuel L. Anido, Nader Bagherzadeh, Nozar Tabrizi, Haitao Du, Marcos Sánchez-Élez
2002	—	`conf`	Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems. ASP-DAC/VLSI Design Dexin Li, Pai H. Chou, Nader Bagherzadeh
2002	—	`conf`	MorphoSys: A Coarse Grain Reconfigurable Architecture for Multimedia Applications (Research Note). Euro-Par Hooman Parizi, Afshin Niktash, Nader Bagherzadeh, Fadi J. Kurdahi
2002	—	`conf`	Power-Aware Task Motion for Enhancing Dynamic Range of Embedded Systems with Renewable Energy Sources. PACS Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh
2002	—	`conf`	Recovering 3D Metric Structure and Motion from Multiple Uncalibrated Cameras. ITCC Miguel Sainz, Nader Bagherzadeh, Antonio Susín
2001	Misc	`conf`	A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture. CASES Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm
2001	—	`conf`	A constraint-based application model and scheduling techniques for power-aware systems. CODES Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh, Fadi J. Kurdahi
2001	—	`conf`	A data scheduler for multi-context reconfigurable architectures. ISSS Marcos Sánchez-Élez, Milagros Fernández, Román Hermida, Rafael Maestre, Fadi J. Kurdahi, Nader Bagherzadeh
2001	J	`jnl`	A formal approach to context scheduling for multicontext reconfigurable architectures. IEEE Trans. Very Large Scale Integr. Syst. Rafael Maestre, F. Kurdahl, Milagros Fernández, Román Hermida, Nader Bagherzadeh, Hartej Singh
2001	J	`jnl`	A framework for reconfigurable computing: task scheduling and context management. IEEE Trans. Very Large Scale Integr. Syst. Rafael Maestre, Fadi J. Kurdahi, Milagros Fernández, Román Hermida, Nader Bagherzadeh, Hartej Singh
2001	B	`conf`	Design and implementation of Automatic Parallel Detection Layer. SMC Mohamed Ahamed Mead, Hesham Eldeeb, Salwa M. Nassar, Nader Bagherzadeh
2001	J	`jnl`	Kernel scheduling techniques for efficient solution space exploration in reconfigurable computing. J. Syst. Archit. Rafael Maestre, Fadi J. Kurdahi, Milagros Fernández, Román Hermida, Nader Bagherzadeh, Hartej Singh
2001	A*	`conf`	Power-Aware Scheduling under Timing Constraints for Mission-Critical Embedded Systems. DAC Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh, Fadi J. Kurdahi
2000	—	`conf`	Configuration Management in Multi-Context Reconfigurable Systems for Simultaneous Performance and Power Optimization. ISSS Rafael Maestre, Fadi J. Kurdahi, Milagros Fernández, Nader Bagherzadeh, Hartej Singh
2000	J	`jnl`	Design and Implementation of the MorphoSys Reconfigurable Computing Processor. J. VLSI Signal Process. Ming-Hau Lee, Hartej Singh, Guangming Lu, Nader Bagherzadeh, Fadi J. Kurdahi, Eliseu M. Chaves Filho, Vladimir Castro Alves
2000	J	`jnl`	Guest Editors' Introduction: Configurable Computing. IEEE Des. Test Comput. Fadi J. Kurdahi, Nader Bagherzadeh, Peter Athanas, Jose L. Muñoz
2000	A*	`conf`	MorphoSys: case study of a reconfigurable computing system targeting multimedia applications. DAC Hartej Singh, Guangming Lu, Eliseu M. Chaves Filho, Rafael Maestre, Ming-Hau Lee, Fadi J. Kurdahi, Nader Bagherzadeh
2000	Misc	`conf`	Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures. FCCM Rafael Maestre, Milagros Fernández, Román Hermida, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh
2000	C	`conf`	Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures. ICCD Rafael Maestre, Milagros Fernández, Román Hermida, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh
1999	—	`conf`	A Framework for Scheduling and Context Allocation in Reconfigurable Computing. ISSS Rafael Maestre, Milagros Fernández, Román Hermida, Nader Bagherzadeh
1999	A	`conf`	Kernel Scheduling in Reconfigurable Computing. DATE Rafael Maestre, Fadi J. Kurdahi, Nader Bagherzadeh, Hartej Singh, Román Hermida, Milagros Fernández
1999	—	`conf`	MorphoSys: A Reconfigurable Processor Trageted to High Performance Image Application. IPPS/SPDP Workshops Guangming Lu, Ming-Hau Lee, Hartej Singh, Nader Bagherzadeh, Fadi J. Kurdahi, Eliseu M. Chaves Filho
1999	—	`conf`	The MorphoSys Dynamically Reconfigurable System-on-Chip. Evolvable Hardware Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Bagherzadeh, Fadi J. Kurdahi, Eliseu M. Chaves Filho, Vladimir Castro Alves
1999	—	`conf`	The MorphoSys Parallel Reconfigurable System. Euro-Par Guangming Lu, Hartej Singh, Ming-Hau Lee, Nader Bagherzadeh, Fadi J. Kurdahi, Eliseu M. Chaves Filho
1998	J	`jnl`	A parallel algorithm for pulsed laser infrared tomography. Pattern Recognit. Lett. S. Shoari, Nader Bagherzadeh, D. Goodman, Thomas E. Milner, D. J. Smithies, J. Stuart Nelson
1998	J	`jnl`	A scalable register file architecture for superscalar processors. Microprocess. Microsystems Steven Wallace, Nader Bagherzadeh
1998	J	`jnl`	Faster column operations in star networks. Telecommun. Syst. Nader Bagherzadeh, Martin Dowd, Shahram Latifi
1998	J	`jnl`	Low Expansion Packings and Embeddings of Hypercubes into Star Graphs: A Performance-Oriented Approach. IEEE Trans. Parallel Distributed Syst. Marcelo M. de Azevedo, Nader Bagherzadeh, Shahram Latifi
1998	J	`jnl`	Modeled and Measured Instruction Fetching Performance for Superscalar Microprocessors. IEEE Trans. Parallel Distributed Syst. Steven Wallace, Nader Bagherzadeh
1998	—	`conf`	MorphoSys: A Reconfigurable Architecture for Multimedia Applications. SBCCI Hartej Singh, Ming-Hau Lee, Guangming Lu, Fadi J. Kurdahi, Nader Bagherzadeh
1997	A*	`conf`	Multiple Branch and Block Prediction. HPCA Steven Wallace, Nader Bagherzadeh
1997	J	`jnl`	On Embedding Rings into a Star-Related Network. Inf. Sci. Shahram Latifi, Nader Bagherzadeh
1996	J	`jnl`	A Grid Embedding into the Star Graph for Image Analysis Solutions. Inf. Process. Lett. Nayla Nassif, Nader Bagherzadeh
1996	—	`conf`	A fine-grain multithreading superscalar architecture. IEEE PACT M. Loikkanen, Nader Bagherzadeh
1996	—	`conf`	A scalable register file architecture for dynamically scheduled processors. IEEE PACT Steven Wallace, Nader Bagherzadeh
1996	—	`conf`	Average distance and routing algorithms in the star-connected cycles interconnection network. SPDP Marcelo M. de Azevedo, Nader Bagherzadeh, Martin Dowd, Shahram Latifi
1996	J	`jnl`	Embedding an Arbitrary Binary Tree into the Star Graph. IEEE Trans. Computers Nader Bagherzadeh, Martin Dowd, Nayla Nassif
1996	Misc	`conf`	Hamiltonicity of the Clustered-Star Graph with Embedding Applications. PDPTA Shahram Latifi, Nader Bagherzadeh
1996	—	`conf`	Instruction Fetching Mechanisms for Superscalar Microprocessors. Euro-Par, Vol. II Steven Wallace, Nader Bagherzadeh
1996	A*	`conf`	Performance Study of a Multithreaded Superscalar Microprocessor. HPCA Manu Gulati, Nader Bagherzadeh
1996	J	`jnl`	Some Topological Properties of Star Connected Cycles. Inf. Process. Lett. Marcelo M. de Azevedo, Nader Bagherzadeh, Martin Dowd, Shahram Latifi
1996	—	`conf`	Variable-Dilation Embeddings of Hypercubes into Star Graphs: Performance Metrics, Mapping Functions, and Routing. Euro-Par, Vol. I Marcelo Moraes de Azevdeo, Nader Bagherzadeh, Shahram Latifi
1995	J	`jnl`	A Well-Behaved Enumeration of Star Graphs. IEEE Trans. Parallel Distributed Syst. Nader Bagherzadeh, Martin Dowd, Shahram Latifi
1995	J	`jnl`	Broadcasting Algorithms for the Star-Connected Cycles Interconnection Network. J. Parallel Distributed Comput. Marcelo M. de Azevedo, Nader Bagherzadeh, Shahram Latifi
1995	C	`conf`	Design and implementation of a 100 MHz centralized instruction window for a superscalar microprocessor. ICCD Steven Wallace, Nirav Dagli, Nader Bagherzadeh
1995	—	`conf`	Fault-diameter of the star-connected cycles interconnection network. HICSS (2) Marcelo M. de Azevedo, Nader Bagherzadeh, Shahram Latifi
1995	J	`jnl`	Performance issues of a superscalar microprocessor. Microprocess. Microsystems Steven Wallace, Nader Bagherzadeh
1994	J	`jnl`	A New Approach for Circle Detection on Multiprocessors. J. Parallel Distributed Comput. Alireza Kavianpour, S. Shoari, Nader Bagherzadeh
1994	J	`jnl`	A performance comparison of several superscalar processor models with a VLIW processor. Microprocess. Microsystems John Lenell, Nader Bagherzadeh
1994	J	`jnl`	Incomplete Star: An Incrementally Scalable Network Based on the Star Graph. IEEE Trans. Parallel Distributed Syst. Shahram Latifi, Nader Bagherzadeh
1994	J	`jnl`	Parallel Algorithms for Line Detection on A Pyramid Architecture. Int. J. Pattern Recognit. Artif. Intell. Alireza Kavianpour, Nader Bagherzadeh
1994	—	`conf`	Performance Issues of a Superscalar Microprocessor. ICPP (1) Steven Wallace, Nader Bagherzadeh
1994	J	`jnl`	Pipelining and Bypassing in a VLIW Processor. IEEE Trans. Parallel Distributed Syst. Arthur Abnous, Nader Bagherzadeh
1994	J	`jnl`	Pyramid simulation of image processing applications. Image Vis. Comput. S. Shoari, Alireza Kavianpour, Nader Bagherzadeh
1993	—	`conf`	A Performance Comparison of Several Superscalar Processor Models with a VLIW Processor. IPPS John Lenell, Nader Bagherzadeh
1993	J	`jnl`	A Routing and Broadcasting Scheme on Faulty Star Graphs. IEEE Trans. Computers Nader Bagherzadeh, Nayla Nassif, Shahram Latifi
1993	J	`jnl`	A Systematic Approch for Mapping Application Tasks in Hypercubes. IEEE Trans. Computers Alireza Kavianpour, Nader Bagherzadeh
1993	—	`conf`	The Clustered-Star Graph: A New Topology for Large Interconnection Networks. IPPS Shahram Latifi, Nader Bagherzadeh
1993	—	`conf`	The Star Connected Cycles: A Fixed-Degree Network for Parallel Processing. ICPP (1) Shahram Latifi, Marcelo M. de Azevedo, Nader Bagherzadeh
1993	J	`jnl`	VIPER: a VLIW integer microprocessor. IEEE J. Solid State Circuits Jeffrey Gray, Andrew Naylor, Arthur Abnous, Nader Bagherzadeh
1992	J	`jnl`	Design and implementation of the 'Tiny RISC' microprocessor. Microprocess. Microsystems Arthur Abnous, Christopher Christensen, Jeffrey Gray, John Lenell, Andrew Naylor, Nader Bagherzadeh
1992	J	`jnl`	Finding circular shapes in an image on a pyramid architecture. Pattern Recognit. Lett. Alireza Kavianpour, Nader Bagherzadeh
1992	—	`conf`	On Design and Performance Analysis of a Superscalar Architecture. ICPP (1) Takaaki Kato, Koji Suginuma, Nader Bagherzadeh
1992	—	`conf`	Optimal Ring Embedding in Hypercubes with Faulty Links. FTCS Shahram Latifi, Si-Qing Zheng, Nader Bagherzadeh
1992	—	`conf`	Parallel Implementation of the Auction Algorithm on the Intel Hypercube. IPPS Nader Bagherzadeh, Kent Hawk
1992	A*	`conf`	Performance analysis and design methodology for a scalable superscalar architecture. MICRO Takaaki Kato, Toshihisa Ono, Nader Bagherzadeh
1992	A*	`conf`	Pipelining and bypassing in a VLIW processor. ISCA Arthur Abnous, Nader Bagherzadeh
1991	J	`jnl`	A Parallel Asynchronous Garbage Collection Algorithm for Distributed Systems. IEEE Trans. Knowl. Data Eng. Nader Bagherzadeh, Seng-lai Heng, Chuan-lin Wu
1991	—	`conf`	A Percolation Based VLIW Architecture. ICPP (1) Arthur Abnous, Roni Potasman, Nader Bagherzadeh, Alexandru Nicolau
1991	—	`conf`	Hypermesh: A Combined Quad Tree and Mesh Network for Parallel Processing. ICPP (1) Wei Kang Tsai, Nader Bagherzadeh, Young C. Kim
1991	—	`conf`	Parallel Hough Transform for Image Processing on a Pyramid Architecture. ICPP (1) Alireza Kavianpour, Nader Bagherzadeh
1991	—	`conf`	Special Features of a VLIW Architecture. IPPS Arthur Abnous, Nader Bagherzadeh
1990	J	`jnl`	Near-optimal message routing and broadcasting in faulty hypercubes. Int. J. Parallel Program. Douglas M. Blough, Nader Bagherzadeh
1987	—	`conf`	Network simulation of synchronous garbage collection algorithm. Simulation of Computer Networks B. Kandu, Seng-lai Heng, Chuan-lin Wu, Nader Bagherzadeh
1987	J	`jnl`	Performance of symbolic applications on a parallel architecture. Int. J. Parallel Program. Adolfo Guzmán, Edward J. Krall, Patrick F. McGehearty, Nader Bagherzadeh
1986	J	`jnl`	Software Authorization Systems. IEEE Softw. Paul A. Suhler, Nader Bagherzadeh, Miroslav Malek, Neil Iscoe
1985	A	`conf`	Network Facility for a Reconfigurable Computer Architecture. ICDCS Manjai Lee, Eric Fiene, Chuan-lin Wu, Geoffrey Brown, Nader Bagherzadeh