Nachiket V. Desai

31 papers A 1Journal 10Unranked 20
YearRankTypeTitle / Venue / Authors
2025 J jnl
A 65-nm Proactive Power Management Technique With Real-Time Machine Learning Engine for Droop Prediction and Mitigation on Microprocessors.
IEEE J. Solid State Circuits
Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu
2025 — conf
A 93.9% Peak Efficiency 3V-to-40V-Input GaN-based DC-DC Converter with Unified Reliability and Efficiency Adaptive Control.
CICC
Zhaoqing Wang, Yichen Xu, Suhwan Kim, Nachiket V. Desai, Minxiang Gong, Ram Krishnamurthy, Xin Zhang, Mingoo Seok
2025 J jnl
A Monolithic, 10.5 W/mm
IEEE J. Solid State Circuits
Suhwan Kim, Harish K. Krishnamurthy, Zakir K. Ahmed, Nachiket V. Desai, Sheldon Weng, Anne Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2024 — conf
14.9 A Monolithic 10.5W/mm
ISSCC
Suhwan Kim, Harish K. Krishnamurthy, Zakir K. Ahmed, Nachiket V. Desai, Sheldon Weng, Anne Augustine, Huong T. Do, Jingshu Yu, Phong D. Bach, Xiaosen Liu, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2024 J jnl
A Ten-Level Series-Capacitor 24-to-1-V DC-DC Converter With Fast In Situ Efficiency Tracking, Power-FET Code Roaming, and Switch Node Power Rail.
IEEE J. Solid State Circuits
Zhaoqing Wang, Mao Li, Suhwan Kim, Nachiket V. Desai, Ram K. Krishnamurthy, Xin Zhang, Mingoo Seok
2024 — conf
Design kit development on a 300mm GaN-on-Si demonstration platform with integrated Si pMOS.
BCICTS
Samuel James Bader, Ahmad Zubair, Alvaro Latorre-Rey, Mikkel Hansen, Soumen Sarkar, Abdul Asif, Dimitri Frolov, Kaushik Narayanan, Jag Rangaswamy, Puneet Kanwar Kaur, Sanjeev Kumar, Nirmal Kundu, Shreyas Samraksh Jayaprakash, Abhijeet Khobragade, Yashwanth Pathivada, Qiang Yu, Jagannathan Vasudevan, Ibukun Momson, Said Rami, Heli Vora, Marko Radosavljevic, Pratik Koirala, Michael Beumer, Andrey Vyatskikh, Paul Nordeen, Thomas Hoff, Nachiket V. Desai, Han Wui Then
2023 — conf
93.89% Peak Efficiency 24V-to-1V DC-DC Converter with Fast In-Situ Efficiency Tracking and Power-FET Code Roaming.
ESSCIRC
Zhaoqing Wang, Mao Li, Suhwan Kim, Nachiket V. Desai, Ram K. Krishnamurthy, Orlando Lazaro, Andres A. Blanco, Xin Zhang, Mingoo Seok
2023 — conf
A 65nm Fully-integrated Fast-switching Buck Converter with Resonant Gate Drive and Automatic Tracking.
CICC
Xi Chen, Aly Shoukry, Tianyu Jia, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu
2023 — conf
Proactive Power Regulation with Real-time Prediction and Fast Response Guardband for Fine-grained Dynamic Voltage Droop Mitigation on Digital SoCs.
VLSI Technology and Circuits
Xi Chen, Jiaxiang Feng, Aly Shoukry, Xin Zhang, Raveesh Magod, Nachiket V. Desai, Jie Gu
2022 — conf
A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer.
ISSCC
Xiaosen Liu, Harish Krishnamurthy, Renzhi Liu, Krishnan Ravichandran, Zakir K. Ahmed, Nachiket V. Desai, Nicolas Butzen, James W. Tschanz, Vivek De
2022 J jnl
A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors.
IEEE J. Solid State Circuits
Nachiket V. Desai, Han Wui Then, Jingshu Yu, Harish K. Krishnamurthy, William J. Lambert, Nicolas Butzen, Sheldon Weng, Christopher Schaef, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2022 — conf
Fully Integrated Voltage Regulators with Package-Embedded Inductors for Heterogeneous 3D-TSV-Stacked System-in-Package with 22nm CMOS Active Silicon Interposer Featuring Self-Trimmed, Digitally Controlled ON-Time Discontinuous Conduction Mode (DCM) Operation.
VLSI Technology and Circuits
Nachiket V. Desai, Harish K. Krishnamurthy, Suhwan Kim, Christopher Schaef, Sheldon Weng, Beomseok Choi, William J. Lambert, Krishnan Ravichandran, James W. Tschanz, Vivek De
2021 — conf
17.4 Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing.
ISSCC
Nachiket V. Desai, Harish K. Krishnamurthy, Khondker Zakir Ahmed, Sheldon Weng, Suhwan Kim, Xiaosen Liu, Huong T. Do, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2021 — conf
A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors.
VLSI Circuits
Nachiket V. Desai, Harish K. Krishnamurthy, William J. Lambert, Jingshu Yu, Han Wui Then, Nicolas Butzen, Sheldon Weng, Christopher Schaef, N. Nidhi, Marko Radosavljevic, Johann Rode, Justin Sandford, Kaladhar Radhakrishnan, Krishnan Ravichandran, Bernhard Sell, James W. Tschanz, Vivek De
2021 — conf
A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction.
VLSI Circuits
Khondker Zakir Ahmed, Nachiket V. Desai, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Krishnan Ravichandran, James W. Tschanz, Vivek De
2020 — conf
An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current Steering.
VLSI Circuits
Zakir K. Ahmed, Harish K. Krishnamurthy, Sheldon Weng, Xiaosen Liu, Christopher Schaef, Nachiket V. Desai, Krishnan Ravichandran, James W. Tschanz, Vivek De
2020 — conf
Digital Control of Switching and Linear Integrated Voltage Regulators.
CICC
Harish K. Krishnamurthy, Zakir A. Khondker, Xiaosen Liu, Nachiket V. Desai, Suhwan Kim, Nicolas Butzen, Sally Amin, Sheldon Weng, Krishnan Ravichandran, James W. Tschanz, Vivek De
2019 — conf
A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode Operation.
ISSCC
Christopher Schaef, Nachiket V. Desai, Harish Krishnamurthy, Sheldon Weng, Huong T. Do, William J. Lambert, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De
2019 J jnl
A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors.
IEEE J. Solid State Circuits
Christopher Schaef, Kaladhar Radhakrishnan, Krishnan Ravichandran, James W. Tschanz, Vivek De, Nachiket V. Desai, Harish K. Krishnamurthy, Xiaosen Liu, Khondker Zakir Ahmed, Suhwan Kim, Sheldon Weng, Huong T. Do, William J. Lambert
2018 J jnl
A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS.
IEEE J. Solid State Circuits
Harish Kumar Krishnamurthy, Sheldon Weng, George E. Matthew, Nachiket V. Desai, Ruchir Saraswat, Krishnan Ravichandran, James W. Tschanz, Vivek De
2018 J jnl
A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS.
IEEE J. Solid State Circuits
Harish Kumar Krishnamurthy, Vaibhav A. Vaidya, Pavan Kumar, Rinkle Jain, Sheldon Weng, Stephen T. Kim, George E. Matthew, Nachiket V. Desai, Xiaosen Liu, Krishnan Ravichandran, James W. Tschanz, Vivek De
2018 — conf
A low-power integrated power converter for an electromagnetic vibration energy harvester with 150 mV-AC cold startup, frequency tuning, and 50 Hz AC-to-DC conversion.
CICC
Ujwal Radhakrishna, Patrick Riehl, Nachiket V. Desai, Phillip M. Nadeau, Yuechen Yang, Abraham Shin, Jeffrey H. Lang, Anantha P. Chandrakasan
2018 J jnl
An Actively Detuned Wireless Power Receiver With Public Key Cryptographic Authentication and Dynamic Power Allocation.
IEEE J. Solid State Circuits
Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan
2017 — conf
21.8 An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation.
ISSCC
Nachiket V. Desai, Chiraag Juvekar, Shubham Chandak, Anantha P. Chandrakasan
2017 — conf
A 25 mV-startup cold start system with on-chip magnetics for thermal energy harvesting.
ESSCIRC
Preet Garcha, Dina El-Damak, Nachiket V. Desai, Jorge Troncoso, Erika Mazotti, Joyce Mullenix, Shaoping Tang, Django Trombley, Dennis Buss, Jeffrey H. Lang, Anantha P. Chandrakasan
2016 — conf
A ZVS resonant receiver with maximum efficiency tracking for device-to-device wireless charging.
ESSCIRC
Nachiket V. Desai, Anantha P. Chandrakasan
2014 J jnl
A Scalable, 2.9 mW, 1 Mb/s e-Textiles Body Area Network Transceiver With Remotely-Powered Nodes and Bi-Directional Data Communication.
IEEE J. Solid State Circuits
Nachiket V. Desai, Jerald Yoo, Anantha P. Chandrakasan
2014 A conf
A bipolar ±40 MV self-starting boost converter with transformer reuse for thermoelectric energy harvesting.
ISLPED
Nachiket V. Desai, Yogesh K. Ramadass, Anantha P. Chandrakasan
2013 — conf
A scalable 2.9mW 1Mb/s eTextiles body area network transceiver with remotely powered sensors and bi-directional data communication.
ISSCC
Nachiket V. Desai, Jerald Yoo, Anantha P. Chandrakasan
2012 J jnl
A Low-Power 5-Gb/s Current-Mode LVDS Output Driver and Receiver with Active Termination.
Circuits Syst. Signal Process.
Vijaya Sankara Rao Pasupureddi, Nachiket V. Desai, Pradip Mandal
2009 — conf
A Fuzzy Logic Based Approach to De-Weather Fog-Degraded Images.
CGIV
Nachiket V. Desai, Aritra Chatterjee, Shaunak Mishra, Dhaval Chudasama, Sunav Choudhary, Sudhir Kumar Barai