Nabiollah Shiri

31 papers Journal 31
YearRankTypeTitle / Venue / Authors
2026 J jnl
An Efficient Approximate Radix-8 Booth Multiplier for Edge Detection in Bioimages by Field Programmable Gate Array.
IEEE Trans. Circuits Syst. I Regul. Pap.
Elham Esmaeili, Ali Ranjbar, Shabnam Rafiei, Nabiollah Shiri
2025 J jnl
Accuracy Improvement in Approximate Sum of Absolute Differences Circuit Using Error Correction Module for Difference Detection in Bio-Images.
IET Circuits Devices Syst.
Forouzan Bahrami, Saina Parvanehnezhad Shirazian, Nabiollah Shiri
2025 J jnl
FPGA-Based Multiplier with a New Approximate Full Adder for Error-Resilient Applications.
CoRR
Ali Ranjbar, Elham Esmaeili, Roghayeh Rafieisangari, Nabiollah Shiri
2025 J jnl
High-Efficient Approximate Subtractors for Change Detection Applications.
IEEE Embed. Syst. Lett.
Fatemeh Pooladi, Farshad Pesaran, Nabiollah Shiri
2024 J jnl
A Multiplier-Free Discrete Cosine Transform Architecture Using Approximate Full Adder and Subtractor.
IEEE Embed. Syst. Lett.
Elham Esmaeili, Nabiollah Shiri, Mahmood Rafiee, Ayoub Sadeghi
2024 J jnl
A New Approximate Sum of Absolute Differences Unit for Bioimages Processing.
IEEE Embed. Syst. Lett.
Forouzan Bahrami, Nabiollah Shiri, Farshad Pesaran
2024 J jnl
A neural network-based error correction in the first-stage residue of pipelined analog to digital converters.
Int. J. Circuit Theory Appl.
Roghayeh Rafieisangari, Nabiollah Shiri
2024 J jnl
A new ripple carry adder structure based on a swing-boosted full adder for concurrent error correction in low-resolution pipeline analog-to-digital converters.
Int. J. Circuit Theory Appl.
Mahsa Tahghigh, Nabiollah Shiri
2024 J jnl
An Efficient Approximate Multiplier with Encoded Partial Products and Inexact Counter for Joint Photographic Experts Group Compression.
IET Circuits Devices Syst.
Elham Esmaeili, Nabiollah Shiri
2024 J jnl
An adaptive neuro-fuzzy inference system optimized by genetic algorithm for brain tumour detection in magnetic resonance images.
IET Image Process.
Marzieh Ghahramani, Nabiollah Shiri
2024 J jnl
Characterizing parameter variations for enhanced performance and adaptability in 3 nm MBCFET technology.
Microelectron. J.
Mahmood Rafiee, Nabiollah Shiri, Mohsen Gharehkhani, Alexandra Pinto Castellanos, Ayoub Sadeghi
2024 J jnl
Realization of a high-efficient GDI-based 4:2 compressor for sum of absolute difference detection in image and signal processing.
Comput. Electr. Eng.
Mehdi Hosseinpour, Nabiollah Shiri, Farshad Pesaran
2023 J jnl
A 38.5-fJ 14.4-ns Robust and Efficient Subthreshold-to-Suprathreshold Voltage-Level Shifter Comprising Logic Mismatch-Activated Current Control Circuit.
IEEE Trans. Circuits Syst. II Express Briefs
Mohammad N. Sharafi, Hamidreza Rashidian, Nabiollah Shiri
2023 J jnl
A high-efficient imprecise discrete cosine transform block based on a novel full adder and Wallace multiplier for bioimages compression.
Int. J. Circuit Theory Appl.
Elham Esmaeili, Farshad Pesaran, Nabiollah Shiri
2023 J jnl
Brain tumour detection in magnetic resonance imaging using Levenberg-Marquardt backpropagation neural network.
IET Image Process.
Marzieh Ghahramani, Nabiollah Shiri
2023 J jnl
Efficient GDI-based approximate subtractors for change detection in bio-image processing applications.
Microelectron. J.
Fatemeh Pooladi, Farshad Pesaran, Nabiollah Shiri
2023 J jnl
Efficient and optimized approximate GDI full adders based on dynamic threshold CNTFETs for specific least significant bits.
Frontiers Inf. Technol. Electron. Eng.
Ayoub Sadeghi, Razieh Ghasemi, Hossein Ghasemian, Nabiollah Shiri
2023 J jnl
High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures.
IEEE Embed. Syst. Lett.
Ayoub Sadeghi, Razieh Ghasemi, Hossein Ghasemian, Nabiollah Shiri
2023 J jnl
High-efficient and error-resilient gate diffusion input-based approximate full adders for complex multistage rapid structures.
Comput. Electr. Eng.
Nabiollah Shiri, Ayoub Sadeghi, Mahmood Rafiee
2023 J jnl
High-efficient reversible full adder realized by dynamic threshold-based gate diffusion input logics.
Microelectron. J.
Seyedeh Fatemeh Deymad, Nabiollah Shiri, Farshad Pesaran
2023 J jnl
Imprecise Subtractor Using a New Efficient Approximate-Based Gate Diffusion Input Full Adder for Bioimages Processing.
Comput. Electr. Eng.
Forouzan Bahrami, Nabiollah Shiri, Farshad Pesaran
2023 J jnl
Voltage over-scaling CNT-based 8-bit multiplier by high-efficient GDI-based counters.
IET Comput. Digit. Tech.
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Abdolreza Darabi, Ebrahim Abiri
2022 J jnl
An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending.
Frontiers Inf. Technol. Electron. Eng.
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Mahsa Tahghigh
2022 J jnl
High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures.
IEEE Embed. Syst. Lett.
Mahmood Rafiee, Nabiollah Shiri, Ayoub Sadeghi
2022 J jnl
Low-Power and Fast-Swing-Restoration GDI-Based Magnitude Comparator for Digital Images Processing.
Circuits Syst. Signal Process.
Mahmood Rafiee, Nabiollah Shiri, Ayoub Sadeghi, Abdolreza Darabi, Ebrahim Abiri
2022 J jnl
SR-GDI CNTFET-based magnitude comparator for new generation of programmable integrated circuits.
Int. J. Circuit Theory Appl.
Nabiollah Shiri, Ayoub Sadeghi, Mahmood Rafiee, Maryam Bigonah
2022 J jnl
Tolerant and low power subtractor with 4: 2 compressor and a new TG-PTL-float full adder cell.
IET Circuits Devices Syst.
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Rahim Ghayour
2021 J jnl
An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications.
Microelectron. J.
Mahmood Rafiee, Farshad Pesaran, Ayoub Sadeghi, Nabiollah Shiri
2020 J jnl
A low-power pseudo-dynamic full adder cell for image addition.
Comput. Electr. Eng.
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Parisa Rahimi
2020 J jnl
Diagnosis of brain tumours by MRI binarisation with variable fuzzy level.
IET Image Process.
Armaghan Shirali, Nabiollah Shiri
2020 J jnl
High-Efficient, Ultra-Low-Power and High-Speed 4: 2 Compressor with a New Full Adder Cell for Bioelectronics Applications.
Circuits Syst. Signal Process.
Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee
redb/extractors/macho_extractors/__init__.py
← Index redb/extractors/macho_extractors/__init__.py python 
# MachO extractors package

from .macho_features import MachOFeaturesExtractor
from .macho_segments import MachOSegmentExtractor
from .macho_imports import MachOImportExtractor
from .macho_exports import MachOExportExtractor
from .macho_dylibs import MachODylibExtractor
from .macho_signature import MachOSignatureExtractor
from .macho_similarity_hashes import MachOSimilarityHashExtractor
# MachOUniversalExtractor is deprecated - FAT binary relationships are now
# tracked via parent_sha256 column in redb_basic_properties
# from .macho_universal import MachOUniversalExtractor

__all__ = [
    'MachOFeaturesExtractor',
    'MachOSegmentExtractor',
    'MachOImportExtractor',
    'MachOExportExtractor',
    'MachODylibExtractor',
    'MachOSignatureExtractor',
    'MachOSimilarityHashExtractor',
    # 'MachOUniversalExtractor',  # Deprecated
]