Na Fu

31 papers A* 5A 1B 1C 2Journal 14Unranked 7
YearRankTypeTitle / Venue / Authors
2025 J jnl
CoRR
Steven Duplij, Na Fu, Qiang Guo
2025 J jnl
IEEE Internet Things J.
Guanghua Zhang, Xiqian Zhang, Dou An, Linghao Zeng, Na Fu, Mingyu Zhang
2024 conf
HCI (55)
Na Fu, Peiyan Zhou, Zhangxin Ma
2024 conf
HCI (55)
Zhangxin Ma, Peiyan Zhou, Na Fu
2023 J jnl
IEEE Trans. Veh. Technol.
Na Fu, Junjun Deng, Zhenpo Wang, Deliang Chen
2023 J jnl
RAIRO Oper. Res.
Fang Wu, Bing Liu, Na Fu
2022 J jnl
Sensors
Canyou Liu, Jimin Zhao, Feilong Mao, Shuang Chen, Na Fu, Xin Wang, Yani Cao
2022 J jnl
IEEE Access
Guanghua Zhang, Feng Lian, Linghao Zeng, Na Fu, Shasha Dai, Xinqiang Liu
2019 J jnl
IEEE Access
Qingchao Zhang, Junjun Deng, Na Fu
2019 J jnl
J. Oper. Res. Soc.
Na Fu, T. C. E. Cheng, Zhongjun Tian
2018 conf
CCIS
Na Fu, Wenjie Zhang, Xiangpeng Xie
2018 J jnl
IET Signal Process.
Guanghua Zhang, Feng Lian, Chongzhao Han, Hui Chen, Na Fu
2017 conf
SSCI
Jonathan Chase, Jiali Du, Na Fu, Truc Viet Le, Hoong Chuin Lau
2017 A* conf
IJCAI
Pradeep Varakantham, Na Fu
2017 B conf
IJCNN
Xin Yan, Fei Long, Jingshuai Wang, Na Fu, Weihua Ou, Bin Liu
2016 A* conf
AAAI
Pradeep Varakantham, Na Fu, Hoong Chuin Lau
2016 A* conf
ICAPS
Na Fu, Pradeep Varakantham, Hoong Chuin Lau
2015 ch.
Computer and Information Science
Xiaoping Li, Degui Zhao, Yongliang Hu, Ye Song, Na Fu, Qiongxin Liu
2015 A conf
AAMAS
Pradeep Varakantham, Hala Mostafa, Na Fu, Hoong Chuin Lau
2015 J jnl
J. Sched.
Na Fu, Hoong Chuin Lau, Pradeep Varakantham
2014 conf
ICAILP
Ye Song, Na Fu, Xiaoping Li, Qiongxin Liu
2014 J jnl
CoRR
Na Fu, Hoong Chuin Lau, Pradeep Varakantham, Fei Xiao
2013 conf
ADT
Pradeep Varakantham, Na Fu, William Yeoh, Shih-Fen Cheng, Hoong Chuin Lau
2012 J jnl
J. Artif. Intell. Res.
Na Fu, Hoong Chuin Lau, Pradeep Varakantham, Fei Xiao
2011 conf
HICSS
Kar Way Tan, Na Fu, Hoong Chuin Lau
2010 J jnl
Eur. J. Oper. Res.
Bo Feng, Zhong-Zhong Jiang, Zhi-Ping Fan, Na Fu
2010 A* conf
ICAPS
Na Fu, Pradeep Varakantham, Hoong Chuin Lau
2009 J jnl
Expert Syst. Appl.
Zhi-Ping Fan, Bo Feng, Zhong-Zhong Jiang, Na Fu
2008 A* conf
ICAPS
Na Fu, Hoong Chuin Lau, Fei Xiao
2007 C conf
IGARSS
Su-ying Li, Xiaobing Li, Na Fu, Dandan Wang, Hong Wang, Huiling Long
2007 C conf
IGARSS
Xiaobing Li, Hong Wang, Na Fu, Dandan Wang, Li Zhang
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False