N. Prasad

11 papers C 1Misc 1Journal 6Unranked 3

Year	Rank	Type	Title / Venue / Authors
2019	J	`jnl`	Runtime Mitigation of Packet Drop Attacks in Fault-tolerant Networks-on-Chip. CoRR N. Prasad, Navonil Chatterjee, Santanu Chattopadhyay, Indrajit Chakrabarti
2018	J	`jnl`	A Parallel Stochastic Number Generator With Bit Permutation Networks. IEEE Trans. Circuits Syst. II Express Briefs Vikash Sehwag, N. Prasad, Indrajit Chakrabarti
2018	J	`jnl`	An Energy-Efficient Network-on-Chip-Based Reconfigurable Viterbi Decoder Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. N. Prasad, Indrajit Chakrabarti, Santanu Chattopadhyay
2018	J	`jnl`	Design and evaluation of ZMesh topology for on-chip interconnection networks. J. Parallel Distributed Comput. N. Prasad, Priyajit Mukherjee, Santanu Chattopadhyay, Indrajit Chakrabarti
2017	Misc	`conf`	A New Logic Encryption Strategy Ensuring Key Interdependency. VLSID Rajit Karmakar, N. Prasad, Santanu Chattopadhyay, Rohit Kapur, Indranil Sengupta
2017	C	`conf`	Runtime mitigation of illegal packet request attacks in Networks-on-Chip. ISCAS N. Prasad, Rajit Karmakar, Santanu Chattopadhyay, Indrajit Chakrabarti
2016	—	`conf`	Approximate conditional carry adder for error tolerant applications. VDAT Avishek Sinha Roy, N. Prasad, Anindya Sundar Dhar
2015	J	`jnl`	Multiplier-less VLSI architectures for radix-2 Int. J. Circuit Theory Appl. Abhishek Mankar, N. Prasad, Ansuman DiptiSankar Das, Sukadev Meher
2015	J	`jnl`	Reconfigurable data parallel constant geometry fast Fourier transform architectures on Network-on-Chip. Microprocess. Microsystems N. Prasad, Santanu Chattopadhyay, Indrajit Chakrabarti
2015	—	`conf`	ZMesh: An Energy-Efficient Network-on-Chip Topology for Constant-Geometry Algorithms. iNIS N. Prasad, Santanu Chattopadhyay, Indrajit Chakrabarti
2014	—	`conf`	A spare link based reliable Network-on-Chip design. VDAT Navonil Chatterjee, N. Prasad, Santanu Chattopadhyay