Mustafa M. Shihab

18 papers A* 2A 3C 2Misc 1Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2025 J jnl
A TRAP for SAT: On the Imperviousness of a Transistor-Level Programmable Fabric to Satisfiability-Based Attacks.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Aric Fowler, Mohammed Shayan, Mustafa M. Shihab, Thomas Broadfoot, Peter Beerel, Carl Sechen, Yiorgos Makris
2025 J jnl
Physically Secure Logic Locking With Nanomagnet Logic.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Alexander J. Edwards, Naimul Hassan, Jared Arzate, Alexander N. Chin, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
2023 A* conf
FuncTeller: How Well Does eFPGA Hide Functionality?
USENIX Security Symposium
Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran
2023 J jnl
FuncTeller: How Well Does eFPGA Hide Functionality?
CoRR
Zhaokun Han, Mohammed Shayan, Aneesh Dixit, Mustafa M. Shihab, Yiorgos Makris, Jeyavijayan Rajendran
2022 A conf
Physically and Algorithmically Secure Logic Locking with Hybrid CMOS/Nanomagnet Logic Circuits.
DATE
Alexander J. Edwards, Naimul Hassan, Dhritiman Bhattacharya, Mustafa M. Shihab, Peng Zhou, Xuan Hu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
2021 A* conf
Secure Logic Locking with Strain-Protected Nanomagnet Logic.
DAC
Naimul Hassan, Alexander J. Edwards, Dhritiman Bhattacharya, Mustafa M. Shihab, Varun Venkat, Peng Zhou, Xuan Hu, Shamik Kundu, Abraham Peedikayil Kuruvila, Kanad Basu, Jayasimha Atulasimha, Yiorgos Makris, Joseph S. Friedman
2020 A conf
An Efficient MILP-Based Aging-Aware Floorplanner for Multi-Context Coarse-Grained Runtime Reconfigurable FPGAs.
DATE
Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
2020 C conf
CASPER: CAD Framework for a Novel Transistor-Level Programmable Fabric.
ISCAS
Mustafa M. Shihab, Bharath Ramanidharan, Gaurav Rajavendra Reddy, Jingxiang Tian, William Swartz, Carl Sechen, Yiorgos Makris
2019 J jnl
CAPE: A cross-layer framework for accurate microprocessor power estimation.
Integr.
Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris
2019 A conf
Design Obfuscation through Selective Post-Fabrication Transistor-Level Programming.
DATE
Mustafa M. Shihab, Jingxiang Tian, Gaurav Rajavendra Reddy, Bo Hu, William Swartz, Benjamin Carrión Schäfer, Carl Sechen, Yiorgos Makris
2019 Misc conf
Energy Efficient Power Distribution on Many-Core SoC.
VLSID
Mustafa M. Shihab, Vishwani D. Agrawal
2019 — conf
Extending the Lifetime of Coarse-Grained Runtime Reconfigurable FPGAs by Balancing Processing Element Usage.
FPT
Bo Hu, Mustafa M. Shihab, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
2019 — conf
Functional Obfuscation of Hardware Accelerators through Selective Partial Design Extraction onto an Embedded FPGA.
ACM Great Lakes Symposium on VLSI
Bo Hu, Jingxiang Tian, Mustafa M. Shihab, Gaurav Rajavendra Reddy, William Swartz, Yiorgos Makris, Benjamin Carrión Schäfer, Carl Sechen
2018 J jnl
ReveNAND: A Fast-Drift-Aware Resilient 3D NAND Flash Design.
ACM Trans. Archit. Code Optim.
Mustafa M. Shihab, Jie Zhang, Myoungsoo Jung, Mahmut T. Kandemir
2018 — conf
Towards a Cross-Layer Framework for Accurate Power Modeling of Microprocessor Designs.
PATMOS
Monir Zaman, Mustafa M. Shihab, Ayse K. Coskun, Yiorgos Makris
2016 — conf
Couture: Tailoring STT-MRAM for Persistent Main Memory.
INFLOW@OSDI
Mustafa M. Shihab, Jie Zhang, Shuwen Gao, Josep Sloan, Myoungsoo Jung
2015 C conf
OpenNVM: An open-sourced FPGA-based NVM controller for low level memory characterization.
ICCD
Jie Zhang, Gieseo Park, Mustafa M. Shihab, David Donofrio, John Shalf, Myoungsoo Jung
2014 — conf
Power, Energy, and Thermal Considerations in SSD-Based I/O Acceleration.
HotStorage
Jie Zhang, Mustafa M. Shihab, Myoungsoo Jung