Muneo Fukaishi

22 papers Journal 14Unranked 8
YearRankTypeTitle / Venue / Authors
2012 J jnl
A 30-MHz-2.4-GHz CMOS Receiver With Integrated RF Filter and Dynamic-Range-Scalable Energy Detector for Cognitive Radio Systems.
IEEE J. Solid State Circuits
Masaki Kitsunezuka, Hiroshi Kodama, Naoki Oshima, Kazuaki Kunihiro, Tadashi Maeda, Muneo Fukaishi
2011 J jnl
A Low-IF/Zero-IF Reconfigurable Analog Baseband IC With an I/Q Imbalance Cancellation Scheme.
IEEE J. Solid State Circuits
Masaki Kitsunezuka, Takashi Tokairin, Tadashi Maeda, Muneo Fukaishi
2011 — conf
Real-time current-waveform sensor with plugless energy harvesting from AC power lines for home/building energy-management systems.
ISSCC
Shingo Takahashi, Nobuhide Yoshida, Kenichi Maruhashi, Muneo Fukaishi
2010 J jnl
A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer With a Time-Windowed Time-to-Digital Converter.
IEEE J. Solid State Circuits
Takashi Tokairin, Mitsuji Okada, Masaki Kitsunezuka, Tadashi Maeda, Muneo Fukaishi
2010 — conf
A 2.1-to-2.8GHz all-digital frequency synthesizer with a time-windowed TDC.
ISSCC
Takashi Tokairin, Mitsuji Okada, Masaki Kitsunezuka, Tadashi Maeda, Muneo Fukaishi
2010 J jnl
A 60 GHz Power Amplifier With 14.5 dBm Saturation Power and 25% Peak PAE in CMOS 65 nm SOI.
IEEE J. Solid State Circuits
Alexandre Siligaris, Yasuhiro Hamada, Christopher Mounet, Christine Raynaud, Baudouin Martineau, Nicolas Deparis, Nathalie Rolland, Muneo Fukaishi, Pierre Vincent
2009 — conf
A 60GHz power amplifier with 14.5dBm saturation power and 25% peak PAE in CMOS 65nm SOI.
ESSCIRC
Alexandre Siligaris, Yasuhiro Hamada, Christopher Mounet, Christine Raynaud, Baudouin Martineau, Nicolas Deparis, Nathalie Rolland, Muneo Fukaishi, Pierre Vincent
2007 J jnl
A 1 Tb/s 3 W Inductive-Coupling Transceiver for 3D-Stacked Inter-Chip Clock and Data Link.
IEEE J. Solid State Circuits
Noriyuki Miura, Daisuke Mizoguchi, Mari Inoue, Kiichi Niitsu, Yoshihiro Nakagawa, Masamoto Tago, Muneo Fukaishi, Takayasu Sakurai, Tadahiro Kuroda
2007 — conf
Multi-GB/s Transceivers.
ISSCC
Robert Payne, Muneo Fukaishi
2006 — conf
A 1Tb/s 3W inductive-coupling transceiver for inter-chip clock and data link.
ISSCC
Noriyuki Miura, Daisuke Mizoguchi, Mari Inoue, Kiichi Niitsu, Yoshihiro Nakagawa, Masamoto Tago, Muneo Fukaishi, Takayasu Sakurai, Tadahiro Kuroda
2006 J jnl
Channel-Count-Independent BIST for Multi-Channel SerDes.
IEICE Trans. Electron.
Kouichi Yamaguchi, Muneo Fukaishi
2006 — conf
Optical interconnect technologies for high-speed VLSI chips using silicon nano-photonics.
ISSCC
Keishi Ohashi, Junichi Fujikata, Masafumi Nakada, Tsutomu Ishi, Kenichi Nishi, Hirohito Yamada, Muneo Fukaishi, Masayuki Mizuno, Koichi Nose, Ichiro Ogura, Yutaka Urino, Toshio Baba
2003 J jnl
A 0.13-μm CMOS 5-Gb/s 10-m 28AWG cable transceiver with no-feedback-loop continuous-time post-equalizer.
IEEE J. Solid State Circuits
Yoshiharu Kudoh, Muneo Fukaishi, Masayuki Mizuno
2001 — conf
A 0.10 μm CMOS, 1.2 V, 2 GHz phase-locked loop with gain compensation VCO.
CICC
Koichiro Minami, Muneo Fukaishi, Masayuki Mizuno, Hideaki Onishi, Kenji Noda, Kiyotaka Imai, Tadahiko Horiuchi, Hiroshi Yamaguchi, Takanori Sato, Kazuyuki Nakamura, Masakazu Yaniashina
2001 J jnl
A 2.5-GHz four-phase clock generator with scalable no-feedback-loop architecture.
IEEE J. Solid State Circuits
Kouichi Yamaguchi, Muneo Fukaishi, Takehiko Sakamoto, Naoto Akiyama, Kazuyuki Nakamura
2001 — conf
Optical interconnection as an IP macro of a CMOS library.
Hot Interconnects
Takashi Yoshikawa, Ichiro Hatakeyama, Kazunori Miyoshi, Kazuhiko Kurata, Juni-Ichi Sasaki, Nobuharu Kami, Takara Sugimoto, Muneo Fukaishi, Kazuyuki Nakamura, Kei Tanaka, Hiroaki Nishi, Tomohiro Kudoh
2000 J jnl
A 20-Gb/s CMOS multichannel transmitter and receiver chip set for ultra-high-resolution digital displays.
IEEE J. Solid State Circuits
Muneo Fukaishi, Kazuyuki Nakamura, Hideki Heiuchi, Yoshinori Hirota, Yoetsu Nakazawa, Hidenori Ikeno, Hiroshi Hayama, Michio Yotsuyanagi
1999 J jnl
A 2.125-Gb/s BiCMOS fiber channel transmitter for serial data communications.
IEEE J. Solid State Circuits
Muneo Fukaishi, Satoshi Nakamura, Akio Tajima, Yasushi Kinoshita, Yoshihiko Suemura, Hisamitsu Suzuki, Toshiro Itani, Hidenobu Miyamoto, Naoya Henmi, Tohru Yamazaki, Michio Yotsuyanagi
1998 J jnl
A 150 mW 8: 1 MUX and a 170 mW 1: 8 DEMUX for 2.4 gb/s optical-fiber communication systems using n-AlGaAs/i-InGaAs HJFET's.
IEEE Trans. Very Large Scale Integr. Syst.
Masahiro Fujii, Keiichi Numata, Tadashi Maeda, Masatoshi Tokushima, Shigeki Wada, Muneo Fukaishi, Masaoki Ishikawa
1998 J jnl
A 4.25-Gb/s CMOS fiber channel transceiver with asynchronous tree-type demultiplexer and frequency conversion architecture.
IEEE J. Solid State Circuits
Muneo Fukaishi, Kazuyuki Nakamura, Masaharu Sato, Yutaka Tsutsui, Syuji Kishi, Michio Yotsuyanagi
1996 J jnl
A high-speed low-power tri-state driver flip flop for ultra-low supply voltage GaAs heterojunction FET LSI's.
IEEE J. Solid State Circuits
Tadashi Maeda, Keiichi Numata, Masatoshi Tokushima, Masaoki Ishikawa, Muneo Fukaishi, Hikam Hida, Yasuo Ohno
1996 J jnl
An ultra-low-power-consumption high-speed GaAs quasi-differential switch flip-flop (QD-FF).
IEEE J. Solid State Circuits
Tadashi Maeda, Keiichi Numata, Masahiro Fujii, Masatoshi Tokushima, Shigeki Wada, Muneo Fukaishi, Masaoki Ishikawa