Muhammad Hassan

34 papers A* 2A 8B 1C 7Journal 7Unranked 8
YearRankTypeTitle / Venue / Authors
2026 J jnl
veriSiM: Formal Verification of SPICE Netlists for MAGIC-Based Logic-in-Memory.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chandan Kumar Jha, Simranjeet Singh, Khushboo Qayyum, Ankit Bende, Muhammad Hassan, Vikas Rana, Farhad Merchant, Rolf Drechsler
2025 J jnl
Correct and Verify - CAV: Exploiting Binary Decision Diagrams to Enable Formal Verification of Approximate Adders With Correct Carry Bits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chandan Kumar Jha, Khushboo Qayyum, Muhammad Hassan, Rolf Drechsler
2025 — conf
Formal Verification of Error Bounds for Resistive-Switching-Based Multilevel Matrix-Vector Multipliers.
ISQED
Kemal Çaglar Coskun, Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
2025 J jnl
LLM-assisted Bug Identification and Correction for Verilog HDL.
ACM Trans. Design Autom. Electr. Syst.
Khushboo Qayyum, Chandan Kumar Jha, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler
2025 C conf
LLM-assisted Performance Estimation of Embedded Software on RISC-V Processors.
DDECS
Weiyan Zhang, Muhammad Hassan, Rolf Drechsler
2025 — conf
Prompt. Verify. Repeat. LLMs in the Hardware Verification Cycle.
COINS
Muhammad Hassan, Mohamed A. Nadeem, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler
2025 C conf
System-Level Design Space Exploration for Matrix Multiplication using Compute-In-Memory Unit.
FDL
Deepak Ravibabu, Sallar Ahmadi-Pour, Muhammad Hassan, Abhoy Kole, Chandan Kumar Jha, Rolf Drechsler
2024 A* conf
Efficient Equivalence Checking of Nonlinear Analog Circuits using Gradient Ascent.
DAC
Kemal Çaglar Coskun, Muhammad Hassan, Lars Hedrich, Rolf Drechsler
2024 — conf
Exploring the Potential of Decision Diagrams for Efficient In-Memory Design Verification.
ACM Great Lakes Symposium on VLSI
Khushboo Qayyum, Abhoy Kole, Kamalika Datta, Muhammad Hassan, Rolf Drechsler
2024 A conf
LLM-Guided Formal Verification Coupled with Mutation Testing.
DATE
Muhammad Hassan, Sallar Ahmadi-Pour, Khushboo Qayyum, Chandan Kumar Jha, Rolf Drechsler
2024 — conf
LLMs for Hardware Verification: Frameworks, Techniques, and Future Directions.
ATS
Khushboo Qayyum, Sallar Ahmadi-Pour, Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
2024 A* conf
Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification.
DAC
Khushboo Qayyum, Muhammad Hassan, Sallar Ahmadi-Pour, Chandan Kumar Jha, Rolf Drechsler
2024 J jnl
ReSG: A Data Structure for Verification of Majority-based In-memory Computing on ReRAM Crossbars.
ACM Trans. Embed. Comput. Syst.
Kousik Bhunia, Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
2024 B conf
Security Coverage Metrics for Information Flow at the System Level.
ASPDAC
Ece Nur Demirhan Coskun, Sallar Ahmadi-Pour, Muhammad Hassan, Rolf Drechsler
2024 J jnl
cecApprox: Enabling Automated Combinational Equivalence Checking for Approximate Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chandan Kumar Jha, Muhammad Hassan, Rolf Drechsler
2024 J jnl
veriSIMPLER: An Automated Formal Verification Methodology for SIMPLER MAGIC Design Style Based In-Memory Computing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chandan Kumar Jha, Khushboo Qayyum, Kemal Çaglar Coskun, Simranjeet Singh, Muhammad Hassan, Rainer Leupers, Farhad Merchant, Rolf Drechsler
2023 — conf
Automated Equivalence Checking Method for Majority Based In-Memory Computing on ReRAM Crossbars.
ASP-DAC
Arighna Deb, Kamalika Datta, Muhammad Hassan, Saeideh Shirinzadeh, Rolf Drechsler
2023 A conf
Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors.
DATE
Jens Trommer, Niladri Bhattacharjee, Thomas Mikolajick, Sebastian Huhn, Marcel Merten, Mohammed E. Djeridane, Muhammad Hassan, Rolf Drechsler, Shubham Rai, Nima Kavand, Armin Darjani, Akash Kumar, V. Sessi, M. Drescher, S. Kolodinski, M. Wiatr
2023 C conf
Efficient ML-Based Performance Estimation Approach Across Different Microarchitectures for RISC-V Processors.
DSD
Weiyan Zhang, Mehran Goli, Muhammad Hassan, Rolf Drechsler
2023 A conf
Equivalence Checking of System-Level and SPICE-Level Models of Static Nonlinear Circuits.
DATE
Kemal Çaglar Coskun, Muhammad Hassan, Rolf Drechsler
2023 C conf
Quality Assessment of Logic Locking Mechanisms using Pseudo-Boolean Optimization Techniques.
DDECS
Marcel Merten, Muhammad Hassan, Rolf Drechsler
2023 — conf
VAST: Validation of VP-based Heterogeneous Systems against Availability Security Properties using Static Information Flow Tracking.
ISQED
Ece Nur Demirhan Coskun, Muhammad Hassan, Mehran Goli, Rolf Drechsler
2022 C conf
Equivalence Checking of System-Level and SPICE-Level Models of Linear Analog Filters.
DDECS
Kemal Çaglar Coskun, Muhammad Hassan, Rolf Drechsler
2021 — —
Enhanced modern virtual prototype based verification flow for heterogeneous systems.
Muhammad Hassan
2021 A conf
System Level Verification of Phase-Locked Loop using Metamorphic Relations.
DATE
Muhammad Hassan, Daniel Große, Rolf Drechsler
2021 — conf
System-Level Verification of Linear and Non-Linear Behaviors of RF Amplifiers using Metamorphic Relations.
ASP-DAC
Muhammad Hassan, Daniel Große, Rolf Drechsler
2019 — conf
Automated Analysis of Virtual Prototypes at Electronic System Level.
ACM Great Lakes Symposium on VLSI
Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
2019 A conf
Data Flow Testing for SystemC-AMS Timed Data Flow Models.
DATE
Muhammad Hassan, Daniel Große, Hoang M. Le, Rolf Drechsler
2019 C conf
Functional Coverage-Driven Characterization of RF Amplifiers.
FDL
Muhammad Hassan, Daniel Große, Thilo Vörtler, Karsten Einwich, Rolf Drechsler
2019 J jnl
Security validation of VP-based SoCs using dynamic information flow tracking.
it Inf. Technol.
Mehran Goli, Muhammad Hassan, Daniel Große, Rolf Drechsler
2018 A conf
Testbench qualification for SystemC-AMS timed data flow models.
DATE
Muhammad Hassan, Daniel Große, Hoang M. Le, Thilo Vörtler, Karsten Einwich, Rolf Drechsler
2017 A conf
Data flow testing for virtual prototypes.
DATE
Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Mingsong Chen, Daniel Große, Rolf Drechsler
2017 A conf
Early SoC security validation by VP-based static information flow analysis.
ICCAD
Muhammad Hassan, Vladimir Herdt, Hoang M. Le, Daniel Große, Rolf Drechsler
2016 C conf
Guided lightweight Software test qualification for IP integration using Virtual Prototypes.
ICCD
Daniel Große, Hoang M. Le, Muhammad Hassan, Rolf Drechsler