| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2026 | J | jnl |
IEEE Trans. Circuits Syst. Artif. Intell.
|
| 2026 | J | jnl |
J. Signal Process. Syst.
|
| 2026 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2025 | — | conf |
ICECS
|
| 2024 | — | conf |
AICAS
|
| 2023 | — | conf |
ICECS
|
| 2023 | J | jnl |
Comput. Electr. Eng.
|
| 2023 | — | conf |
ICECS
|
| 2023 | J | jnl |
Comput. Electr. Eng.
|
| 2022 | — | conf |
ISC2
|
| 2022 | J | jnl |
IEEE Trans. Parallel Distributed Syst.
|
| 2022 | — | conf |
ICECS 2022
|
| 2022 | J | jnl |
IACR Trans. Cryptogr. Hardw. Embed. Syst.
|
| 2022 | — | conf |
ICECS 2022
|
| 2021 | J | jnl |
IEEE Internet Things J.
|
| 2021 | — | conf |
IDAACS
|
| 2021 | J | jnl |
IACR Cryptol. ePrint Arch.
|
| 2020 | C | conf |
ISCAS
|
| 2020 | C | conf |
ISCAS
|
| 2020 | J | jnl |
ACM Trans. Embed. Comput. Syst.
|
| 2020 | J | jnl |
ACM Trans. Embed. Comput. Syst.
|
| 2020 | J | jnl |
IEEE Trans. Circuits Syst.
|
| 2019 | J | jnl |
A framework for high-level simulation and optimization of fine-grained reconfigurable architectures.
Simul.
|
| 2019 | B | conf |
MASCOTS
|
| 2019 | J | jnl |
ACM Trans. Embed. Comput. Syst.
|
| 2019 | — | conf |
IDAACS
|
| 2019 | A | conf |
DATE
|
| 2019 | J | jnl |
CoRR
|
| 2019 | J | jnl |
Microprocess. Microsystems
|
| 2018 | — | conf |
WF-IoT
|
| 2018 | Misc | conf |
ICCS
|
| 2018 | — | conf |
IDAACS-SWS
|
| 2018 | — | conf |
WF-IoT
|
| 2017 | — | conf |
ARC
|
| 2017 | J | jnl |
Simul.
|
| 2017 | — | conf |
IDAACS
|
| 2017 | — | conf |
IDAACS
|
| 2017 | — | conf |
IDAACS
|
| 2017 | A* | conf |
DAC
|
| 2016 | — | conf |
IDAACS-SWS
|
| 2015 | — | conf |
DTIS
|
| 2015 | J | jnl |
Simul.
|
| 2015 | J | jnl |
ACM Comput. Surv.
|
| 2015 | Misc | conf |
FIT
|
| 2013 | C | conf |
DSD
|
| 2012 | J | jnl |
ACM Trans. Design Autom. Electr. Syst.
|
| 2010 | A* | conf |
DAC
|
| 2010 | C | conf |
DSD
|
| 2009 | C | conf |
ISCAS
|