Mufeng Zhou

13 papers Journal 9Unranked 4
YearRankTypeTitle / Venue / Authors
2025 — conf
DCiROM: A Fully Digital Compute-in-ROM Design Approach to High Energy Efficiency of DNN Inference at Task Level.
ASP-DAC
TianYi Yu, Tianyu Liao, Mufeng Zhou, Xiaotian Chu, Guodong Yin, Mingyen Lee, Yongpan Liu, Huazhong Yang, Xueqing Li
2025 J jnl
DCiROM: A High-Density Fully-Digital Compute-in-Read-Only-Memory Macro for Energy-Efficient Task-Level DNN Inference.
IEEE Trans. Circuits Syst. I Regul. Pap.
TianYi Yu, Tianyu Liao, Mufeng Zhou, Xiaotian Chu, Guodong Yin, Mingyen Lee, Yongpan Liu, Huazhong Yang, Xueqing Li
2025 J jnl
Hybrid SRAM/ROM Compute-in-Memory Architecture for High Task-Level Energy Efficiency in Transformer Models With 8928-kb/mm² Density in 28nm CMOS.
IEEE J. Solid State Circuits
Guodong Yin, Yiming Chen, Mingyen Lee, Xirui Du, Yue Ke, Wenjun Tang, Zhonghao Chen, Mufeng Zhou, Jinshan Yue, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li
2024 J jnl
A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture.
IEEE J. Solid State Circuits
Shengzhe Yan, Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
2024 — conf
A 28nm 166.9 TOPS/W x Mb/mm
A-SSCC
Ling-An Cheong, Chen Wang, Mufeng Zhou, Tianyu Liao, Mingyen Lee, Yue Ke, Wenjun Tang, Yiming Chen, Xirui Du, Yongpan Liu, Huazhong Yang, Xueqing Li
2024 — conf
A 28nm 8928Kb/mm
CICC
Guodong Yin, Yiming Chen, Mingyen Lee, Xirui Du, Yue Ke, Wenjun Tang, Zhonghao Chen, Mufeng Zhou, Jinshan Yue, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li
2024 J jnl
Cramming More Weight Data Onto Compute-in-Memory Macros for High Task-Level Energy Efficiency Using Custom ROM With 3984-kb/mm
IEEE J. Solid State Circuits
Guodong Yin, Yiming Chen, Mufeng Zhou, Wenjun Tang, Mingyen Lee, Zekun Yang, Tianyu Liao, Xirui Du, Vijaykrishnan Narayanan, Huazhong Yang, Hongyang Jia, Yongpan Liu, Xueqing Li
2024 J jnl
GRAPHIC: Gather and Process Harmoniously in the Cache With High Parallelism and Flexibility.
IEEE Trans. Emerg. Top. Comput.
Yiming Chen, Mingyen Lee, Guohao Dai, Mufeng Zhou, Nagadastagiri Challapalle, Tianyi Wang, Yao Yu, Yongpan Liu, Yu Wang, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li
2023 — conf
A 28nm 16.9-300TOPS/W Computing-in-Memory Processor Supporting Floating-Point NN Inference/Training with Intensive-CIM Sparse-Digital Architecture.
ISSCC
Jinshan Yue, Chaojie He, Zi Wang, Zhaori Cong, Yifan He, Mufeng Zhou, Wenyu Sun, Xueqing Li, Chunmeng Dou, Feng Zhang, Huazhong Yang, Yongpan Liu, Ming Liu
2023 J jnl
A Heterogeneous Microprocessor Based on All-Digital Compute-in-Memory for End-to-End AIoT Inference.
IEEE Trans. Circuits Syst. II Express Briefs
Songming Yu, Yifan He, Hongyang Jia, Wenyu Sun, Mufeng Zhou, Luchang Lei, Wentao Zhao, Guofu Ma, Huazhong Yang, Yongpan Liu
2023 J jnl
SAMBA: Single-ADC Multi-Bit Accumulation Compute-in-Memory Using Nonlinearity- Compensated Fully Parallel Analog Adder Tree.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yiming Chen, Guodong Yin, Mufeng Zhou, Wenjun Tang, Zekun Yang, Mingyen Lee, Xirui Du, Jinshan Yue, Jiaxin Liu, Huazhong Yang, Yongpan Liu, Xueqing Li
2022 J jnl
A 65nm 8b-Activation 8b-Weight SRAM-Based Charge-Domain Computing-in-Memory Macro Using A Fully-Parallel Analog Adder Network and A Single-ADC Interface.
CoRR
Guodong Yin, Mufeng Zhou, Yiming Chen, Wenjun Tang, Zekun Yang, Mingyen Lee, Xirui Du, Jinshan Yue, Jiaxin Liu, Huazhong Yang, Yongpan Liu, Xueqing Li
2022 J jnl
GRAPHIC: GatheR-And-Process in Highly parallel with In-SSD Compression Architecture in Very Large-Scale Graph.
CoRR
Yiming Chen, Guohao Dai, Mufeng Zhou, Mingyen Lee, Nagadastagiri Challapalle, Guodong Yin, Zekun Yang, Yongpan Liu, Huazhong Yang, Vijaykrishnan Narayanan, Xueqing Li