| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2026 | J | jnl |
Integr.
|
| 2025 | J | jnl |
CoRR
|
| 2024 | J | jnl |
Int. J. Data Min. Model. Manag.
|
| 2024 | — | conf |
ASCAT
|
| 2023 | J | jnl |
Int. J. Inf. Technol. Decis. Mak.
|
| 2023 | — | conf |
IC3I
|
| 2021 | J | jnl |
J. Circuits Syst. Comput.
|
| 2021 | J | jnl |
J. Circuits Syst. Comput.
|
| 2021 | J | jnl |
IET Circuits Devices Syst.
|
| 2020 | J | jnl |
Design of fault tolerant majority voter for error resilient TMR targeting micro to nano scale logic.
Int. J. Comput. Sci. Eng.
|
| 2020 | J | jnl |
IET Comput. Digit. Tech.
|
| 2019 | — | conf |
VDAT
|
| 2018 | — | conf |
VDAT
|
| 2017 | — | conf |
ISED
|
| 2017 | J | jnl |
CoRR
|
| 2017 | J | jnl |
Microelectron. J.
|
| 2017 | — | conf |
ISED
|
| 2017 | J | jnl |
CoRR
|
| 2016 | — | conf |
VDAT
|
| 2016 | — | conf |
ISED
|
| 2015 | J | jnl |
Comput. Electr. Eng.
|
| 2014 | J | jnl |
Microelectron. J.
|
| 2013 | — | conf |
ISED
|