Mozhgan Mansuri

35 papers Journal 16Unranked 19
YearRankTypeTitle / Venue / Authors
2026 J jnl
A 108 Gb/s PAM-4 VCSEL-Based Direct-Drive Optical Engine for Co-Packaged Optics Applications.
IEEE J. Solid State Circuits
Susnata Mondal, Sashank Krishnamurthy, Junyi Qiu, Tolga Acikalin, Soumya Bose, Shuhei Yamada, James E. Jaussi, Mozhgan Mansuri
2026 J jnl
A 4 × 50 Gb/s 2.9-pJ/b NRZ VCSEL-Based Co-Packaged Optical Link With Fiber Termination.
IEEE J. Solid State Circuits
Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Joseph T. Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James E. Jaussi, Mozhgan Mansuri
2026 J jnl
A 4-Ch × 64 Gb/s/Ch NRZ VCSEL-Based Co-Packaged Fiber-Terminated Optical TX and 80-Gb/s Optical Driver.
IEEE J. Solid State Circuits
Susnata Mondal, Junyi Qiu, Sashank Krishnamurthy, Joseph T. Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James E. Jaussi, Mozhgan Mansuri
2026 — conf
A 48Gb/s/lane 1.24Tb/s/mm UCIe-Compliant Die-to-Die Link Over 30mm Standard Package.
ISSCC
Susnata Mondal, Sashank Krishnamurthy, Shuhei Yamada, Zhaokai Liu, Junyi Qiu, Soumya Bose, Zuoguo Wu, Gerald Pasdast, James E. Jaussi, Mozhgan Mansuri
2026 J jnl
Modern Wireline Transceivers.
IEEE J. Solid State Circuits
Tony Chan Carusone, Timothy O. Dickson, Samuel Palermo, Sudip Shekhar, Mozhgan Mansuri
2025 — conf
A 0.9pJ/b 108Gb/s PAM-4 VCSEL-Based Direct-Drive Optical Engine.
ISSCC
Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Tolga Acikalin, Soumya Bose, Shuhei Yamada, James E. Jaussi, Mozhgan Mansuri
2024 — conf
18.2 A 4x64Gb/s NRZ 1.3pJ/b Co-Packaged and Fiber-Terminated 4-Ch VCSEL-Based Optical Transmitter.
ISSCC
Susnata Mondal, Junyi Qiu, Sashank Krishnamurthy, Joe Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James E. Jaussi, Mozhgan Mansuri
2024 — conf
A 4×50Gb/s NRZ 1.5pJ/b Co-Packaged and Fiber-Terminated 4-Channel Optical RX.
VLSI Technology and Circuits
Sashank Krishnamurthy, Susnata Mondal, Junyi Qiu, Joe Kennedy, Soumya Bose, Tolga Acikalin, Shuhei Yamada, James E. Jaussi, Mozhgan Mansuri
2022 J jnl
A Scalable 32-56 Gb/s 0.56-1.28 pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28-nm CMOS.
IEEE J. Solid State Circuits
Mozhgan Mansuri, Rajesh Inti, Joe Kennedy, Junyi Qiu, Chun-Ming Hsu, Jahnavi Sharma, Hao Li, Bryan Casper, James E. Jaussi
2021 — conf
A Scalable 32-to-56Gb/s 0.56-to-1.28pJ/b Voltage-Mode VCSEL-Based Optical Transmitter in 28nm CMOS.
CICC
Rajesh Inti, Mozhgan Mansuri, Joe Kennedy, Junyi Qiu, Chun-Ming Hsu, Jahnavi Sharma, Hao Li, Bryan Casper, James E. Jaussi
2018 — conf
A Digital-Intensive 2-to-9.2 GB/S/Pin Memory Controller I/O with Fast-Response LDO in 10NM CMOS.
VLSI Circuits
Rajesh Inti, Mozhgan Mansuri, Joe Kennedy, Hariprasath Venkatram, Chun-Ming Hsu, Aaron Martin, James E. Jaussi, Bryan Casper
2015 J jnl
An On-Die All-Digital Power Supply Noise Analyzer With Enhanced Spectrum Measurements.
IEEE J. Solid State Circuits
Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2014 — conf
26.2 A 205mW 32Gb/s 3-Tap FFE/6-tap DFE bidirectional serial link in 22nm CMOS.
ISSCC
James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Tawfiq Musah, Gökçe Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper
2014 — conf
26.4 A 25.6Gb/s differential and DDR4/GDDR5 dual-mode transmitter with digital clock calibration in 22nm CMOS.
ISSCC
Tzu-Chien Hsueh, Ganesh Balamurugan, James E. Jaussi, Sami Hyvonen, Joseph T. Kennedy, Gökçe Keskin, Tawfiq Musah, Sudip Shekhar, Rajesh Inti, Shreyas Sen, Mozhgan Mansuri, Clark Roberts, Bryan Casper
2014 J jnl
A 4-32 Gb/s Bidirectional Link With 3-Tap FFE/6-Tap DFE and Collaborative CDR in 22 nm CMOS.
IEEE J. Solid State Circuits
Tawfiq Musah, James E. Jaussi, Ganesh Balamurugan, Sami Hyvonen, Tzu-Chien Hsueh, Gokce Keskin, Sudip Shekhar, Joseph T. Kennedy, Shreyas Sen, Rajesh Inti, Mozhgan Mansuri, Michael Leddige, Bryce Horine, Clark Roberts, Randy Mooney, Bryan Casper
2014 — conf
An on-die all-digital power supply noise analyzer with enhanced spectrum measurements.
ESSCIRC
Tzu-Chien Hsueh, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2013 J jnl
A Scalable 0.128-1 Tb/s, 0.8-2.6 pJ/bit, 64-Lane Parallel I/O in 32-nm CMOS.
IEEE J. Solid State Circuits
Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
2013 — conf
A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS.
ISSCC
Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Tzu-Chien Hsueh, Sudip Shekhar, Ganesh Balamurugan, Frank O'Mahony, Clark Roberts, Randy Mooney, Bryan Casper
2013 — conf
Design considerations for low-power receiver front-end in high-speed data links.
CICC
Sudip Shekhar, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, Bryan Casper
2012 — conf
An on-die all-digital delay measurement circuit with 250fs accuracy.
VLSIC
Mozhgan Mansuri, Bryan Casper, Frank O'Mahony
2010 J jnl
A 47 , ˟, 10 Gb/s 1.4 mW/Gb/s Parallel Interface in 45 nm CMOS.
IEEE J. Solid State Circuits
Frank O'Mahony, James E. Jaussi, Joseph T. Kennedy, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper
2010 — conf
A 47×10Gb/s 1.4mW/(Gb/s) parallel interface in 45nm CMOS.
ISSCC
Frank O'Mahony, Joseph T. Kennedy, James E. Jaussi, Ganesh Balamurugan, Mozhgan Mansuri, Clark Roberts, Sudip Shekhar, Randy Mooney, Bryan Casper
2010 — conf
A 5-to-25Gb/s 1.6-to-3.8mW/(Gb/s) reconfigurable transceiver in 45nm CMOS.
ISSCC
Ganesh Balamurugan, Frank O'Mahony, Mozhgan Mansuri, James E. Jaussi, Joseph T. Kennedy, Bryan Casper
2009 J jnl
Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sudip Shekhar, Ganesh Balamurugan, David J. Allstot, Mozhgan Mansuri, James E. Jaussi, Randy Mooney, Joseph T. Kennedy, Bryan Casper, Frank O'Mahony
2008 — conf
A 27Gb/s Forwarded-Clock I/O Receiver Using an Injection-Locked LC-DCO in 45nm CMOS.
ISSCC
Frank O'Mahony, Sudip Shekhar, Mozhgan Mansuri, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Bryan Casper, David J. Allstot, Randy Mooney
2008 J jnl
A Scalable 5-15 Gbps, 14-75 mW Low-Power I/O Transceiver in 65 nm CMOS.
IEEE J. Solid State Circuits
Ganesh Balamurugan, Joseph T. Kennedy, Gaurab Banerjee, James E. Jaussi, Mozhgan Mansuri, Frank O'Mahony, Bryan Casper, Randy Mooney
2008 — conf
Strong injection locking of low-Q LC oscillators.
CICC
Mozhgan Mansuri, Frank O'Mahony, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Sudip Shekhar, Randy Mooney, Bryan Casper
2007 — conf
Future Microprocessor Interfaces: Analysis, Design and Optimization.
CICC
Bryan Casper, Ganesh Balamurugan, James E. Jaussi, Joseph T. Kennedy, Mozhgan Mansuri
2006 — conf
A 20Gb/s Embedded Clock Transceiver in 90nm CMOS.
ISSCC
Bryan Casper, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, K. Canagasaby, Joe Kennedy, Randy Mooney
2006 — conf
A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B.
ISSCC
Bryan Casper, James E. Jaussi, Frank O'Mahony, Mozhgan Mansuri, K. Canagasaby, Joseph T. Kennedy, E. Yeung, Randy Mooney
2004 J jnl
A 27-mW 3.6-gb/s I/O transceiver.
IEEE J. Solid State Circuits
Jackie Koon Lun Wong, Hamid Hatamkhani, Mozhgan Mansuri, Chih-Kong Ken Yang
2003 J jnl
A low-power adaptive bandwidth PLL and clock buffer with supply-noise compensation.
IEEE J. Solid State Circuits
Mozhgan Mansuri, Chih-Kong Ken Yang
2003 J jnl
Methodology for on-chip adaptive jitter minimization in phase-locked loops.
IEEE Trans. Circuits Syst. II Express Briefs
Mozhgan Mansuri, A. Hadiashar, Chih-Kong Ken Yang
2002 J jnl
Fast frequency acquisition phase-frequency detectors for Gsamples/s phase-locked loops.
IEEE J. Solid State Circuits
Mozhgan Mansuri, Dean Liu, Chih-Kong Ken Yang
2002 J jnl
Jitter optimization based on phase-locked loop design parameters.
IEEE J. Solid State Circuits
Mozhgan Mansuri, Chih-Kong Ken Yang