Morteza S. Alavi

29 papers C 3Journal 13Unranked 13

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A Millimeter-Wave Power Amplifier With an Integrated CMOS Isolator/Circulator/Receiver. IEEE J. Solid State Circuits Masoud Pashaeifar, Leo C. N. de Vreede, Morteza S. Alavi
2025	—	`conf`	5.8 A 20W CMOS/LDMOS All-Digital Transmitter with Dynamic Retiming and Glitch-Free Phase Mapper, Achieving 68%/62% Peak Drain/System Efficiency. ISSCC Dieuwert Peter Nicolaas Mul, Rob Bootsman, Mohammadreza Beikmirza, Ossama El Boustani, Yiyu Shen, Daniel Maassen, Bart van Velzen, Mohadig Rousstia, Ronald Koster, John R. Gajadharsing, Thomas Fritzsch, Morteza S. Alavi, Leo C. N. de Vreede
2024	—	`conf`	32.7 A 25.2dBm PSAT, 35-to-43GHz VSWR-Resilient Chain-Weaver Eight-Way Balanced PA with an Embedded Impedance/Power Sensor. ISSCC Masoud Pashaeifar, Anil Kumar Kumaran, Leo C. N. de Vreede, Morteza S. Alavi
2024	J	`jnl`	A Chain-Weaver Balanced Power Amplifier With an Embedded Impedance/Power Sensor. IEEE J. Solid State Circuits Masoud Pashaeifar, Anil Kumar Kumaran, Leo C. N. de Vreede, Morteza S. Alavi
2024	J	`jnl`	MP-DPD: Low-Complexity Mixed-Precision Neural Networks for Energy-Efficient Digital Predistortion of Wideband Power Amplifiers. CoRR Yizhuo Wu, Ang Li, Mohammadreza Beikmirza, Gagan Deep Singh, Qinyu Chen, Leo C. N. de Vreede, Morteza S. Alavi, Chang Gao
2024	C	`conf`	OpenDPD: An Open-Source End-to-End Learning & Benchmarking Framework for Wideband Power Amplifier Modeling and Digital Pre-Distortion. ISCAS Yizhuo Wu, Gagan Deep Singh, Mohammadreza Beikmirza, Leo C. N. de Vreede, Morteza S. Alavi, Chang Gao
2024	J	`jnl`	OpenDPD: An Open-Source End-to-End Learning & Benchmarking Framework for Wideband Power Amplifier Modeling and Digital Pre-Distortion. CoRR Yizhuo Wu, Gagan Deep Singh, Mohammadreza Beikmirza, Leo C. N. de Vreede, Morteza S. Alavi, Chang Gao
2023	J	`jnl`	A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit. IEEE J. Solid State Circuits Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Morteza S. Alavi, Robert Bogdan Staszewski, Masoud Babaie
2023	J	`jnl`	A Wideband Digital-Intensive Current-Mode Transmitter Line-Up. IEEE J. Solid State Circuits Yiyu Shen, Martijn Hoogelander, Rob Bootsman, Morteza S. Alavi, Leo C. N. de Vreede
2023	J	`jnl`	A Wideband Energy-Efficient Multi-Mode CMOS Digital Transmitter. IEEE J. Solid State Circuits Mohammadreza Beikmirza, Yiyu Shen, Leo C. N. de Vreede, Morteza S. Alavi
2022	—	`conf`	A 1-to-4GHz Multi-Mode Digital Transmitter in 40nm CMOS Supporting 200MHz 1024-QAM OFDM signals with more than 23dBm/66% Peak Power/Drain Efficiency. CICC Mohammadreza Beikmirza, Yiyu Shen, Leo C. N. de Vreede, Morteza S. Alavi
2022	—	`conf`	A 1.66Gb/s and 5.8pJ/b Transcutaneous IR-UWB Telemetry System with Hybrid Impulse Modulation for Intracortical Brain-Computer Interfaces. ISSCC Minyoung Song, Yu Huang, Yiyu Shen, Chengyao Shi, Arjan Breeschoten, Mario Konijnenburg, Huib Visser, Jac Romme, Barundeb Dutta, Morteza S. Alavi, Christian Bachmann, Yao-Hong Liu
2022	—	`conf`	A 2.6-to-4.1GHz Fractional-N Digital PLL Based on a Time-Mode Arithmetic Unit Achieving -249.4dB FoM and -59dBc Fractional Spurs. ISSCC Zhong Gao, Jingchu He, Martin Fritz, Jiang Gong, Yiyu Shen, Zhirui Zong, Peng Chen, Gerd Spalink, Ben Eitel, Ken Yamamoto, Robert Bogdan Staszewski, Morteza S. Alavi, Masoud Babaie
2022	—	`conf`	A DPLL-Based Phase Modulator Achieving -46dB EVM with A Fast Two-Step DCO Nonlinearity Calibration and Non-Uniform Clock Compensation. VLSI Technology and Circuits Zhong Gao, Martin Fritz, Jingchu He, Gerd Spalink, Robert Bogdan Staszewski, Morteza S. Alavi, Masoud Babaie
2022	J	`jnl`	A Millimeter-Wave CMOS Series-Doherty Power Amplifier With Post-Silicon Inter-Stage Passive Validation. IEEE J. Solid State Circuits Masoud Pashaeifar, Leo C. N. de Vreede, Morteza S. Alavi
2022	J	`jnl`	A Wideband IQ-Mapping Direct-Digital RF Modulator for 5G Transmitters. IEEE J. Solid State Circuits Yiyu Shen, Rob Bootsman, Morteza S. Alavi, Leo C. N. de Vreede
2022	C	`conf`	Compact N-Way Doherty Power Combiners for mm-wave 5G Transmitters. ISCAS Anil Kumar Kumaran, Hossein Mashad Nemati, Leo C. N. de Vreede, Morteza S. Alavi
2021	—	`conf`	6.2 A 4-Way Doherty Digital Transmitter Featuring 50%-LO Signed IQ Interleave Upconversion with more than 27dBm Peak Power and 40% Drain Efficiency at 10dB Power Back-Off Operating in the 5GHz Band. ISSCC Mohammadreza Beikmirza, Yiyu Shen, Mohammadreza Mehrpoo, Mohsen Hashemi, Dieuwert P. N. Mul, Leo C. N. de Vreede, Morteza S. Alavi
2021	—	`conf`	A 24-to-30GHz Double-Quadrature Direct-Upconversion Transmitter with Mutual-Coupling-Resilient Series-Doherty Balanced PA for 5G MIMO Arrays. ISSCC Masoud Pashaeifar, Leo C. N. de Vreede, Morteza S. Alavi
2021	—	`conf`	A 24-to-32GHz series-Doherty PA with two-step impedance inverting power combiner achieving 20.4dBm Psat and 38%/34% PAE at Psat/6dB PBO for 5G applications. A-SSCC Masoud Pashaeifar, Anil Kumar Kumaran, Mohammadreza Beikmirza, Leo C. N. de Vreede, Morteza S. Alavi
2021	J	`jnl`	A Millimeter-Wave Mutual-Coupling-Resilient Double-Quadrature Transmitter for 5G Applications. IEEE J. Solid State Circuits Masoud Pashaeifar, Leo C. N. de Vreede, Morteza S. Alavi
2021	—	`conf`	A Versatile and Efficient 0.1-to-11 Gb/s CML Transmitter in 40-nm CMOS. ISOCC Jun Feng, Mohammadreza Beikmirza, Mohammadreza Mehrpoo, Leo C. N. de Vreede, Morteza S. Alavi
2021	J	`jnl`	A Wideband Four-Way Doherty Bits-In RF-Out CMOS Transmitter. IEEE J. Solid State Circuits Mohammadreza Beikmirza, Yiyu Shen, Leo C. N. de Vreede, Morteza S. Alavi
2021	C	`conf`	On-Chip Output Stage Design for a Continuous Class-F Power Amplifier. ISCAS Anil Kumar Kumaran, Masoud Pashaeifar, Marco D'Avino, Leo C. N. de Vreede, Morteza S. Alavi
2020	—	`conf`	A 0.5-3 GHz I/Q Interleaved Direct-Digital RF Modulator with up to 320 MHz Modulation Bandwidth in 40 nm CMOS. CICC Yiyu Shen, Rob Bootsman, Morteza S. Alavi, Leonardus de Vreede
2018	J	`jnl`	A Wideband Linear I/Q-Interleaving DDRM. IEEE J. Solid State Circuits Mohammadreza Mehrpoo, Mohsen Hashemi, Yiyu Shen, Leo C. N. de Vreede, Morteza S. Alavi
2017	—	`conf`	17.5 An intrinsically linear wideband digital polar PA featuring AM-AM and AM-PM corrections through nonlinear sizing, overdrive-voltage control, and multiphase RF clocking. ISSCC Mohsen Hashemi, Yiyu Shen, Mohammadreza Mehrpoo, Mustafa Acar, Rene van Leuken, Morteza S. Alavi, Leonardus de Vreede
2017	J	`jnl`	An Intrinsically Linear Wideband Polar Digital Power Amplifier. IEEE J. Solid State Circuits Mohsen Hashemi, Yiyu Shen, Mohammadreza Mehrpoo, Morteza S. Alavi, Leo C. N. de Vreede
2011	—	`conf`	A 2-GHz digital I/Q modulator in 65-nm CMOS. A-SSCC Morteza S. Alavi, Akshay Visweswaran, Robert Bogdan Staszewski, Leo C. N. de Vreede, John R. Long, Atef Akhnoukh