Mohsen Hassanpourghadi

19 papers A* 1A 3C 1Journal 8Unranked 6
YearRankTypeTitle / Venue / Authors
2024 — conf
18.4 A 200GS/s 8b 20fJ/c-s Receiver with >60GHz AFE Bandwidth for 800Gb/s Optical Coherent Communications in 5nm FinFET.
ISSCC
R. L. Nguyen, A. Mellati, A. Fernandez, A. Iyer, A. Fan, Benjamín T. Reyes, Cindra Abidin, Claudio Nani, D. Albano, F. Ahmad, Fredy Solis, Gabriele Minoia, Geoff Hatcher, M. Bachu, Marco Garampazzi, Mohsen Hassanpourghadi, N. Fan, P. Prabha, S. Fan, S. Ho, T. Dusatko, Tzu-Fan Wu, W. Elsharkasy, Z. Sun, S. Jantzi, L. Tse
2024 A conf
A Novel Multi-Objective Optimization Framework for Analog Circuit Customization.
DATE
Mutian Zhu, Mohsen Hassanpourghadi, Qiaochu Zhang, Mike Shuo-Wei Chen, Anthony F. J. Levi, Sandeep Gupta
2022 J jnl
A 10-GS/s 8-bit 2850-μm
IEEE J. Solid State Circuits
Juzheng Liu, Mohsen Hassanpourghadi, Mike Shuo-Wei Chen
2022 — conf
A 10GS/s 8b 25fJ/c-s 2850um
ISSCC
Juzheng Liu, Mohsen Hassanpourghadi, Mike Shuo-Wei Chen
2022 — conf
Analog/Mixed-Signal Circuit Synthesis Enabled by the Advancements of Circuit Architectures and Machine Learning Algorithms.
ASP-DAC
Shiyu Su, Qiaochu Zhang, Mohsen Hassanpourghadi, Juzheng Liu, Rezwan A. Rasul, Mike Shuo-Wei Chen
2022 — conf
TAFA: Design Automation of Analog Mixed-Signal FIR Filters Using Time Approximation Architecture.
ASP-DAC
Shiyu Su, Qiaochu Zhang, Juzheng Liu, Mohsen Hassanpourghadi, Rezwan A. Rasul, Mike Shuo-Wei Chen
2021 J jnl
A Module-Linking Graph Assisted Hybrid Optimization Framework for Custom Analog and Mixed-Signal Circuit Parameter Synthesis.
ACM Trans. Design Autom. Electr. Syst.
Mohsen Hassanpourghadi, Rezwan A. Rasul, Mike Shuo-Wei Chen
2021 J jnl
Analog/Mixed-Signal Circuit Synthesis Enabled by the Advancements of Circuit Architectures and Machine Learning Algorithms.
CoRR
Shiyu Su, Qiaochu Zhang, Mohsen Hassanpourghadi, Juzheng Liu, Rezwan A. Rasul, Mike Shuo-Wei Chen
2021 A* conf
Circuit Connectivity Inspired Neural Network for Analog Mixed-Signal Functional Modeling.
DAC
Mohsen Hassanpourghadi, Shiyu Su, Rezwan A. Rasul, Juzheng Liu, Qiaochu Zhang, Mike Shuo-Wei Chen
2021 A conf
From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning.
ICCAD
Juzheng Liu, Shiyu Su, Meghna Madhusudan, Mohsen Hassanpourghadi, Samuel Saunders, Qiaochu Zhang, Rezwan A. Rasul, Yaguang Li, Jiang Hu, Arvind Kumar Sharma, Sachin S. Sapatnekar, Ramesh Harjani, Anthony Levi, Sandeep Gupta, Mike Shuo-Wei Chen
2021 J jnl
TAFA: Design Automation of Analog Mixed-Signal FIR Filters Using Time Approximation Architecture.
CoRR
Shiyu Su, Qiaochu Zhang, Juzheng Liu, Mohsen Hassanpourghadi, Rezwan A. Rasul, Mike Shuo-Wei Chen
2020 A conf
Transfer Learning with Bayesian Optimization-Aided Sampling for Efficient AMS Circuit Modeling.
ICCAD
Juzheng Liu, Mohsen Hassanpourghadi, Qiaochu Zhang, Shiyu Su, Mike Shuo-Wei Chen
2019 — conf
A 2-way 7.3-bit 10 GS/s Time-based Folding ADC with Passive Pulse-Shrinking Cells.
CICC
Mohsen Hassanpourghadi, Mike Shuo-Wei Chen
2018 J jnl
A 12-Bit 1.6, 3.2, and 6.4 GS/s 4-b/Cycle Time-Interleaved SAR ADC With Dual Reference Shifting and Interpolation.
IEEE J. Solid State Circuits
Jae-Won Nam, Mohsen Hassanpourghadi, Aoyang Zhang, Mike Shuo-Wei Chen
2017 J jnl
A 6-b, 800-MS/s, 3.62-mW Nyquist Rate AC-Coupled VCO-Based ADC in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mohsen Hassanpourghadi, Praveen Kumar Sharma, Mike Shuo-Wei Chen
2016 — conf
A 12-bit 1.6 GS/s interleaved SAR ADC with dual reference shifting and interpolation achieving 17.8 fJ/conv-step in 65nm CMOS.
VLSI Circuits
Jae-Won Nam, Mohsen Hassanpourghadi, Aoyang Zhang, Mike Shuo-Wei Chen
2014 J jnl
A low-power low-offset dynamic comparator for analog to digital converters.
Microelectron. J.
Mohsen Hassanpourghadi, Milad Zamani, Mohammad Sharifkhani
2013 J jnl
Fast Static Characterization of Residual-Based ADCs.
IEEE Trans. Circuits Syst. II Express Briefs
Mohsen Hassanpourghadi, Mohammad Sharifkhani
2013 C conf
Step response analysis of third order OpAmps With slew-rate.
VLSI-SoC
Mohsen Hassanpourghadi, Mohammad Sharifkhani