Mohammad Taherzadeh-Sani

44 papers A 5C 5Journal 20Unranked 14

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	A Compact Wideband Two-Stage LNA with Multiple Notches for Out-of-Band Filtering Using Center-Tap Inductors. Circuits Syst. Signal Process. Maryam Ghamati, Mohammad Taherzadeh-Sani, Frederic Nabki
2023	J	`jnl`	An Energy Efficient Coherent IR-UWB Receiver With Non-Coherent-Assisted Synchronization. IEEE Trans. Circuits Syst. I Regul. Pap. Amin Pourvali Kakhki, Mohammad Taherzadeh-Sani, Frederic Nabki
2023	J	`jnl`	Integrated Fast UWB Time-Domain Microwave Breast Screening. IEEE Trans. Instrum. Meas. Maryam Ghamati, Mohammad Taherzadeh-Sani, Frederic Nabki, Milica Popovic
2021	J	`jnl`	A 22-Gb/s Time-Interleaved Low-Power Optical Receiver With a Two-Bit Integrating Front End. IEEE J. Solid State Circuits Bahaa Radi, Mohammadreza Sanadgol Nezami, Mohammad Taherzadeh-Sani, Frederic Nabki, Michaël Ménard, Odile Liboiron-Ladouceur
2020	J	`jnl`	A 17 Gbps 156 fJ/bit Two-Channel Optical Receiver With Optical-Input Split and Delay in 65 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Mohammad Taherzadeh-Sani, Bahaa Radi, Mohammadreza Sanadgol Nezami, Michaël Ménard, Odile Liboiron-Ladouceur, Frederic Nabki
2020	C	`conf`	A Low-Power 10 to 15 Gb/s Common-Gate CTLE Based on Optimized Active Inductors. VLSI-SOC Amin Aghighi, Armin Tajalli, Mohammad Taherzadeh-Sani
2020	J	`jnl`	A Low-Voltage High-Precision Time-Domain Winner-Take-All Circuit. IEEE Trans. Circuits Syst. II Express Briefs Ehsan Rahiminejad, Mehdi Saberi, Reza Lotfi, Mohammad Taherzadeh-Sani, Frederic Nabki
2019	J	`jnl`	An Algebraic Approach to Fast Estimation of the Threshold Voltage of Junctionless Double Gate MOSFETs Using the Gram Schmidt Method. CoRR Mohsen Annabestani, Mahshid Nasserian, Fatemeh Hasanzadeh, Mohammad Taherzadeh-Sani, Alireza Hassanzadeh
2019	J	`jnl`	An Analog LO Harmonic Suppression Technique for SDR Receivers. IEEE Trans. Very Large Scale Integr. Syst. Amir Bazrafshan, Mohammad Taherzadeh-Sani, Frederic Nabki
2018	J	`jnl`	A 0.8-4-GHz Software-Defined Radio Receiver With Improved Harmonic Rejection Through Non-Overlapped Clocking. IEEE Trans. Circuits Syst. I Regul. Pap. Amir Bazrafshan, Mohammad Taherzadeh-Sani, Frederic Nabki
2018	J	`jnl`	Envelope-tracking common-drain CMOS power amplifier with a switching-only supply modulator for LTE applications. Microelectron. J. Mohammad Javad Zavarei, Mohammad Taherzadeh-Sani
2017	J	`jnl`	65 nm CMOS switching discontinuous-conduction mode buck converter with 330 ns start-up time for light-load power-cycled applications. IET Circuits Devices Syst. Mohammad Taherzadeh-Sani, Michiel Soer, Dominic Deslandes, Frederic Nabki
2017	J	`jnl`	A 170-dB Ω CMOS TIA With 52-pA Input-Referred Noise and 1-MHz Bandwidth for Very Low Current Sensing. IEEE Trans. Very Large Scale Integr. Syst. Mohammad Taherzadeh-Sani, Said M. Hussain Hussaini, Hamidreza Rezaee-Dehsorkh, Frederic Nabki, Mohamad Sawan
2017	C	`conf`	A calibration-free 13-bit 0.9 V differential SAR-ADC with hybrid DAC and dithering. ISCAS Quentin Sauve, Damien Favre, Gabriel Morin-Laporte, Mohammad Taherzadeh-Sani, Nicolas Constantin, Frederic Nabki
2016	—	`conf`	A 10-Gb/s low-power low-voltage CTLE using gate and bulk driven transistors. ICECS Amin Aghighi, Abdul Hafiz Alameh, Mohammad Taherzadeh-Sani, Frederic Nabki
2016	—	`conf`	A 27 mV output ripple 92% efficiency buck converter using a multi-bit delta-sigma modulator controller and segmented output switch in 180 nm CMOS. ICECS Saeed Mehrjoo, Mohammad Taherzadeh-Sani, Frederic Nabki
2016	—	`conf`	Single-ended impedance-modulation equalization for low-power differential voltage-mode drivers. ICECS Ali Badiey, Reza Papi, Navid Rahmanikia, Mohammad Taherzadeh-Sani, Frederic Nabki
2015	C	`conf`	A 1-V 690 μW 8-bit 200 MS/s flash-SAR ADC with pipelined operation of flash and SAR ADCs in 0.13μm CMOS. ISCAS Monireh Eslami, Mohammad Taherzadeh-Sani, Frederic Nabki
2015	J	`jnl`	A 350-MS/s Continuous-Time Delta-Sigma Modulator With a Digitally Assisted Binary-DAC and a 5-Bits Two-Step-ADC Quantizer in 130-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. Mohammad Taherzadeh-Sani, Frederic Nabki
2015	—	`conf`	Low-energy CMOS common-drain power amplifier for short-range applications. NEWCAS Parvaneh Saffari, Mohammad Taherzadeh-Sani, Ali Basaligheh, Frederic Nabki, Mohamad Sawan
2014	J	`jnl`	A 10-bit 110 kS/s 1.16 µW SA-ADC With a Hybrid Differential/Single-Ended DAC in 180-nm CMOS for Multichannel Biomedical Applications. IEEE Trans. Circuits Syst. II Express Briefs Mohammad Taherzadeh-Sani, Reza Lotfi, Frederic Nabki
2013	J	`jnl`	A Reconfigurable and Power-Scalable 10-12 Bit 0.4-44 MS/s Pipelined ADC With 0.35-0.5 pJ/Step in 1.2 V 90 nm Digital CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Mohammad Taherzadeh-Sani, Anas A. Hamoui
2012	J	`jnl`	Correction to "A 1-V Process-Insensitive Current-Scalable Two-Stage Opamp With Enhanced DC Gain and Settling Behavior in 65-nm Digital CMOS" [Mar 11 660-668]. IEEE J. Solid State Circuits Mohammad Taherzadeh-Sani, Anas A. Hamoui
2011	J	`jnl`	A 1-V Process-Insensitive Current-Scalable Two-Stage Opamp With Enhanced DC Gain and Settling Behavior in 65-nm Digital CMOS. IEEE J. Solid State Circuits Mohammad Taherzadeh-Sani, Anas A. Hamoui
2010	—	`conf`	A reconfigurable 10-12b 0.4-44MS/s pipelined ADC with 0.35-0.5pJ/step in 1.2V 90nm digital CMOS. ESSCIRC Mohammad Taherzadeh-Sani, Anas A. Hamoui
2010	J	`jnl`	Area and Power Optimization of High-Order Gain Calibration in Digitally-Enhanced Pipelined ADCs. IEEE Trans. Very Large Scale Integr. Syst. Mohammad Taherzadeh-Sani, Anas A. Hamoui
2007	—	`conf`	Power Optimization of Pipelined ADCs with High-Order Digital Gain Calibration. ICECS Mohammad Taherzadeh-Sani, Anas A. Hamoui
2006	C	`conf`	Analysis of dynamic element matching (DEM) in pipelined ADCs. ISCAS Mohammad Taherzadeh-Sani, Anas A. Hamoui
2006	A	`conf`	Behavioral modeling of Opamp gain and dynamic effectsfor power optimization of Delta-Sigma modulators and pipelined ADCs. ISLPED Anas A. Hamoui, T. Alhajj, Mohammad Taherzadeh-Sani
2006	J	`jnl`	Digital Background Calibration of Capacitor-Mismatch Errors in Pipelined ADCs. IEEE Trans. Circuits Syst. II Express Briefs Mohammad Taherzadeh-Sani, Anas A. Hamoui
2006	C	`conf`	Digital background calibration of interstage-gain and capacitor-mismatch errors in pipelined ADCs. ISCAS Mohammad Taherzadeh-Sani, Anas A. Hamoui
2005	—	`conf`	Modeling of MOS transistors based on genetic algorithm and simulated annealing. ISCAS (6) Mohammad Taherzadeh-Sani, Ali Abbasian, Behnam Amelifard, Ali Afzali-Kusha
2005	—	`conf`	Power consumption issues in high-speed high-resolution pipelined A/D converters. ISCAS (5) Reza Lotfi, Mohammad Taherzadeh-Sani, Omid Shoaei
2004	—	`conf`	A 12-bit 40MSPS 3.3-V 56-mW pipelined A/D convereter in 0.25-µm CMOS [convereter read converter]. ISCAS (1) Reza Lotfi, Mohammad Taherzadeh-Sani, Omid Shoaei
2004	—	`conf`	A pseudo-class-AB telescopic-cascode operational amplifier. ISCAS (1) Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei
2004	A	`conf`	Systematic Design for Optimization of High-Resolution Pipelined ADCs. DATE Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei
2003	—	`conf`	A 1.5-V 12-bit 75M-samples/s fully-differential low-power sample-and-hold amplifier in 0.25-μm CMOS. ICECS Reza Lotfi, Mohammad Taherzadeh-Sani, Omid Shoaei
2003	A	`conf`	A Statistical Approach to Estimate the Dynamic Non-Linearity Parameters of Pipeline ADCs. ICCAD Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei
2003	A	`conf`	A low-power design methodology for high-resolution pipelined analog-to-digital converters. ISLPED Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei
2003	—	`conf`	A novel frequency compensation technique for two-stage CMOS operational amplifiers. ICECS Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei
2003	—	`conf`	An analytical approach to the estimation of dynamic non-linearity parameters in pipeline A/D converters. ESSCIRC Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei
2003	—	`conf`	An analytical approach to the estimation of the spurious-free dynamic range in pipeline A/D converters. ICECS Mohammad Taherzadeh-Sani, Reza Lotfi, Omid Shoaei
2003	J	`jnl`	Low-power design techniques for low-voltage fast-settling operational amplifiers in switched-capacitor applications. Integr. Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei
2003	A	`conf`	Systematic Design for Power Minimization of Pipelined Analog-to-Digital Converters. ICCAD Reza Lotfi, Mohammad Taherzadeh-Sani, M. Yaser Azizi, Omid Shoaei