Mohammad Saeed Ansari

17 papers A 1Journal 10Unranked 6
YearRankTypeTitle / Venue / Authors
2024 — conf
Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators.
ISQED
Mahdi Taheri, Natalia Cherezova, Mohammad Saeed Ansari, Maksim Jenihhin, Ali Mahani, Masoud Daneshtalab, Jaan Raik
2024 J jnl
Exploration of Activation Fault Reliability in Quantized Systolic Array-Based DNN Accelerators.
CoRR
Mahdi Taheri, Natalia Cherezova, Mohammad Saeed Ansari, Maksim Jenihhin, Ali Mahani, Masoud Daneshtalab, Jaan Raik
2022 J jnl
Low-Power Approximate Logarithmic Squaring Circuit Design for DSP Applications.
IEEE Trans. Emerg. Top. Comput.
Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han
2021 — conf
A Logarithmic Floating-Point Multiplier for the Efficient Training of Neural Networks.
ACM Great Lakes Symposium on VLSI
Zijing Niu, Honglan Jiang, Mohammad Saeed Ansari, Bruce F. Cockburn, Leibo Liu, Jie Han
2021 J jnl
An Improved Logarithmic Multiplier for Energy-Efficient Neural Computing.
IEEE Trans. Computers
Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han
2021 J jnl
Fast and low-power leading-one detectors for energy-efficient logarithmic computing.
IET Comput. Digit. Tech.
Mohammad Saeed Ansari, Shyama Gandhi, Bruce F. Cockburn, Jie Han
2021 J jnl
Hardware acceleration of the novel two dimensional Burrows-Wheeler Aligner algorithm with maximal exact matches seed extension kernel.
IET Circuits Devices Syst.
Mahdi Taheri, Mohammad Saeed Ansari, Sebastian Magierowski, Ali Mahani
2021 J jnl
Strengthened 32-bit AES implementation: Architectural error correction configuration with a new voting scheme.
IET Comput. Digit. Tech.
Saeideh Sheikhpour, Mahdi Taheri, Mohammad Saeed Ansari, Ali Mahani
2020 J jnl
DMR-based Technique for Fault Tolerant AES S-box Architecture.
CoRR
Mahdi Taheri, Saeide Sheikhpour, Mohammad Saeed Ansari, Ali Mahani
2020 J jnl
Improving the Accuracy and Hardware Efficiency of Neural Networks Using Approximate Multipliers.
IEEE Trans. Very Large Scale Integr. Syst.
Mohammad Saeed Ansari, Vojtech Mrazek, Bruce F. Cockburn, Lukás Sekanina, Zdenek Vasícek, Jie Han
2019 A conf
A Hardware-Efficient Logarithmic Multiplier with Improved Accuracy.
DATE
Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han
2019 — conf
Approximate Leading One Detector Design for a Hardware-Efficient Mitchell Multiplier.
CCECE
Shyama Gandhi, Mohammad Saeed Ansari, Bruce F. Cockburn, Jie Han
2019 — conf
Characterizing Approximate Adders and Multipliers Optimized under Different Design Constraints.
ACM Great Lakes Symposium on VLSI
Honglan Jiang, Francisco J. H. Santiago, Mohammad Saeed Ansari, Leibo Liu, Bruce F. Cockburn, Fabrizio Lombardi, Jie Han
2018 J jnl
Low-Power Approximate Multipliers Using Encoded Partial Products and Approximate Compressors.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Mohammad Saeed Ansari, Honglan Jiang, Bruce F. Cockburn, Jie Han
2016 — conf
A novel gate grading approach for soft error tolerance in combinational circuits.
CCECE
Mohammad Saeed Ansari, Ali Mahani, Jie Han, Bruce F. Cockburn
2013 J jnl
Energy-efficient network design via modelling: optimal designing point for energy, reliability, coverage and end-to-end delay.
IET Networks
Mohammad Saeed Ansari, Ali Mahani, Yousef Seifi Kavian
2012 — conf
Reliability or performance: A tradeoff in wireless sensor networks.
CSNDSP
Ali Mahani, Mohammad Saeed Ansari, Yousef Seifi Kavian