Mohammad Mortazavi

16 papers A* 2A 1C 1Journal 4Unranked 8
YearRankTypeTitle / Venue / Authors
2014 J jnl
Audio-visual speech recognition techniques in augmented reality environments.
Vis. Comput.
Mohammad Reza Mirzaei, Seyed Ghorshi, Mohammad Mortazavi
2014 — conf
CPM: A congestion control method for interplanetary network.
CCECE
Maryam Ghotbi Ravandi, Mohammad Mortazavi, Seyed Ghorshi
2012 — conf
Combining Augmented Reality and Speech Technologies to Help Deaf and Hard of Hearing People.
SVR
Mohammad Reza Mirzaei, Seyed Ghorshi, Mohammad Mortazavi
2012 — conf
Using augmented reality and automatic speech recognition techniques to help deaf and hard of hearing people.
VRIC
Mohammad Reza Mirzaei, Seyed Ghorshi, Mohammad Mortazavi
2011 C conf
Analyzing Area Penalty of 32-Bit Fault Tolerant ALU Using BCH Code.
DSD
Vahid Khorasani, Bijan Vosoughi Vahdat, Mohammad Mortazavi
2011 — conf
Binary Hybrid GA-PSO based algorithm for compression of hyperspectral data.
ICSPCS
Pedram Ghamisi, Farshid Sepehrband, Jayran Choupan, Mohammad Mortazavi
2011 — conf
Packet loss replacement in VoIP using a low-order recursive linear prediction method.
CCECE
Seyed Reza Miralavi, Seyed Ghorshi, Mohammad Mortazavi, Shahab Pasha
2010 — conf
Analysis of digital DSP blocks using GDI technology.
CISIM
Mehdi Faed, Mohammad Mortazavi, Alireza Faed
2009 — conf
The design of a low-power high-speed current comparator in 0.35-m CMOS technology.
ISQED
Soheil Ziabakhsh, Hosein Alavi-Rad, Mohammad Alavi-Rad, Mohammad Mortazavi
2005 J jnl
A VLSI Design Design-Synthesis Methodology at the transistor Layout Level.
Trans. SDPS
Nikolaos G. Bourbakis, Mohammad Mortazavi
2001 A* conf
An Advanced Timing Characterization Method Using Mode Dependency.
DAC
Hakan Yalcin, Robert Palermo, Mohammad Mortazavi, Cyrus Bamji, Karem A. Sakallah, John P. Hayes
2001 J jnl
Fast and accurate timing characterization using functionalinformation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hakan Yalcin, Mohammad Mortazavi, Robert Palermo, Cyrus Bamji, Karem A. Sakallah, John P. Hayes
2000 J jnl
A floorplanning-Synthesis Methodology for Multiple Chip Module Design.
Trans. SDPS
Nikolaos G. Bourbakis, Mohammad Mortazavi
2000 A conf
Transistor-Level Timing Analysis Using Embedded Simulation.
ICCAD
Pawan Kulshreshtha, Robert Palermo, Mohammad Mortazavi, Cyrus Bamji, Hakan Yalcin
1999 A* conf
Functional Timing Analysis for IP Characterization.
DAC
Hakan Yalcin, Mohammad Mortazavi, Robert Palermo, Cyrus Bamji, Karem A. Sakallah
1995 — conf
An efficient building block layout methodology for compact placement.
Great Lakes Symposium on VLSI
Nikolaos G. Bourbakis, Mohammad Mortazavi