Mohammad Maymandi-Nejad

35 papers C 5Journal 25Unranked 5
YearRankTypeTitle / Venue / Authors
2022 J jnl
A Variable-Capacitance Energy Harvester With Miniaturized Inductor Targeting Implantable Devices.
IEEE Trans. Ind. Electron.
Seyed Hossein Daneshvar, Mohammad Maymandi-Nejad, Mehmet Rasit Yuce, Jean-Michel Redouté
2020 J jnl
A Low-Power Time-to-Digital Converter for Sensor Interface Circuits.
IEEE Trans. Circuits Syst.
Mohammad Saleh Rostami, Mehdi Saberi, Mohammad Maymandi-Nejad, Mohamad Sawan
2020 J jnl
Analytical phase noise study of a back-gate coupled colpitts quadrature VCO.
Microelectron. J.
Emad Ebrahimi, Sasan Naseh, Ali Ebrahimi, Mohammad Maymandi-Nejad
2020 J jnl
Single-ended ring oscillators: analysis and design.
IET Circuits Devices Syst.
Elnaz Zafarkhah, Mohammad Maymandi-Nejad, Maryam Zare
2019 — conf
A Performance Comparison Between Synchronous and Asynchronous Electrostatic Harvesters.
ICIT
Seyed Hossein Daneshvar, Mohammad Maymandi-Nejad, Mehmet Rasit Yuce, Jean-Michel Redouté
2019 J jnl
Design challenges for a new mostly digital VCO-based delta-sigma modulator.
IET Circuits Devices Syst.
Paria Jamshidi, Mohammad Maymandi-Nejad
2019 J jnl
Efficient implementation of digit-serial Montgomery modular multiplier architecture.
IET Circuits Devices Syst.
Sahar Fatemi, Maryam Zare, Amir Farzad Khavari, Mohammad Maymandi-Nejad
2018 J jnl
Analysis of the impact of interferers on VCO-based continuous time delta-sigma modulators.
Integr.
Paria Jamshidi, Mohammad Maymandi-Nejad
2018 — conf
Power Efficient Optimization Procedure for Asynchronous Electrostatic Generators.
ICECS
Seyed Hossein Daneshvar, Mohammad Maymandi-Nejad, Mehmet Rasit Yuce, Jean-Michel Redoute
2017 J jnl
A new electro-static micro-generator for energy harvesting from diaphragm muscle.
Int. J. Circuit Theory Appl.
Seyed Hossein Daneshvar, Mohammad Maymandi-Nejad
2017 J jnl
A new hybrid algorithm for analog ICs optimization based on the shrinking circles technique.
Integr.
Maryam Dehbashian, Mohammad Maymandi-Nejad
2017 J jnl
An enhanced optimization kernel for analog IC design automation using the shrinking circles technique.
Eng. Appl. Artif. Intell.
Maryam Dehbashian, Mohammad Maymandi-Nejad
2017 J jnl
Co-AGSA: An efficient self-adaptive approach for constrained optimization of analog IC based on the shrinking circles technique.
Integr.
Maryam Dehbashian, Mohammad Maymandi-Nejad
2016 J jnl
A Fully Digital Front-End Architecture for ECG Acquisition System With 0.5 V Supply.
IEEE Trans. Very Large Scale Integr. Syst.
Maryam Zare, Mohammad Maymandi-Nejad
2016 J jnl
A low-power fast tag comparator by modifying charging scheme of wide fan-in dynamic OR gates.
Integr.
Mahshid Nasserian, Mohammad Kafi Kangi, Mohammad Maymandi-Nejad, Farshad Moradi
2016 J jnl
Nonautoregressive Nonlinear Identification of IPMC in Large Deformation Situations Using Generalized Volterra-Based Approach.
IEEE Trans. Instrum. Meas.
Mohsen Annabestani, Nadia Naghavi, Mohammad Maymandi-Nejad
2015 J jnl
A Fully Digital ASK Demodulator With Digital Calibration for Bioimplantable Devices.
IEEE Trans. Very Large Scale Integr. Syst.
Mohammad Kafi Kangi, Mohammad Maymandi-Nejad, Mahshid Nasserian
2015 — conf
A Linear Comparator-Based Fully Digital Delay Element.
ISVLSI
Afshin Seraj, Mohammad Maymandi-Nejad, Parvin Bahmanyar, Manoj Sachdev
2014 J jnl
Analytical model for CMOS cross-coupled LC-tank oscillator.
IET Circuits Devices Syst.
Mojtaba Daliri, Mohammad Maymandi-Nejad
2011 C conf
Duty Cycle Shift Keying data transfer technique for bio-implantable devices.
ISCAS
Seyed Abdollah Mirbozorgi, Ghazal Nabovati, Mohammad Maymandi-Nejad
2011 J jnl
Ultra-low power self-calibrating process-insensitive BPSK demodulator for bio-implantable chips.
IEICE Electron. Express
Ghazal Nabovati, Seyed Abdollah Mirbozorgi, Mohammad Maymandi-Nejad, Hooman Nabovati
2010 J jnl
A Novel Overlap-Based Logic Cell: An Efficient Implementation of Flip-Flops With Embedded Logic.
IEEE Trans. Very Large Scale Integr. Syst.
Omid Sarbishei, Mohammad Maymandi-Nejad
2010 C conf
Capacitor scaling for low-power design of cyclic analog-to-digital converters.
ISCAS
Maryam Zaare, Reza Lotfi, Mohammad Maymandi-Nejad
2010 J jnl
Ultra-low power BPSK demodulator for bio-implantable chips.
IEICE Electron. Express
Ghazal Nabovati, Mohammad Maymandi-Nejad
2009 C conf
An Ultra-low-power 10-Bit 100-kS/s Successive-approximation Analog-to-digital Converter.
ISCAS
Reza Lotfi, Rabeeh Majidi, Mohammad Maymandi-Nejad, Wouter A. Serdijn
2009 J jnl
An ultra low-power low-voltage switched-comparator successive approximation analog to digital converter.
IEICE Electron. Express
Ali Valaee, Mohammad Maymandi-Nejad
2009 J jnl
Distortion analysis of bootstrap switch using volterra series.
IET Circuits Devices Syst.
Mojtaba Daliri, Mohammad Maymandi-Nejad, Khalil Mafinezhad
2008 — conf
A 0.8-V 420nW CMOS switched-opamp switched-capacitor pacemaker front-end with a new continuous-time CMFB.
ICECS
Mojtaba Daliri, Mohammad Maymandi-Nejad
2008 C conf
A fully digital ADC using a new delay element with enhanced linearity.
ISCAS
Hooman Farkhani, Mohammad Maymandi-Nejad, Manoj Sachdev
2007 C conf
Power-Delay Efficient Overlap-Based Charge-Sharing Free Pseudo-Dynamic D Flip-Flops.
ISCAS
Omid Sarbishei, Mohammad Maymandi-Nejad
2006 J jnl
DTMOS Technique for Low-Voltage Analog Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Mohammad Maymandi-Nejad, Manoj Sachdev
2005 — conf
A 0.8V Delta-Sigma modulator using DTMOS technique.
ISCAS (4)
Mohammad Maymandi-Nejad, Manoj Sachdev
2005 J jnl
A monotonic digitally controlled delay element.
IEEE J. Solid State Circuits
Mohammad Maymandi-Nejad, Manoj Sachdev
2004 J jnl
Correction to "A Digitally Programmable Delay Element: Design and Analysis".
IEEE Trans. Very Large Scale Integr. Syst.
Mohammad Maymandi-Nejad, Manoj Sachdev
2003 J jnl
A digitally programmable delay element: design and analysis.
IEEE Trans. Very Large Scale Integr. Syst.
Mohammad Maymandi-Nejad, Manoj Sachdev