Mohamed I. Elmasry

161 papers A* 7A 10B 1C 12Misc 2Journal 88Unranked 41

Year	Rank	Type	Title / Venue / Authors
2021	—	`conf`	A Teaching Assistant for Microelectronic Circuits Problems. IISA Salam I. Nachawi, Vincent C. Gaudet, Mohamed I. Elmasry
2017	—	`conf`	On the Fault Tolerance of Stochastic Decoders. ISMVL Assem S. Hussein, Mohamed I. Elmasry, Vincent C. Gaudet
2016	—	`conf`	A 16-bit high-speed low-power hybrid adder. ICM Assem S. Hussein, Vincent C. Gaudet, Hassan Mostafa, Mohamed I. Elmasry
2014	—	`conf`	Negative capacitance circuits for process variations compensation and timing yield improvement. CCECE Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2013	—	`conf`	Negative capacitance circuits for process variations compensation and timing yield improvement. ICECS Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2013	J	`jnl`	Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits. IEEE Trans. Very Large Scale Integr. Syst. Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2012	J	`jnl`	On-Chip Process Variations Compensation Using an Analog Adaptive Body Bias (A-ABB). IEEE Trans. Very Large Scale Integr. Syst. Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011	J	`jnl`	A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity. IEEE Trans. Very Large Scale Integr. Syst. Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011	J	`jnl`	A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation. IEEE Trans. Very Large Scale Integr. Syst. Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011	J	`jnl`	Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells. IEEE Trans. Circuits Syst. I Regul. Pap. Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011	J	`jnl`	Analytical Soft Error Models Accounting for Die-to-Die and Within-Die Variations in Sub-Threshold SRAM Cells. IEEE Trans. Very Large Scale Integr. Syst. Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011	J	`jnl`	Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates. IEEE Trans. Circuits Syst. I Regul. Pap. Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2010	J	`jnl`	A Design-Oriented Soft Error Rate Variation Model Accounting for Both Die-to-Die and Within-Die Variations in Submicrometer CMOS SRAM Cells. IEEE Trans. Circuits Syst. I Regul. Pap. Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2010	J	`jnl`	A Power-Efficient Multipin ILP-Based Routing Technique. IEEE Trans. Circuits Syst. I Regul. Pap. Ahmed Youssef, Zhen Yang, Mohab Anis, Shawki Areibi, Anthony Vannelli, Mohamed I. Elmasry
2010	C	`conf`	Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops. ISCAS Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2010	J	`jnl`	Discrete cooperative particle swarm optimization for FPGA placement. Appl. Soft Comput. Mohammed El-Abd, Hassan Hassan, Mohab Anis, Mohamed S. Kamel, Mohamed I. Elmasry
2010	J	`jnl`	On the Power Management of Simultaneous Multithreading Processors. IEEE Trans. Very Large Scale Integr. Syst. Ahmed Youssef, Mohamed Zahran, Mohab Anis, Mohamed I. Elmasry
2010	C	`conf`	Statistical timing yield improvement of dynamic circuits using negative capacitance technique. ISCAS Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2009	J	`jnl`	A New Loss Compensation Technique for CMOS Distributed Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs Kambiz K. Moez, Mohamed I. Elmasry
2009	—	`conf`	Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits. ISVLSI Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2009	J	`jnl`	Total Power Modeling in FPGAs Under Spatial Correlation. IEEE Trans. Very Large Scale Integr. Syst. Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2008	J	`jnl`	A 6-Bit 1.6-GS/sLow-Power Wideband Flash ADC Converter in 0.13-µm CMOS Technology. IEEE J. Solid State Circuits Ayman H. Ismail, Mohamed I. Elmasry
2008	J	`jnl`	A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs. IEEE Trans. Very Large Scale Integr. Syst. Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2008	J	`jnl`	A Low-Noise CMOS Distributed Amplifier for Ultra-Wide-Band Applications. IEEE Trans. Circuits Syst. II Express Briefs Kambiz K. Moez, Mohamed I. Elmasry
2008	J	`jnl`	Analysis of the Flash ADC Bandwidth-Accuracy Tradeoff in Deep-Submicron CMOS Technologies. IEEE Trans. Circuits Syst. II Express Briefs Ayman H. Ismail, Mohamed I. Elmasry
2008	J	`jnl`	Input Vector Reordering for Leakage Power Reduction in FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2007	—	`conf`	A 10dB 44GHz Loss-Compensated CMOS Distributed Amplifier. ISSCC Kambiz K. Moez, Mohamed I. Elmasry
2007	—	`conf`	A Low-Power Multi-Pin Maze Routing Methodology. ISQED Ahmed Youssef, Tor Myklebust, Mohab Anis, Mohamed I. Elmasry
2007	—	`conf`	A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs. ASP-DAC Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2006	A	`conf`	A 10-GHz 15-dB four-stage distributed amplifier in 0.18 µm CMOS process. DATE Kambiz K. Moez, Mohamed I. Elmasry
2006	C	`conf`	A termination technique for the averaging network of flash ADC's. ISCAS Ayman H. Ismail, Mohamed I. Elmasry
2006	A*	`conf`	Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units. MICRO Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2006	J	`jnl`	Impact of technology scaling and process variations on RF CMOS devices. Microelectron. J. Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2006	J	`jnl`	Low-power multi-threshold MCML: Analysis, design, and variability. Microelectron. J. Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2006	J	`jnl`	Lumped-element analysis and design of CMOS distributed amplifiers with image impedance termination. Microelectron. J. Kambiz K. Moez, Mohamed I. Elmasry
2005	—	`conf`	A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets. IWSOC Payam Ghafari, Ehsan Mirhadi, Mohab Anis, Shawki Areibi, Mohamed I. Elmasry
2005	A	`conf`	A leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only). FPGA Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005	A	`conf`	Activity Packing in FPGAs for Leakage Power Reduction. DATE Hassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry
2005	J	`jnl`	Design and optimization of MOS current mode logic for parameter variations. Integr. Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005	A	`conf`	LAP: a logic activity packing methodology for leakage power-tolerant FPGAs. ISLPED Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005	J	`jnl`	MOS current mode circuits: analysis, design, and variability. IEEE Trans. Very Large Scale Integr. Syst. Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005	J	`jnl`	Memoryless Viterbi decoder. IEEE Trans. Circuits Syst. II Express Briefs Dalia A. El-Dib, Mohamed I. Elmasry
2005	J	`jnl`	POMR: a power-aware interconnect optimization methodology. IEEE Trans. Very Large Scale Integr. Syst. Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2004	—	`conf`	Analog-to-digital conversion for SONET OC-192. SoCC Ayman H. Ismail, Mohamed I. Elmasry
2004	—	`conf`	Analysis and design of low-power multi-threshold MCML. SoCC Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2004	—	`conf`	Design and optimization of MOS current mode logic for parameter variations. ACM Great Lakes Symposium on VLSI Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2004	—	`conf`	Impact of technology scaling on RF CMOS. SoCC Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2004	—	`conf`	MOS current mode logic: design, optimization, and variability. SoCC Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2004	J	`jnl`	Modified register-exchange Viterbi decoder for low-power wireless communications. IEEE Trans. Circuits Syst. I Regul. Pap. Dalia A. El-Dib, Mohamed I. Elmasry
2004	—	`conf`	POMR: a power-optimal maze routing methodology. SoCC Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2004	J	`jnl`	Phase-domain fractional-N frequency synthesizers. IEEE Trans. Circuits Syst. I Regul. Pap. Ayman ElSayed, Mohamed I. Elmasry
2003	J	`jnl`	A fast lock digital phase-locked-loop architecture for wireless applications. IEEE Trans. Circuits Syst. II Express Briefs Amr M. Fahim, Mohamed I. Elmasry
2003	J	`jnl`	A wideband sigma-delta phase-locked-loop modulator for wireless applications. IEEE Trans. Circuits Syst. II Express Briefs Amr M. Fahim, Mohamed I. Elmasry
2003	J	`jnl`	Design and optimization of multithreshold CMOS (MTCMOS) circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mohab Anis, Shawki Areibi, Mohamed I. Elmasry
2002	—	`conf`	A Novel Analytical Model for Evaluation of Substrate Crosstalk in VLSI Circuits. DELTA Nasser Masoumi, Mohamed I. Elmasry, Safieddin Safavi-Naeini, Haydar Hadi
2002	J	`jnl`	A methodology for substrate crosstalk evaluation for system-on-a-chip. Integr. Comput. Aided Eng. Nasser Masoumi, Safieddin Safavi-Naeini, Mohamed I. Elmasry
2002	A*	`conf`	Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique. DAC Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, Shawki Areibi
2002	J	`jnl`	Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies. IEEE Trans. Very Large Scale Integr. Syst. Mohab Anis, Mohamed W. Allam, Mohamed I. Elmasry
2002	—	`conf`	Fractional-N frequency synthesizer for wireless communications. ISCAS (4) A. E. Hussein, Mohamed I. Elmasry
2002	J	`jnl`	Low-power high-performance arithmetic circuits and architectures. IEEE J. Solid State Circuits Amr M. Fahim, Mohamed I. Elmasry
2002	—	`conf`	Low-power register-exchange Viterbi decoder for high-speed wireless communications. ISCAS (5) D. A. F. Ei-Dib, Mohamed I. Elmasry
2002	—	`conf`	Self-timed MOS current mode logic for digital applications. ISCAS (5) Mohab Anis, Mohamed I. Elmasry
2001	J	`jnl`	A low-power high-performance current-mode multiport SRAM. IEEE Trans. Very Large Scale Integr. Syst. Muhammad M. Khellah, Mohamed I. Elmasry
2001	J	`jnl`	Dynamic current mode logic (DyCML): a new low-power high-performance logic style. IEEE J. Solid State Circuits Mohamed W. Allam, Mohamed I. Elmasry
2001	—	`conf`	Split-Gate Logic circuits for multi-threshold technologies. ISCAS (4) Muhammad E. S. Elrabaa, Mohamed I. Elmasry
2000	C	`conf`	A contention-free domino logic for scaled-down CMOS technologies with ultra low threshold voltages. ISCAS Muhammad E. S. Elrabaa, Mohab H. Anis, Mohamed I. Elmasry
2000	—	`conf`	A fully-integrated low phase-noise nested-loop PLL for frequency synthesis. CICC Amr N. Hafez, Mohamed I. Elmasry
2000	C	`conf`	An Efficient and Accurate Model for RF/Microwave Spiral Inductors Using Microstrip Lines Theory. ICCD Nasser Masoumi, Safieddin Safavi-Naeini, Mohamed I. Elmasry
2000	—	`conf`	Dynamic current mode logic (DyCML), a new low-power high-performance logic family. CICC Mohamed W. Allam, Mohamed I. Elmasry
2000	—	`conf`	Effect of technology scaling on digital CMOS logic styles. CICC Mohamed W. Allam, Mohab H. Anis, Mohamed I. Elmasry
2000	J	`jnl`	Fast and efficient parametric modeling of contact-to-substratecoupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nasser Masoumi, Mohamed I. Elmasry, Safieddin Safavi-Naeini
2000	A	`conf`	High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies. ISLPED Mohamed W. Allam, Mohab Anis, Mohamed I. Elmasry
2000	—	`conf`	Low power high speed analog-to-digital converter for wireless communications. ACM Great Lakes Symposium on VLSI A. E. Hussein, Mohamed I. Elmasry
2000	J	`jnl`	Low-power design of decimation filters for a digital IF receiver. IEEE Trans. Very Large Scale Integr. Syst. Brian A. White, Mohamed I. Elmasry
2000	J	`jnl`	Low-power direct digital frequency synthesis for wireless communications. IEEE J. Solid State Circuits Abdellatif Bellaouar, Michael S. O'brecht, Amr M. Fahim, Mohamed I. Elmasry
1999	—	`conf`	A Fast Parametric Model for Contact-Substrate Coupling. VLSI Nasser Masoumi, Mohamed I. Elmasry, Safieddin Safavi-Naeini
1999	—	`conf`	A Low-Voltage High-Performance Differential Static Logic (LVDSL) family. ISCAS (1) Amr M. Fahim, Mohamed I. Elmasry
1999	—	`conf`	A Novel Low Power Low Phase-Noise PLL Architecture for Wireless Transceivers. Great Lakes Symposium on VLSI Amr N. Hafez, Mohamed I. Elmasry
1999	—	`conf`	A formulation for quick evaluation and optimization of digital CMOS circuits. ISCAS (6) Maitham Shams, Mohamed I. Elmasry
1999	—	`conf`	A low power monolithic subsampled phase-locked loop architecture for wireless transceivers. ISCAS (2) Amr N. Hafez, Mohamed I. Elmasry
1999	—	`conf`	A low-power CMOS frequency synthesizer design methodology for wireless applications. ISCAS (2) Amr M. Fahim, Mohamed I. Elmasry
1999	—	`conf`	A low-power direct digital frequency synthesizer architecture for wireless communications. CICC Abdellatif Bellaouar, Michael S. Obrecht, Amr M. Fahim, Mohamed I. Elmasry
1999	C	`conf`	Delay Optimization of CMOS Logic Circuits Using Closed-Form Expressions. ICCD Maitham Shams, Mohamed I. Elmasry
1999	A	`conf`	Differential PLL for wireless applications using differential CMOS LC-VCO and differential charge pump. ISLPED Ayman ElSayed, Akbar Ali, Mohamed I. Elmasry
1999	—	`conf`	Fully integrated low phase-noise PLLs using closed-loop voltage-to-frequency converter architectures. CICC Amr N. Hafez, Mohamed I. Elmasry
1998	—	`conf`	A Low-Power High-Performance Embedded SRAM Macrocell. Great Lakes Symposium on VLSI Amr M. Fahim, Muhammad M. Khellah, Mohamed I. Elmasry
1998	—	`conf`	Effective Capacitance Macro-Modelling for Architectural-Level Power Estimation. Great Lakes Symposium on VLSI Muhammad M. Khellah, Mohamed I. Elmasry
1998	—	`conf`	Low-Power Design of Finite Field Multipliers for Wireless Applications. Great Lakes Symposium on VLSI Amr G. Wassal, M. Anwarul Hasan, Mohamed I. Elmasry
1998	J	`jnl`	Modeling and comparing CMOS implementations of the C-element. IEEE Trans. Very Large Scale Integr. Syst. Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry
1998	J	`jnl`	Transient Phenomena in High Speed Bipolar Devices. VLSI Design Michael S. Obrecht, Edwin L. Heasell, Jirí Vlach, Mohamed I. Elmasry
1997	A	`conf`	A programmable power-efficient decimation filter for software radios. ISLPED Emad N. Farag, Ran-Hong Yan, Mohamed I. Elmasry
1997	J	`jnl`	Low-power BiCMOS circuits for high-speed interchip communication. IEEE J. Solid State Circuits Muhammad E. S. Elrabaa, Mohamed I. Elmasry, Duljit S. Malhi
1997	C	`conf`	Optimizing CMOS Implementations of the C-element. ICCD Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry
1997	J	`jnl`	VLSI compressor design with applications to digital neural networks. IEEE Trans. Very Large Scale Integr. Syst. David Zhang, Mohamed I. Elmasry
1996	J	`jnl`	A Digital Perceptron Learning Implementation with Look-up Table Feedback Layer. J. Circuits Syst. Comput. David Zhang, Mohamed I. Elmasry
1996	A	`conf`	A comparison of CMOS implementations of an asynchronous circuits primitive: the C-element. ISLPED Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry
1996	J	`jnl`	A parallel digital layered perceptrons implementation. Neural Parallel Sci. Comput. David Zhang, Mohamed I. Elmasry
1996	J	`jnl`	All-N-logic high-speed true-single-phase dynamic CMOS logic. IEEE J. Solid State Circuits Richard X. Gu, Mohamed I. Elmasry
1996	J	`jnl`	Analysis and optimization of series-gated CML and ECL high-speed bipolar circuits. IEEE J. Solid State Circuits Khaled M. Sharaf, Mohamed I. Elmasry
1996	J	`jnl`	Circuit techniques for CMOS low-power high-performance multipliers. IEEE J. Solid State Circuits Issam S. Abu-Khater, Abdellatif Bellaouar, Mohamed I. Elmasry
1996	—	`conf`	Low-Power Implementation of Discrete Cosine Transform. Great Lakes Symposium on VLSI Emad N. Farag, Mohamed I. Elmasry
1996	Misc	`conf`	Low-power subband coding algorithm. ICASSP Emad N. Farag, Mohamed I. Elmasry
1996	J	`jnl`	Mapping neural networks onto systolic arrays. Neural Parallel Sci. Comput. David Zhang, Mohamed I. Elmasry
1996	J	`jnl`	Power dissipation analysis and optimization of deep submicron CMOS digital circuits. IEEE J. Solid State Circuits Richard X. Gu, Mohamed I. Elmasry
1995	J	`jnl`	A programmable neural network architecture using BiCMOS technology. Neural Parallel Sci. Comput. David Zhang, Richard X. Gu, Mohamed I. Elmasry
1995	J	`jnl`	Active-pull-down nonthreshold logic BiCMOS circuits for high-speed low-power applications. IEEE J. Solid State Circuits Khaled M. Sharaf, Mohamed I. Elmasry
1995	J	`jnl`	Bootstrapped full-swing BiCMOS/BiNMOS logic circuits for 1.2-3.3 V supply voltage regime. IEEE J. Solid State Circuits Abdellatif Bellaouar, Mohamed I. Elmasry, Sherif H. K. Embabi
1995	—	`conf`	Circuit/architecture for low-power high-performance 32-bit adder. Great Lakes Symposium on VLSI Issam S. Abu-Khater, Abdellatif Bellaouar, Mohamed I. Elmasry, Ran-Hong Yan
1995	J	`jnl`	Differential BiCMOS logic circuits: fault characterization and design-for-testability. IEEE Trans. Very Large Scale Integr. Syst. Shaahin Hessabi, Mohamed Y. Osman, Mohamed I. Elmasry
1995	J	`jnl`	Low-power CMOS/BiCMOS drivers and receivers for on-chip interconnects. IEEE J. Solid State Circuits Abdellatif Bellaouar, Issam S. Abu-Khater, Mohamed I. Elmasry
1995	J	`jnl`	Novel high speed circuit structures for BiCMOS environment. IEEE J. Solid State Circuits Richard X. Gu, Mohamed I. Elmasry
1995	C	`conf`	Power Dissipation in Deep Submicron CMOS Digital Circuits. ISCAS Richard X. Gu, Mohamed I. Elmasry
1995	J	`jnl`	TRASIM: compact and efficient two-dimensional transient simulator for arbitrary planar semiconductor devices. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Michael S. Obrecht, Mohamed I. Elmasry, Edwin L. Heasell
1994	C	`conf`	An All-N-Logic High-Speed Single-Phase Dynamic CMOS Logic. ISCAS Richard X. Gu, Mohamed I. Elmasry
1994	J	`jnl`	An accurate analytical propagation delay model for high-speed CML bipolar circuits. IEEE J. Solid State Circuits Khaled M. Sharaf, Mohamed I. Elmasry
1994	J	`jnl`	Analysis of the correlation structure for a neural predictive model with application to speech recognition. Neural Networks Li Deng, Khaled Hassanein, Mohamed I. Elmasry
1994	C	`conf`	BiCMOS Active-Pull-Down Non-Threshold Logic Cicuits for High-Speed Low-Power Applications. ISCAS Khaled M. Sharaf, Mohamed I. Elmasry
1994	J	`jnl`	Full-swing Schottky BiCMOS/BiNMOS and the effects of operating frequency and supply voltage scaling. IEEE J. Solid State Circuits Abdellatif Bellaouar, Issam S. Abu-Khater, Mohamed I. Elmasry, A. Chikima
1994	J	`jnl`	Fuzzy Clustering Neural Network (FCNN): Competitive Learning and Parallel Architecture. J. Intell. Fuzzy Syst. David Zhang, Mohamed Kamel, Mohamed I. Elmasry
1994	J	`jnl`	High-speed dynamic reference voltage (DRV) CMOS/ECL interface circuits. IEEE J. Solid State Circuits Richard X. Gu, Mohamed I. Elmasry
1994	J	`jnl`	Highly testable design of BiCMOS logic circuits. IEEE J. Solid State Circuits Mohamed Y. Osman, Mohamed I. Elmasry
1994	—	`conf`	Low-power differential CML and ECL BiCMOS circuit techniques. Great Lakes Symposium on VLSI Khaled M. Sharaf, Mohamed I. Elmasry
1994	J	`jnl`	Mixed analog/digital hardware synthesis of artificial neural networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Arun Achyuthan, Mohamed I. Elmasry
1994	J	`jnl`	Novel low-voltage low-power full-swing BiCMOS circuits. IEEE J. Solid State Circuits Muhammad E. S. Elrabaa, Michael S. Obrecht, Mohamed I. Elmasry
1994	J	`jnl`	Pipelined architecture for neural-network-based speech recognition. Neural Parallel Sci. Comput. David Zhang, Li Deng, Mohamed I. Elmasry
1994	J	`jnl`	Schottky merged BiCMOS structures. IEEE J. Solid State Circuits Samir S. Rofail, Mohamed I. Elmasry
1994	—	`conf`	Vowel classification using a neural predictive HMM: a discriminative training approach. ICASSP (2) Khaled Hassanein, Li Deng, Mohamed I. Elmasry
1993	J	`jnl`	A new model for bipolar transistors at high current. IEEE J. Solid State Circuits Richard X. Gu, Mohamed I. Elmasry, David J. Roulston
1993	C	`conf`	Analog neural network building blocks based on current mode subthreshold operation. ISCAS L. Song, Mohamed I. Elmasry, Anthony Vannelli
1993	J	`jnl`	Analysis of latchup and parasitic effects in merged BiCMOS structures. IEEE J. Solid State Circuits Samir S. Rofail, Mohamed I. Elmasry
1993	J	`jnl`	Global optimization approach for architectural synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Catherine H. Gebotys, Mohamed I. Elmasry
1993	—	`conf`	Minimum description length pruning and maximum mutual information training of adaptive probabilistic neural networks. ICNN Waleed Fakhr, Mohamed I. Elmasry
1993	J	`jnl`	Modular switched-resistor ANN chip for character recognition using novel parallel VLSI architecture. Neural Parallel Sci. Comput. Sameh Ebrahim Rehan, Mohamed I. Elmasry
1992	J	`jnl`	Analytical and numerical analyses of the delay time of BiCMOS structures. IEEE J. Solid State Circuits Samir S. Rofail, Mohamed I. Elmasry
1992	J	`jnl`	Design and optimization of buffer chains and logic circuits in a BiCMOS environment. IEEE J. Solid State Circuits Muhammad E. S. Elrabaa, Mohamed I. Elmasry
1992	J	`jnl`	Fault characterization, testing considerations, and design for testability of BiCMOS logic circuits. IEEE J. Solid State Circuits Aly Ezzat Salama, Mohamed I. Elmasry
1992	J	`jnl`	Multiemitter BiCMOS CML circuits. IEEE J. Solid State Circuits Muhammad E. S. Elrabaa, Mohamed I. Elmasry
1992	J	`jnl`	Optimal synthesis of high-performance architectures. IEEE J. Solid State Circuits Catherine H. Gebotys, Mohamed I. Elmasry
1992	J	`jnl`	STAIC: an interactive framework for synthesizing CMOS and BiCMOS analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. J. Paul Harvey, Mohamed I. Elmasry, Bosco Leung
1992	Misc	`conf`	Testing and design for testability of BiCMOS logic circuits. VTS Aly Ezzat Salama, Mohamed I. Elmasry
1992	J	`jnl`	The digi-neocognitron: a digital neocognitron neural network model for VLSI. IEEE Trans. Neural Networks Brian A. White, Mohamed I. Elmasry
1991	J	`jnl`	Analysis and optimization of BiCMOS digital circuit structures. IEEE J. Solid State Circuits Sherif H. K. Embabi, Abdellatif Bellaouar, Mohamed I. Elmasry
1991	J	`jnl`	BiCMOS nonthreshold logic for high-speed low-power applications. IEEE J. Solid State Circuits Abdellatif Bellaouar, Mohamed I. Elmasry
1991	J	`jnl`	New full-voltage-swing BiCMOS buffers. IEEE J. Solid State Circuits Sherif H. K. Embabi, Abdellatif Bellaouar, Mohamed I. Elmasry, Robert A. Hadaway
1991	A*	`conf`	Simultaneous Scheduling and Allocation for Cost Constrained Optimal Architectural Synthesis. DAC Catherine H. Gebotys, Mohamed I. Elmasry
1990	A	`conf`	A Global Optimization Approach for Architectural Synthesis. ICCAD Catherine H. Gebotys, Mohamed I. Elmasry
1990	B	`conf`	A fast learning technique for the multilayer perceptron. IJCNN Waleed Fakhr, Mohamed I. Elmasry
1990	J	`jnl`	Scaling of digital BiCMOS circuits. IEEE J. Solid State Circuits Abdellatif Bellaouar, Sherif H. K. Embabi, Mohamed I. Elmasry
1989	A*	`conf`	ACE: A Hierarchical Graphical Interface for Architectual Synthesis. DAC O. A. Buset, Mohamed I. Elmasry
1989	J	`jnl`	Architectural synthesis for DSP silicon compilers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Baher Haroun, Mohamed I. Elmasry
1989	J	`jnl`	Integration of algorithmic VLSI synthesis with testability incorporation. IEEE J. Solid State Circuits Catherine H. Gebotys, Mohamed I. Elmasry
1989	J	`jnl`	SPAID: an architectural synthesis tool for DSP custom applications. IEEE J. Solid State Circuits Baher Haroun, Mohamed I. Elmasry
1988	A	`conf`	Automatic synthesis of a multi-bus architecture for DSP. ICCAD Baher Haroun, Mohamed I. Elmasry
1988	C	`conf`	Integrated design and test synthesis. ICCD Catherine H. Gebotys, Mohamed I. Elmasry
1988	A*	`conf`	VLSI Design Synthesis with Testability. DAC Catherine H. Gebotys, Mohamed I. Elmasry
1987	J	`jnl`	Symbolic Layout for Bipolar and MOS VLSI. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kevin S. B. Szabó, James M. Leask, Mohamed I. Elmasry
1987	A*	`conf`	The user interface and program structure of a graphical VLSI layout editor. CHI Kevin S. B. Szabó, Mohamed I. Elmasry
1984	A*	`conf`	The icewater language and interpreter. DAC Patrick A. D. Powell, Mohamed I. Elmasry
1982	J	`jnl`	WATPC: A Computer-Aided Design Package for Digital Bipolar Integrated Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. A. R. Teene, Mohamed I. Elmasry, David J. Roulston
1976	J	`jnl`	Logic Design Using EFL Structures. IEEE Trans. Computers Mohamed I. Elmasry
1975	J	`jnl`	Two-Level Emitter-Function Logic Structures for Logic-in-Memory Computers. IEEE Trans. Computers Mohamed I. Elmasry, Philip M. Thompson