Mohab Anis

91 papers A* 3A 13B 1C 8Journal 43Unranked 23
YearRankTypeTitle / Venue / Authors
2016 — conf
Hotspot detection using machine learning.
ISQED
Kareem Madkour, Sarah Mohamed, Dina Tantawy, Mohab Anis
2016 J jnl
Model-Based Initial Bias (MIB): Toward a Single-Iteration Optical Proximity Correction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ayman Yehia Hamouda, Mohab Anis, Karim S. Karim
2014 — conf
Negative capacitance circuits for process variations compensation and timing yield improvement.
CCECE
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2013 — conf
Layout regularity metric as a fast indicator of high variability circuits.
SoCC
Esraa Swillam, Kareem Madkour, Mohab Anis
2013 — conf
Negative capacitance circuits for process variations compensation and timing yield improvement.
ICECS
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2013 J jnl
Statistical SRAM Read Access Yield Improvement Using Negative Capacitance Circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2012 A conf
AIR (Aerial Image Retargeting): A novel technique for in-fab automatic model-based retargeting-for-yield.
DATE
Ayman Yehia Hamouda, Mohab Anis, Karim S. Karim
2012 J jnl
On-Chip Process Variations Compensation Using an Analog Adaptive Body Bias (A-ABB).
IEEE Trans. Very Large Scale Integr. Syst.
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2012 J jnl
Power Yield Analysis Under Process and Temperature Variations.
IEEE Trans. Very Large Scale Integr. Syst.
Kian Haghdad, Mohab Anis
2012 J jnl
Power grid analysis and verification considering temperature variations.
Microelectron. J.
Kian Haghdad, Javid Jaffari, Mohab Anis
2012 J jnl
Timing yield analysis considering process-induced temperature and supply voltage variations.
Microelectron. J.
Kian Haghdad, Mohab Anis
2011 J jnl
A Bias-Dependent Model for the Impact of Process Variations on the SRAM Soft Error Immunity.
IEEE Trans. Very Large Scale Integr. Syst.
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011 J jnl
A Novel Low Area Overhead Direct Adaptive Body Bias (D-ABB) Circuit for Die-to-Die and Within-Die Variations Compensation.
IEEE Trans. Very Large Scale Integr. Syst.
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011 — conf
A comparative analysis between FinFET Semi-Dynamic Flip-Flop topologies under process variations.
ICEAC
Mohamed Rabie, Ahmed Bahgat, Khaled Ramadan, Hosam Shobak, Tarek Nasr, Mohamed Abdelhafez, Eslam A. Moustafa, Mohab Anis
2011 J jnl
Adaptive Body Bias for Reducing the Impacts of NBTI and Process Variations on 6T SRAM Cells.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011 J jnl
Analytical Soft Error Models Accounting for Die-to-Die and Within-Die Variations in Sub-Threshold SRAM Cells.
IEEE Trans. Very Large Scale Integr. Syst.
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011 J jnl
Floorplanning for low power IC design considering temperature variations.
Microelectron. J.
Kian Haghdad, Mohab Anis, Yehea I. Ismail
2011 J jnl
Guest Editorial Special Section on 2010 IEEE Custom Integrated Circuits Conference (CICC 2010).
IEEE Trans. Circuits Syst. I Regul. Pap.
Mohab Anis, Howard C. Luong, Gabriele Manganaro
2011 J jnl
IR-Drop Aware Clustering Technique for Robust Power Grid in FPGAs.
IEEE Trans. Very Large Scale Integr. Syst.
Akhilesh Kumar, Mohab Anis
2011 J jnl
Novel Timing Yield Improvement Circuits for High-Performance Low-Power Wide Fan-In Dynamic OR Gates.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2011 J jnl
On Efficient LHS-Based Yield Analysis of Analog Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Javid Jaffari, Mohab Anis
2011 J jnl
Power Supply Pads Assignment for Maximum Timing Yield.
IEEE Trans. Circuits Syst. II Express Briefs
Kian Haghdad, Mohab Anis
2010 J jnl
A Design-Oriented Soft Error Rate Variation Model Accounting for Both Die-to-Die and Within-Die Variations in Submicrometer CMOS SRAM Cells.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2010 J jnl
A Power-Efficient Multipin ILP-Based Routing Technique.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ahmed Youssef, Zhen Yang, Mohab Anis, Shawki Areibi, Anthony Vannelli, Mohamed I. Elmasry
2010 J jnl
Advanced Variance Reduction and Sampling Techniques for Efficient Statistical Timing Analysis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Javid Jaffari, Mohab Anis
2010 C conf
Comparative analysis of power yield improvement under process variation of sub-threshold flip-flops.
ISCAS
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2010 A conf
Correlation controlled sampling for efficient variability analysis of analog circuits.
DATE
Javid Jaffari, Mohab Anis
2010 J jnl
Discrete cooperative particle swarm optimization for FPGA placement.
Appl. Soft Comput.
Mohammed El-Abd, Hassan Hassan, Mohab Anis, Mohamed S. Kamel, Mohamed I. Elmasry
2010 J jnl
FPGA Design for Timing Yield Under Process Variations.
IEEE Trans. Very Large Scale Integr. Syst.
Akhilesh Kumar, Mohab Anis
2010 J jnl
IR-Drop Management in FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Akhilesh Kumar, Mohab Anis
2010 J jnl
On the Power Management of Simultaneous Multithreading Processors.
IEEE Trans. Very Large Scale Integr. Syst.
Ahmed Youssef, Mohamed Zahran, Mohab Anis, Mohamed I. Elmasry
2010 J jnl
Power-Yield Enhancement for Field Programmable Gate Arrays Under Process Variations.
J. Low Power Electron.
Akhilesh Kumar, Mohab Anis
2010 A conf
Practical Monte-Carlo based timing yield estimation of digital circuits.
DATE
Javid Jaffari, Mohab Anis
2010 J jnl
Reducing SRAM Power Using Fine-Grained Wordline Pulsewidth Control.
IEEE Trans. Very Large Scale Integr. Syst.
Mohamed H. Abu-Rahma, Mohab Anis, Sei Seung Yoon
2010 B conf
Robust FPGA Design under Variations.
FPL
Akhilesh Kumar, Mohab Anis
2010 C conf
Scaling analysis of yield optimization considering supply and threshold voltage variations.
ISCAS
Kian Haghdad, Mohab Anis
2010 J jnl
Statistical Design of the 6T SRAM Bit Cell.
IEEE Trans. Circuits Syst. I Regul. Pap.
Vasudha Gupta, Mohab Anis
2010 C conf
Statistical timing yield improvement of dynamic circuits using negative capacitance technique.
ISCAS
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2009 A conf
Adaptive sampling for efficient failure probability analysis of SRAM cells.
ICCAD
Javid Jaffari, Mohab Anis
2009 — conf
Comparative Analysis of Timing Yield Improvement under Process Variations of Flip-Flops Circuits.
ISVLSI
Hassan Mostafa, Mohab Anis, Mohamed I. Elmasry
2009 — conf
IR-drop management CAD techniques in FPGAs for power grid reliability.
ISQED
Akhilesh Kumar, Mohab Anis
2009 J jnl
Introduction to the special issue on the 2007 International Conference on Microelectronics.
Microelectron. J.
Mohab Anis, Emad Hegazi
2009 — conf
Timing yield estimation of digital circuits using a control variate technique.
ISQED
Javid Jaffari, Mohab Anis
2009 J jnl
Total Power Modeling in FPGAs Under Spatial Correlation.
IEEE Trans. Very Large Scale Integr. Syst.
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2008 J jnl
A Comparative Study Between Static and Dynamic Sleep Signal Generation Techniques for Leakage Tolerant Designs.
IEEE Trans. Very Large Scale Integr. Syst.
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2008 J jnl
A Statistical Design-Oriented Delay Variation Model Accounting for Within-Die Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mohamed H. Abu-Rahma, Mohab Anis
2008 A* conf
A methodology for statistical estimation of read access yield in SRAMs.
DAC
Mohamed H. Abu-Rahma, Kinshuk Chowdhury, Joseph Wang, Zhiqin Chen, Sei Seung Yoon, Mohab Anis
2008 — conf
A robust single supply voltage SRAM read assist technique using selective precharge.
ESSCIRC
Mohamed H. Abu-Rahma, Mohab Anis, Sei Seung Yoon
2008 C conf
Advanced IC technology - opportunities and challenges.
ISCAS
Mohab Anis
2008 — conf
Area/yield trade-offs in scaled CMOS SRAM cell.
ESSCIRC
Vasudha Gupta, Mohab Anis
2008 J jnl
Design-Specific Optimization Considering Supply and Threshold Voltage Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Kian Haghdad, Mohab Anis
2008 J jnl
Input Vector Reordering for Leakage Power Reduction in FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2008 A conf
On efficient Monte Carlo-based statistical static timing analysis of digital circuits.
ICCAD
Javid Jaffari, Mohab Anis
2008 J jnl
Statistical Thermal Profile Considering Process Variations: Analysis and Applications.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Javid Jaffari, Mohab Anis
2008 C conf
Switching activity reduction in low power Booth multiplier.
ISCAS
Rizwan Mudassir, Mohab Anis, Javid Jaffari
2008 J jnl
Thermal Driven Placement for Island-style MTCMOS FPGAs.
J. Comput.
Javid Jaffari, Mohab Anis
2008 J jnl
Variability-Aware Bulk-MOS Device Design.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Javid Jaffari, Mohab Anis
2008 C conf
Variability-aware design of subthreshold devices.
ISCAS
Rodrigo Jaramillo-Ramirez, Javid Jaffari, Mohab Anis
2007 C conf
A Dual-Threshold FPGA Routing Design for Subthreshold Leakage Reduction.
ISCAS
Rodrigo Jaramillo-Ramirez, Mohab Anis
2007 — conf
A Low-Power Multi-Pin Maze Routing Methodology.
ISQED
Ahmed Youssef, Tor Myklebust, Mohab Anis, Mohamed I. Elmasry
2007 — conf
A Timing-Driven Algorithm for Leakage Reduction in MTCMOS FPGAs.
ASP-DAC
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2007 J jnl
Dual-Threshold CAD Framework for Subthreshold Leakage Power Aware FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Akhilesh Kumar, Mohab Anis
2007 — conf
Thermal-Aware Placement for FPGAs Using Electrostatic Charge Model.
ISQED
Javid Jaffari, Mohab Anis
2007 C conf
Variability in VLSI Circuits: Sources and Design Considerations.
ISCAS
Mohamed H. Abu-Rahma, Mohab Anis
2006 A conf
An analytical state dependent leakage power model for FPGAs.
DATE
Akhilesh Kumar, Mohab Anis
2006 — conf
Dual-Vt Design of FPGAs for Subthreshold Leakage Tolerance.
ISQED
Akhilesh Kumar, Mohab Anis
2006 A* conf
Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units.
MICRO
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2006 J jnl
Impact of technology scaling and process variations on RF CMOS devices.
Microelectron. J.
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2006 J jnl
Low-power multi-threshold MCML: Analysis, design, and variability.
Microelectron. J.
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2006 A conf
Variability-aware device optimization under I
ISLPED
Javid Jaffari, Mohab Anis
2005 — conf
A Low-Power Partitioning Methodology by Maximizing Sleep Time and Minimizing Cut Nets.
IWSOC
Payam Ghafari, Ehsan Mirhadi, Mohab Anis, Shawki Areibi, Mohamed I. Elmasry
2005 A conf
A leakage-aware CAD flow for MTCMOS FPGA architectures (abstract only).
FPGA
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005 A conf
Activity Packing in FPGAs for Leakage Power Reduction.
DATE
Hassan Hassan, Mohab Anis, Antoine El Daher, Mohamed I. Elmasry
2005 J jnl
Design and optimization of MOS current mode logic for parameter variations.
Integr.
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005 A conf
Dual-Vt FPGA design for leakage power reduction (abstract only).
FPGA
Akhilesh Kumar, Mohab Anis
2005 A conf
LAP: a logic activity packing methodology for leakage power-tolerant FPGAs.
ISLPED
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005 — conf
Leakage Current Variability in Nanometer Technologies, invited.
IWSOC
Mohab Anis, Mohamed H. Abu-Rahma
2005 J jnl
MOS current mode circuits: analysis, design, and variability.
IEEE Trans. Very Large Scale Integr. Syst.
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2005 A conf
On Statistical Timing Analysis with Inter- and Intra-Die Variations.
DATE
Hratch Mangassarian, Mohab Anis
2005 J jnl
POMR: a power-aware interconnect optimization methodology.
IEEE Trans. Very Large Scale Integr. Syst.
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2004 — conf
Analysis and design of low-power multi-threshold MCML.
SoCC
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2004 — conf
Design and optimization of MOS current mode logic for parameter variations.
ACM Great Lakes Symposium on VLSI
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2004 — conf
Fast techniques for standby leakage reduction in MTCMOS circuits.
SoCC
Wenxin Wang, Mohab Anis, Shawki Areibi
2004 — conf
Impact of technology scaling on RF CMOS.
SoCC
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2004 — conf
MOS current mode logic: design, optimization, and variability.
SoCC
Hassan Hassan, Mohab Anis, Mohamed I. Elmasry
2004 — conf
POMR: a power-optimal maze routing methodology.
SoCC
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2003 J jnl
Design and optimization of multithreshold CMOS (MTCMOS) circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mohab Anis, Shawki Areibi, Mohamed I. Elmasry
2002 A* conf
Dynamic and leakage power reduction in MTCMOS circuits using an automated efficient gate clustering technique.
DAC
Mohab Anis, Mohamed Mahmoud, Mohamed I. Elmasry, Shawki Areibi
2002 J jnl
Energy-efficient noise-tolerant dynamic styles for scaled-down CMOS and MTCMOS technologies.
IEEE Trans. Very Large Scale Integr. Syst.
Mohab Anis, Mohamed W. Allam, Mohamed I. Elmasry
2002 — conf
Self-timed MOS current mode logic for digital applications.
ISCAS (5)
Mohab Anis, Mohamed I. Elmasry
2000 A conf
High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies.
ISLPED
Mohamed W. Allam, Mohab Anis, Mohamed I. Elmasry