Mitrajit Chatterjee

12 papers A 5Misc 1Journal 5Unranked 1
YearRankTypeTitle / Venue / Authors
2003 J jnl
A BIST Pattern Generator Design for Near-Perfect Fault Coverage.
IEEE Trans. Computers
Mitrajit Chatterjee, Dhiraj K. Pradhan
2000 J jnl
Buffer Assignment Algorithms on Data Driven ASICs.
IEEE Trans. Computers
Mitrajit Chatterjee, Savita Banerjee, Dhiraj K. Pradhan
2000 J jnl
VERILAT: verification using logic augmentation and transformations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Debjyoti Paul, Mitrajit Chatterjee, Dhiraj K. Pradhan
1999 J jnl
GLFSR-a new test pattern generator for built-in-self-test.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Dhiraj K. Pradhan, Mitrajit Chatterjee
1998 J jnl
LOT: Logic Optimization with Testability. New transformations for logic synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang Kunz
1996 — conf
BIT-based weighted mean filter.
EUSIPCO
Barun K. Kar, Mitrajit Chatterjee, Dhiraj K. Pradhan
1996 A conf
Gate-level synthesis for low-power using new transformations.
ISLPED
Dhiraj K. Pradhan, Mitrajit Chatterjee, Madhu V. Swarna, Wolfgang Kunz
1996 A conf
VERILAT: verification using logic augmentation and transformations.
ICCAD
Dhiraj K. Pradhan, Debjyoti Paul, Mitrajit Chatterjee
1995 Misc conf
A novel pattern generator for near-perfect fault-coverage.
VTS
Mitrajit Chatterjee, Dhiraj K. Pradhan
1995 A conf
LOT: logic optimization with testability-new transformations using recursive learning.
ICCAD
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang Kunz
1994 A conf
GLFSR - A New Test Pattern Generator for Built-In Self-Test.
ITC
Dhiraj K. Pradhan, Mitrajit Chatterjee
1993 A conf
Buffer assignment for data driven architectures.
ICCAD
Dhiraj K. Pradhan, Mitrajit Chatterjee, Savita Banerjee